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author | Taras Kondratiuk <taras.kondratiuk@linaro.org> | 2014-01-10 01:27:08 +0100 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-01-25 08:49:30 -0800 |
commit | f440ce0a108cd7e800894b89dcdf053aff09daad (patch) | |
tree | ba9e7d58b46296b80aed9747e18c34b53940bd85 /kernel/uid16.c | |
parent | 94e61221d5c23789da5925c7f6dafdcf3491354d (diff) |
ARM: 7938/1: OMAP4/highbank: Flush L2 cache before disabling
commit b25f3e1c358434bf850220e04f28eebfc45eb634 upstream.
Kexec disables outer cache before jumping to reboot code, but it doesn't
flush it explicitly. Flush is done implicitly inside of l2x0_disable().
But some SoC's override default .disable handler and don't flush cache.
This may lead to a corrupted memory during Kexec reboot on these
platforms.
This patch adds cache flush inside of OMAP4 and Highbank outer_cache.disable()
handlers to make it consistent with default l2x0_disable().
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Wang Nan <wangnan0@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'kernel/uid16.c')
0 files changed, 0 insertions, 0 deletions