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author | Prashant Gaikwad <pgaikwad@nvidia.com> | 2011-12-14 16:55:32 +0530 |
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committer | Varun Wadekar <vwadekar@nvidia.com> | 2011-12-22 11:32:26 +0530 |
commit | 1a24e0399b3011d25ac3448cead470947db63202 (patch) | |
tree | 4512a235281f49c49575133b8fd6344b601406de /kernel | |
parent | 2dbf0713ce5f4925c1d0021190e065da127f8f73 (diff) |
ARM: tegra2: power: Fix LP2/LP3 states accounting
Made sure LP3 state is reported as last entered state to cpuidle
governor in case when LP3 is entered as a fall back from LP2 path.
bug 905813
Change-Id: I850dddef733d45587875eb796e609b01b1732ab9
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/70012
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Diffstat (limited to 'kernel')
0 files changed, 0 insertions, 0 deletions