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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2005-11-02 14:11:35 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-11-02 14:11:35 +0000
commit6bf7bd6967b1cdde1fe953b0edb951966799fb44 (patch)
tree4b2537d200a51e13ea9e2b439c58411f7769f325 /kernel
parentbfca94590bfd3dcd958c542d2fb6406518150fee (diff)
[ARM] Fix mm initialisation with write buffered write allocate caches
It seems that without the extra tlb flush, we may end up faulting during the early kernel initialisation because the TLB can't see the updated page tables. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'kernel')
0 files changed, 0 insertions, 0 deletions