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authorArchit Taneja <architt@codeaurora.org>2015-03-04 15:19:35 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-05-06 21:59:18 +0200
commitaa890c32822a5c3061556403bf466ff831e3dc90 (patch)
tree4640357b6470b27a4b9fff75ae2e041759317cfd /lib/mpi/mpi-bit.c
parent3c8e77238ebb0854c5b2b70bb264b1cea45e7bcc (diff)
clk: qcom: fix RCG M/N counter configuration
commit 0b21503dbbfa669dbd847b33578d4041513cddb2 upstream. Currently, a RCG's M/N counter (used for fraction division) is set to either 'bypass' (counter disabled) or 'dual edge' (counter enabled) based on whether the corresponding rcg struct has a mnd field specified and a non-zero N. In the case where M and N are the same value, the M/N counter is still enabled by code even though no division takes place. Leaving the RCG in such a state can result in improper behavior. This was observed with the DSI pixel clock RCG when M and N were both set to 1. Add an additional check (M != N) to enable the M/N counter only when it's needed for fraction division. Signed-off-by: Archit Taneja <architt@codeaurora.org> Fixes: bcd61c0f535a (clk: qcom: Add support for root clock generators (RCGs)) Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'lib/mpi/mpi-bit.c')
0 files changed, 0 insertions, 0 deletions