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authorStephen Warren <swarren@nvidia.com>2014-04-15 11:00:50 -0600
committerLinus Walleij <linus.walleij@linaro.org>2014-04-22 16:48:39 +0200
commite53b797474ac61debd6e7c186285c8cc24a3a166 (patch)
treeeda64dc694dc9c840b555b7a5b20b19f144f6e0b /lib
parenta16b81dcbfc5889c37dac5f8e836136e4740fc18 (diff)
pinctrl: tegra: remove redundant data table fields
Any SoC which supports the einput, odrain, lock, ioreset, or rcv_sel options has the relevant HW register fields in the same register as the mux function selection. Similarly, the drvtype option is always in the drive register, if it is supported at all. Hence, we don't need to have struct *_reg fields in the pin group table to define which register and bank to use for those options. Delete this to save space in the driver's data tables. However, many of those options are not supported on all SoCs, or not supported on some pingroups. We need a way to detect when they are supported. Previously, this was indicated by setting the struct *_reg field to -1. With the struct *_reg fields removed, we use the struct *_bit fields for this purpose instead. The struct *_bit fields need to be expanded from 5 to 6 bits in order to store a value outside the valid HW bit range of 0..31. Even without removing the struct *_reg fields, we still need to add code to validate the struct *_bit fields, since some struct *_bit fields were already being set to -1, without an option-specific struct *_reg field to "guard" them. In other words, before this change, the pinmux driver might allow some unsupported options to be written to HW. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions