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author | Kevin Hilman <khilman@linaro.org> | 2015-09-09 15:42:45 -0700 |
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committer | Kevin Hilman <khilman@linaro.org> | 2015-09-09 15:42:45 -0700 |
commit | 71d440499b8ecbd5289bdf4ef5cce6eb62fffb0d (patch) | |
tree | 822293ceb6ce26df473b8e61c3b8ec8fa9948dd6 /mm/memtest.c | |
parent | 7c4ecc72d82f2908b9fe70dbd49c1cd35738f995 (diff) | |
parent | 9738031561d246f625325badb03a1f1eca2d1b01 (diff) |
Merge branch 'drivers/reset' into next/late
* drivers/reset:
reset: ath79: Fix missing spin_lock_init
reset: Add (devm_)reset_control_get stub functions
reset: reset-zynq: Adding support for Xilinx Zynq reset controller.
docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
MIPS: ath79: Add the reset controller to the AR9132 dtsi
reset: Add a driver for the reset controller on the AR71XX/AR9XXX
devicetree: Add bindings for the ATH79 reset controller
reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property
doc: dt: add documentation for lpc1850-rgu reset driver
reset: add driver for lpc18xx rgu
reset: sti: constify of_device_id array
ARM: STi: DT: Move reset controller constants into common location
MAINTAINERS: add include/dt-bindings/reset path to reset controller entry
Diffstat (limited to 'mm/memtest.c')
0 files changed, 0 insertions, 0 deletions