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authorRichard Zhu <r65037@freescale.com>2014-08-01 19:40:03 +0800
committerRichard Zhu <r65037@freescale.com>2014-08-06 10:51:56 +0800
commitc8a6b97fa238d4cd79ae90c721c9e77eec05f71c (patch)
tree9d91d3658d108ea5899695dfdbab63adc1d8d0d5 /mm/mmu_context.c
parentea837f36ea7e0074efa13244674bf71a73885124 (diff)
ENGR00325494 pcie:delay is requried after clks_en
- the async reset input need ref clock to sync internally, when the ref clock comes after reset, internal synced reset time is too short , cannot meet the requirement so, ssp_en should be asserted at least 4us after ref clock stable. - align to the community imx pcie driver, add the about 200us delay to make sure that it can allow the pcie clks stabilize, when pcie clks are enabled on imx6q/dl/solo. Signed-off-by: Richard Zhu <r65037@freescale.com> (cherry picked from commit 5d9635c8d92b21bc12753517fa3e9884417b19be)
Diffstat (limited to 'mm/mmu_context.c')
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