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authorDiwakar Tundlam <dtundlam@nvidia.com>2013-02-12 11:55:09 -0800
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 12:58:10 -0700
commit7ba008fbb3b5b4b566586cb29e0a75a588743c80 (patch)
treee238898ccf6d6a188ff5e96e5085db19624291c1 /net/can
parent46e91b5572fe43a524dc2fc41df65618322f6011 (diff)
ARM: tegra11: Include temperature offset to CPU EDP management
Fixed setting of DOWN threshold by adjusting hysteresis correctly for precision. Made temperatures array be at 4 degree intervals above 70C because of 2C rounding required for soctherm temperature thresholds. Bug 1233302 Change-Id: I2dc0966fdc3ba81d6e29b8dd0095b165bf2ae7bc Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-on: http://git-master/r/200216 (cherry picked from commit 33b146ef361242ba1d6752f7de3bfde49056896b) Reviewed-on: http://git-master/r/201983 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
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