ENGR00222855 MX6 CPUFREQ: support three VDDSOC setpointsrel_imx_3.0.35_12.09.02

On MX6Q/DL , there is only two set point of VDDSOC/VDDPU, one is 1.25V(1GHz),
another is 1.175V.  And in arch/arm/plat-mxc/cpufreq.c will judge whether the
current cpu frequency is the highest set point(1G) or not to set the right
VDDSOC/VDDPU. The logic is also match to dynamic ldo bypass function, since the
change point is the highest set point too. But there is three set points of
VDDSOC/VDDPU in MX6SL , so the logic in cpufreq.c need to change. Now
VDDSOC/VDDPU will track with VDDARM fully.

Signed-off-by: Robin Gong <B38343@freescale.com>

0 files changed, 0 insertions, 0 deletions