diff options
| author | Gary King <gking@nvidia.com> | 2010-03-29 17:15:39 -0700 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-03-31 09:55:51 -0800 |
| commit | b6a75a5236899a25f2c05934cf22129d4ae8f763 (patch) | |
| tree | 27f24dfb5766ea85ac3371b13af4e0698e767c44 /net/lapb/lapb_timer.c | |
| parent | 940b19bdd16c37ccf8d24c02e58aa08963fb1c3b (diff) | |
tegra: implement cpuidle device support
add LP2 (CPU power-gated) and LP3 (CPU flow-controlled) idle states
for Tegra 2 CPUs through the kernel cpuidle interface
exit latency for LP2 mode is a very rough approximation; the actual
latency is dependend on the CPU frequency
Change-Id: I115a3be6a065bcdad4149ce90cf4139b42062a43
Reviewed-on: http://git-master/r/951
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions