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| author | Sam Ravnborg <sam@mars.(none)> | 2005-07-27 22:11:01 +0200 |
|---|---|---|
| committer | Sam Ravnborg <sam@mars.(none)> | 2005-07-27 22:11:01 +0200 |
| commit | db8c1a7b2ca25f37b1429c00e82d6568f86caec1 (patch) | |
| tree | 346bee7ee9cc5929c897825c9a86cb303f945745 /scripts/Makefile.clean | |
| parent | 72ba47c1b293ae78f7d798b458bb9d3db65c7551 (diff) | |
kbuild: fix building external modules
kbuild failed to locate Makefile for external modules.
This brought to my attention how the variables for directories
have different values in different usage scenarios.
Different kbuild usage scenarios:
make - plain make in same directory where kernel source lives
make O= - kbuild is told to store output files in another directory
make M= - building an external module
make O= M= - building an external module with kernel output seperate from src
Value assigned to the different variables:
|$(src) |$(obj) |$(srctree) |$(objtree)
make |reldir to k src |as src |abs path to k src |abs path to k src
make O= |reldir to k src |as src |abs path to k src |abs path to output dir
make M= |abs path to src |as src |abs path to k src |abs path to k src
make O= M= |abs path to src |as src |abs path to k src |abs path to k output
path to kbuild file:
make | $(srctree)/$(src), $(src)
make O= | $(srctree)/$(src)
make M= | $(src)
make O= M= | $(src)
From the table above it can be seen that the only good way to find the
home directory of the kbuild file is to locate the one of the two variants
that is an absolute path. If $(src) is an absolute path (starts with /)
then use it, otherwise prefix $(src) with $(srctree).
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Diffstat (limited to 'scripts/Makefile.clean')
| -rw-r--r-- | scripts/Makefile.clean | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/scripts/Makefile.clean b/scripts/Makefile.clean index 62351b630fab..8974ea5fc878 100644 --- a/scripts/Makefile.clean +++ b/scripts/Makefile.clean @@ -13,8 +13,8 @@ __clean: clean := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.clean obj # The filename Kbuild has precedence over Makefile -include $(if $(wildcard $(srctree)/$(src)/Kbuild), \ - $(srctree)/$(src)/Kbuild, $(srctree)/$(src)/Makefile) +kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src)) +include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile) # Figure out what we need to build from the various variables # ========================================================================== |