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authorAkshu Agrawal <akshu.agrawal@amd.com>2018-08-21 12:29:43 +0530
committerMark Brown <broonie@kernel.org>2018-08-28 20:51:25 +0100
commita1b1e9880f0c2754a5ac416a546d9f295f72eabc (patch)
treeddf787d35c99af676873000b3facfa3b4626aa45 /sound/soc/amd
parentc736cbd3a668c3befd3ce08e0fbccac302fbecac (diff)
ASoC: AMD: Change MCLK to 48Mhz
25Mhz MCLK which was earlier used was of spread type. Thus, we were not getting accurate rate. The 48Mhz system clk is of non-spread type and we are changing to it to get accurate rate. Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/amd')
-rw-r--r--sound/soc/amd/acp-da7219-max98357a.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/amd/acp-da7219-max98357a.c b/sound/soc/amd/acp-da7219-max98357a.c
index 95c5701e2a30..3879cccbd2c0 100644
--- a/sound/soc/amd/acp-da7219-max98357a.c
+++ b/sound/soc/amd/acp-da7219-max98357a.c
@@ -42,7 +42,7 @@
#include "../codecs/da7219.h"
#include "../codecs/da7219-aad.h"
-#define CZ_PLAT_CLK 25000000
+#define CZ_PLAT_CLK 48000000
#define DUAL_CHANNEL 2
static struct snd_soc_jack cz_jack;