diff options
| author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2013-11-14 11:35:30 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2013-12-10 11:22:16 +0000 |
| commit | 8f113b77b511c9e26706d4eb077af0ba30893ee4 (patch) | |
| tree | b0b1db46f9a256240002feab83dace86c4aebeeb /sound/soc/davinci/davinci-mcasp.c | |
| parent | 70091a3e6aa2e7a05eaefcaec1a43c27a5023eb7 (diff) | |
ASoC: davinci-mcasp: Be consistent with the use of base in davinci_mcasp_set_dai_fmt
Replace mcasp->base use with plain base in the davinci_mcasp_set_dai_fmt()
function since it has been already used by the remaining part of the function.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/davinci/davinci-mcasp.c')
| -rw-r--r-- | sound/soc/davinci/davinci-mcasp.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index bd85c98bf5a5..1341f327df83 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c @@ -243,17 +243,17 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_DSP_B: case SND_SOC_DAIFMT_AC97: - mcasp_clr_bits(mcasp->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); - mcasp_clr_bits(mcasp->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); + mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); + mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); break; default: /* configure a full-word SYNC pulse (LRCLK) */ - mcasp_set_bits(mcasp->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); - mcasp_set_bits(mcasp->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); + mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); + mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); /* make 1st data bit occur one ACLK cycle after the frame sync */ - mcasp_set_bits(mcasp->base + DAVINCI_MCASP_TXFMT_REG, FSXDLY(1)); - mcasp_set_bits(mcasp->base + DAVINCI_MCASP_RXFMT_REG, FSRDLY(1)); + mcasp_set_bits(base + DAVINCI_MCASP_TXFMT_REG, FSXDLY(1)); + mcasp_set_bits(base + DAVINCI_MCASP_RXFMT_REG, FSRDLY(1)); break; } |