diff options
| author | Shengjiu Wang <shengjiu.wang@freescale.com> | 2016-05-14 14:50:22 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 15:48:25 +0800 |
| commit | 21859d28ffc44bdbd3ae5163637dae571321f004 (patch) | |
| tree | 1ed6b259a5ee2d81d392c967056b74b95596e4f7 /sound/soc/fsl/fsl_asrc.h | |
| parent | 98ba60a1730b499d5c5e8dde0a3f30f32337f973 (diff) | |
MLK-12794: ASoC: fsl_asrc: fix underrun issue when convert 192k to 96kHz.
The maximum divider of asrc clock is 1024, but there is no judgement
for this limitaion in driver, which may cause the divider setting not
correct.
When IDEAL_RATIO_RATE 200kHZ, the cost time of conversion from 192kHz
to 96kHz is 24ms every 1024 sample, but these sample's playback time
is 1024/96=11ms, so there will be underrun. So need to enlarge this RATE.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Diffstat (limited to 'sound/soc/fsl/fsl_asrc.h')
| -rw-r--r-- | sound/soc/fsl/fsl_asrc.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sound/soc/fsl/fsl_asrc.h b/sound/soc/fsl/fsl_asrc.h index d958c5dd6b2d..1fb06410d86f 100644 --- a/sound/soc/fsl/fsl_asrc.h +++ b/sound/soc/fsl/fsl_asrc.h @@ -2,7 +2,7 @@ /* * fsl_asrc.h - Freescale ASRC ALSA SoC header file * - * Copyright (C) 2014 Freescale Semiconductor, Inc. + * Copyright (C) 2014-2016 Freescale Semiconductor, Inc. * * Author: Nicolin Chen <nicoleotsuka@gmail.com> */ @@ -25,7 +25,7 @@ #define ASRC_OUTPUT_LAST_SAMPLE_MAX 32 #define ASRC_OUTPUT_LAST_SAMPLE 16 -#define IDEAL_RATIO_RATE 200000 +#define IDEAL_RATIO_RATE 1000000 #define REG_ASRCTR 0x00 #define REG_ASRIER 0x04 |