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| author | Shengjiu Wang <shengjiu.wang@freescale.com> | 2017-06-15 15:32:17 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 15:48:27 +0800 |
| commit | add402988943c9755a90d60453b1c106c8617174 (patch) | |
| tree | 774557d8d7b0f34fb4b8259467cb29906cd27fee /sound/soc/fsl/fsl_asrc_m2m.c | |
| parent | e265086e8f91b13d8bb8d63759548a6e51a56216 (diff) | |
MLK-15042: ASoC: fsl_asrc: update supported format
The ASRC support 24 bit input width, but for S20_3LE the input width
is 20 bit, asrc will treat it as 24bit, which like a 24bit data shift
4 bit right, the result is the volume is lower than expected.
ASRC can't shift the 20bit data left 4 bit internally, so remove the
S20_3LE in supported list, add S24_3LE in supported list.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit e65a014efe0a69c2db9de422fb780f0ba9c41dba)
Diffstat (limited to 'sound/soc/fsl/fsl_asrc_m2m.c')
0 files changed, 0 insertions, 0 deletions