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authorWeiguang Kong <weiguang.kong@nxp.com>2018-05-11 12:34:10 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 15:51:52 +0800
commitdc9756fa77434d5a3c85ce44a82565c2fe6b89ab (patch)
treecc6b3b2fdc1b1bd4c35d0dcab828c7557f90d5c5 /sound/soc/fsl/fsl_dsp.h
parent6b034c90fbccceebf4a009b4334d4450c8a161cc (diff)
MLK-18279: ASoC: fsl_dsp: get the information of reserved memory from dts
The reserved memory for dsp is defined in dts file, however, the dsp driver has also defined the address and size of this reserved memory, which is repeated and inflexible. So by cancelling the definition in dsp driver and use system API to get the information of reserved memory from dts dynamically to fix this problem. Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Diffstat (limited to 'sound/soc/fsl/fsl_dsp.h')
-rw-r--r--sound/soc/fsl/fsl_dsp.h22
1 files changed, 1 insertions, 21 deletions
diff --git a/sound/soc/fsl/fsl_dsp.h b/sound/soc/fsl/fsl_dsp.h
index 3824641c2f93..02eca8ef5c80 100644
--- a/sound/soc/fsl/fsl_dsp.h
+++ b/sound/soc/fsl/fsl_dsp.h
@@ -67,6 +67,7 @@ struct fsl_dsp {
unsigned long sram;
void *sdram_vir_addr;
unsigned long sdram_phys_addr;
+ int sdram_reserved_size;
void *msg_buf_virt;
dma_addr_t msg_buf_phys;
int msg_buf_size;
@@ -107,27 +108,6 @@ struct fsl_dsp {
#define OUTPUT_BUF_SIZE 16384
#define DSP_CONFIG_SIZE 4096
-/*external buffer
- * ----------------------------------------------------------------------
- * | name | size | description |
- * -----------------------------------------------------------------------
- * | scratch buffer for malloc | 0xffffff | For MEM_scratch_malloc()
- * ------------------------------------------------------------------------
- * | global structure | 4096 | For store dsp config structure
- * ------------------------------------------------------------------------
- */
-
-#define MEMORY_REMAP_OFFSET 0x39000000
-
-/* reserved memory for dsp firmware and core libs to
- * save their instruction/data section in SDRAM, the physical
- * address range is 0x8e000000 ~ 0x8fffffff (32M bytes).
- */
-#define SDRAM_BASE_ADDR 0x8e000000
-#define SDRAM_BASE_SIZE 0x1ffffff
-#define SDRAM_CODEC_LIB_OFFSET 0x1000000
-#define SDRAM_SCRATCH_BUF_SIZE 0xffffff
-
#define SC_C_OFS_SEL 39
#define SC_C_OFS_AUDIO 40
#define SC_C_OFS_PERIPH 41