diff options
| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2019-09-17 13:29:17 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 15:48:52 +0800 |
| commit | 03944b23b2f2da1b05e79dad3d46db3cd31fd1c6 (patch) | |
| tree | 6d516924a285b3ed56f2f07517499da23c0cf1b1 /sound/soc/fsl/fsl_easrc.h | |
| parent | 8a4b48b55237890f15762bd2fdf89dca4f56f4df (diff) | |
MLK-22591: ASoC: fsl_easrc: Add RUN_STOP in stop context
When record bitstream with ASRC+AK5558, there may be I/O error
for the high sample rate case (352kHz/768kHz).
The reason is that the context is not fully reset after
conversion, the ASRC does not start to work in next conversion.
In order to fully reset the context, we need to enable RUN_STOP,
then clear the RUN_EN bit.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 7b44c3c653acf078b6477fbc0393f88708ccb24c)
Diffstat (limited to 'sound/soc/fsl/fsl_easrc.h')
| -rw-r--r-- | sound/soc/fsl/fsl_easrc.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/sound/soc/fsl/fsl_easrc.h b/sound/soc/fsl/fsl_easrc.h index 93ee99725afb..f23374fd85ce 100644 --- a/sound/soc/fsl/fsl_easrc.h +++ b/sound/soc/fsl/fsl_easrc.h @@ -458,22 +458,22 @@ /* ASRC Interrupt Status Flags (ISF) */ #define EASRC_IRQF_RSD_SHIFT 8 #define EASRC_IRQF_RSD_WIDTH 4 -#define EASRC_IRQF_RSD_MASK ((BIT(EASRC_ISF_RSD_WIDTH) - 1) \ - << EASRC_ISF_RSD_SHIFT) -#define EASRC_IRQF_RSD(v) (((v) << EASRC_ISF_RSD_SHIFT) \ - & EASRC_ISF_RSD_MASK) +#define EASRC_IRQF_RSD_MASK ((BIT(EASRC_IRQF_RSD_WIDTH) - 1) \ + << EASRC_IRQF_RSD_SHIFT) +#define EASRC_IRQF_RSD(v) (((v) << EASRC_IRQF_RSD_SHIFT) \ + & EASRC_IRQF_RSD_MASK) #define EASRC_IRQF_OER_SHIFT 4 #define EASRC_IRQF_OER_WIDTH 4 -#define EASRC_IRQF_OER_MASK ((BIT(EASRC_ISF_OER_WIDTH) - 1) \ - << EASRC_ISF_OER_SHIFT) -#define EASRC_IRQF_OER(v) (((v) << EASRC_ISF_OER_SHIFT) \ - & EASRC_ISF_OER_MASK) +#define EASRC_IRQF_OER_MASK ((BIT(EASRC_IRQF_OER_WIDTH) - 1) \ + << EASRC_IRQF_OER_SHIFT) +#define EASRC_IRQF_OER(v) (((v) << EASRC_IRQF_OER_SHIFT) \ + & EASRC_IRQF_OER_MASK) #define EASRC_IRQF_IFO_SHIFT 0 #define EASRC_IRQF_IFO_WIDTH 4 -#define EASRC_IRQF_IFO_MASK ((BIT(EASRC_ISF_IFO_WIDTH) - 1) \ - << EASRC_ISF_IFO_SHIFT) -#define EASRC_IRQF_IFO(v) (((v) << EASRC_ISF_IFO_SHIFT) \ - & EASRC_ISF_IFO_MASK) +#define EASRC_IRQF_IFO_MASK ((BIT(EASRC_IRQF_IFO_WIDTH) - 1) \ + << EASRC_IRQF_IFO_SHIFT) +#define EASRC_IRQF_IFO(v) (((v) << EASRC_IRQF_IFO_SHIFT) \ + & EASRC_IRQF_IFO_MASK) /* ASRC Context Channel STAT */ #define EASRC_CSx_CSx_SHIFT 0 |