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authorShengjiu Wang <shengjiu.wang@nxp.com>2020-05-06 13:44:45 +0800
committerShengjiu Wang <shengjiu.wang@nxp.com>2020-05-07 17:17:50 +0800
commit4316b08138dc4a037f5c94e7a5d664096dca7c86 (patch)
tree3792442d5af3355cf8e82a9449b5cb7842e7c025 /sound/soc/fsl/fsl_micfil.c
parentb35c0a202e3c677544fe13c08345365166410cfb (diff)
MLK-23906-4: ASoC: fsl_micfil: Don't bind clock with regmap
The call flow: devm_regmap_init_mmio_clk - clk_prepare() - clk_pm_runtime_get() Cause the power domain of ipg clock always be enabled. which impact the power consumption. so we can't bind clock with regmap, but explicitly enable clock when using. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Diffstat (limited to 'sound/soc/fsl/fsl_micfil.c')
-rw-r--r--sound/soc/fsl/fsl_micfil.c17
1 files changed, 16 insertions, 1 deletions
diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c
index db6a154b113f..97187737d1a3 100644
--- a/sound/soc/fsl/fsl_micfil.c
+++ b/sound/soc/fsl/fsl_micfil.c
@@ -32,6 +32,7 @@ struct fsl_micfil {
struct platform_device *pdev;
struct regmap *regmap;
const struct fsl_micfil_soc_data *soc;
+ struct clk *busclk;
struct clk *mclk;
struct clk *clk_src[MICFIL_CLK_SRC_NUM];
struct snd_dmaengine_dai_dma_data dma_params_rx;
@@ -2217,6 +2218,13 @@ static int fsl_micfil_probe(struct platform_device *pdev)
return PTR_ERR(micfil->mclk);
}
+ micfil->busclk = devm_clk_get(&pdev->dev, "ipg_clk");
+ if (IS_ERR(micfil->busclk)) {
+ dev_err(&pdev->dev, "failed to get ipg clock: %ld\n",
+ PTR_ERR(micfil->busclk));
+ return PTR_ERR(micfil->busclk);
+ }
+
/* get audio pll1 and pll2 */
micfil->clk_src[MICFIL_AUDIO_PLL1] = devm_clk_get(&pdev->dev, "pll8k");
if (IS_ERR(micfil->clk_src[MICFIL_AUDIO_PLL1]))
@@ -2237,7 +2245,7 @@ static int fsl_micfil_probe(struct platform_device *pdev)
return PTR_ERR(regs);
micfil->regmap = devm_regmap_init_mmio_clk(&pdev->dev,
- "ipg_clk",
+ NULL,
regs,
&fsl_micfil_regmap_config);
if (IS_ERR(micfil->regmap)) {
@@ -2331,6 +2339,7 @@ static int fsl_micfil_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, micfil);
pm_runtime_enable(&pdev->dev);
+ regcache_cache_only(micfil->regmap, true);
fsl_micfil_dai.capture.formats = micfil->soc->formats;
@@ -2385,6 +2394,8 @@ static int __maybe_unused fsl_micfil_runtime_suspend(struct device *dev)
if (state == MICFIL_HWVAD_OFF)
clk_disable_unprepare(micfil->mclk);
+ clk_disable_unprepare(micfil->busclk);
+
return 0;
}
@@ -2394,6 +2405,10 @@ static int __maybe_unused fsl_micfil_runtime_resume(struct device *dev)
int ret;
u32 state;
+ ret = clk_prepare_enable(micfil->busclk);
+ if (ret < 0)
+ return ret;
+
state = atomic_read(&micfil->hwvad_state);
/* enable mclk only if the hwvad is not enabled