diff options
| author | Viorel Suman <viorel.suman@nxp.com> | 2018-06-27 10:59:12 +0300 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 15:54:01 +0800 |
| commit | 244757cda20d66497e3607bbb8beb737ed3ca01b (patch) | |
| tree | 91d4c2c8db4e0b2de7d297b62d9a0d1424a6f52c /sound/soc/fsl/fsl_sai.h | |
| parent | 4bc2390d9355dc1a127df2b03cd8241d92feba9b (diff) | |
MLK-18682-2: ASoC: fsl: sai: allow dynamic pll switching
Currently SAI master clock derives from an audio pll that cannot be
changed at runtime. iMX8 SoC has 2 audio plls usually configured to support
either 8000Hz (8k,16k,32k,48k,etc) or 11025Hz (11k,22k,44.1k,88.2k,etc)
ranges of rates - thus at runtime a SAI interface is able to play only one
range of rates. The patch allows dynamic SAI master clock reparenting to
the appropriate audio pll as function of the audio stream rate to be
played/recorded.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Diffstat (limited to 'sound/soc/fsl/fsl_sai.h')
| -rw-r--r-- | sound/soc/fsl/fsl_sai.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h index cb575a2a2501..4627d79dcb4d 100644 --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h @@ -239,6 +239,8 @@ struct fsl_sai { struct regmap *regmap; struct clk *bus_clk; struct clk *mclk_clk[FSL_SAI_MCLK_MAX]; + struct clk *pll8k_clk; + struct clk *pll11k_clk; bool slave_mode[2]; bool is_lsb_first; |