diff options
| author | Zidan Wang <zidan.wang@freescale.com> | 2015-05-11 18:24:41 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-05-12 19:43:51 +0100 |
| commit | c3ecef21c3f26bf4737fc0887964127accfa8a0e (patch) | |
| tree | ab1286cbed64158c8ab405885bd0c5bf444ab953 /sound/soc/fsl/fsl_sai.h | |
| parent | b787f68c36d49bb1d9236f403813641efa74a031 (diff) | |
ASoC: fsl_sai: add sai master mode support
When sai works on master mode, set its bit clock and frame clock.
SAI has 4 MCLK source, bus clock, MCLK1, MCLK2 and MCLK3. fsl_sai_set_bclk
will select proper MCLK source, then calculate and set the bit clock divider.
After fsl_sai_set_bclk, enable the selected mclk in hw_params(), and add
hw_free() to disable the mclk.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/fsl/fsl_sai.h')
| -rw-r--r-- | sound/soc/fsl/fsl_sai.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h index 34667209b607..066280953c85 100644 --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h @@ -72,13 +72,15 @@ /* SAI Transmit and Recieve Configuration 2 Register */ #define FSL_SAI_CR2_SYNC BIT(30) -#define FSL_SAI_CR2_MSEL_MASK (0xff << 26) +#define FSL_SAI_CR2_MSEL_MASK (0x3 << 26) #define FSL_SAI_CR2_MSEL_BUS 0 #define FSL_SAI_CR2_MSEL_MCLK1 BIT(26) #define FSL_SAI_CR2_MSEL_MCLK2 BIT(27) #define FSL_SAI_CR2_MSEL_MCLK3 (BIT(26) | BIT(27)) +#define FSL_SAI_CR2_MSEL(ID) ((ID) << 26) #define FSL_SAI_CR2_BCP BIT(25) #define FSL_SAI_CR2_BCD_MSTR BIT(24) +#define FSL_SAI_CR2_DIV_MASK 0xff /* SAI Transmit and Recieve Configuration 3 Register */ #define FSL_SAI_CR3_TRCE BIT(16) @@ -120,7 +122,7 @@ #define FSL_SAI_CLK_MAST2 2 #define FSL_SAI_CLK_MAST3 3 -#define FSL_SAI_MCLK_MAX 3 +#define FSL_SAI_MCLK_MAX 4 /* SAI data transfer numbers per DMA request */ #define FSL_SAI_MAXBURST_TX 6 @@ -132,11 +134,14 @@ struct fsl_sai { struct clk *bus_clk; struct clk *mclk_clk[FSL_SAI_MCLK_MAX]; + bool is_slave_mode; bool is_lsb_first; bool is_dsp_mode; bool sai_on_imx; bool synchronous[2]; + unsigned int mclk_id[2]; + unsigned int mclk_streams; struct snd_dmaengine_dai_dma_data dma_params_rx; struct snd_dmaengine_dai_dma_data dma_params_tx; }; |