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authorStefan Agner <stefan.agner@toradex.com>2015-02-02 15:56:32 +0100
committerStefan Agner <stefan.agner@toradex.com>2015-02-02 15:56:32 +0100
commit67bacaabc4e9cf5bade60354736d87a90325d5ec (patch)
tree1a584115adc173a91c1b818f44d5ef57ea2a8c68 /sound/soc/fsl/fsl_sai.h
parent43328a22788c8d856f30a9b0b909e00b7a0c6ecc (diff)
parent5757b6753c3290e7b7e8ce2047368eac572392ee (diff)
Merge branch 'vf610-ac97-sai' into toradex_vf_3.18-next
Diffstat (limited to 'sound/soc/fsl/fsl_sai.h')
-rw-r--r--sound/soc/fsl/fsl_sai.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 34667209b607..e77d38a7d117 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -47,6 +47,7 @@
/* SAI Transmit/Recieve Control Register */
#define FSL_SAI_CSR_TERE BIT(31)
+#define FSL_SAI_CSR_BCE BIT(28)
#define FSL_SAI_CSR_FR BIT(25)
#define FSL_SAI_CSR_SR BIT(24)
#define FSL_SAI_CSR_xF_SHIFT 16
@@ -71,7 +72,9 @@
#define FSL_SAI_CR1_RFW_MASK 0x1f
/* SAI Transmit and Recieve Configuration 2 Register */
+#define FSL_SAI_CR2_SYNC_MASK (0x3 << 30)
#define FSL_SAI_CR2_SYNC BIT(30)
+#define FSL_SAI_CR2_BCS BIT(29)
#define FSL_SAI_CR2_MSEL_MASK (0xff << 26)
#define FSL_SAI_CR2_MSEL_BUS 0
#define FSL_SAI_CR2_MSEL_MCLK1 BIT(26)
@@ -79,6 +82,8 @@
#define FSL_SAI_CR2_MSEL_MCLK3 (BIT(26) | BIT(27))
#define FSL_SAI_CR2_BCP BIT(25)
#define FSL_SAI_CR2_BCD_MSTR BIT(24)
+#define FSL_SAI_CR2_DIV_MASK 0xff
+#define FSL_SAI_CR2_DIV(x) (x & 0xff)
/* SAI Transmit and Recieve Configuration 3 Register */
#define FSL_SAI_CR3_TRCE BIT(16)
@@ -100,7 +105,7 @@
#define FSL_SAI_CR5_WNW_MASK (0x1f << 24)
#define FSL_SAI_CR5_W0W(x) (((x) - 1) << 16)
#define FSL_SAI_CR5_W0W_MASK (0x1f << 16)
-#define FSL_SAI_CR5_FBT(x) ((x) << 8)
+#define FSL_SAI_CR5_FBT(x) ((x - 1) << 8)
#define FSL_SAI_CR5_FBT_MASK (0x1f << 8)
/* SAI type */