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authorShengjiu Wang <shengjiu.wang@nxp.com>2018-06-12 15:46:27 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 15:54:19 +0800
commite3e48111d949a2ee17c24b5c91225afa28311ee7 (patch)
tree2bf91ba5e8d5cdcb17e8e31cf894458bf4e0676c /sound/soc/fsl/fsl_spdif.c
parent590ec64bb50a71c77b60b157d65b64846b56bb79 (diff)
MLK-18574: ASoC: fsl_spdif: specify the spdif in imx8mm
specify the spdif in imx8mm for the ipg clock is higher that it can support 192kHz Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Diffstat (limited to 'sound/soc/fsl/fsl_spdif.c')
-rw-r--r--sound/soc/fsl/fsl_spdif.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 668b9bad02ff..e31a134305c4 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -152,6 +152,16 @@ static struct fsl_spdif_soc_data fsl_spdif_imx8qm = {
.constrain_period_size = true,
};
+static struct fsl_spdif_soc_data fsl_spdif_imx8mm = {
+ .imx = true,
+ .tx_burst = FSL_SPDIF_TXFIFO_WML,
+ .rx_burst = FSL_SPDIF_RXFIFO_WML,
+ .interrupts = 1,
+ .tx_formats = FSL_SPDIF_FORMATS_PLAYBACK,
+ .rx_rates = (FSL_SPDIF_RATES_CAPTURE | SNDRV_PCM_RATE_192000),
+ .constrain_period_size = false,
+};
+
/* DPLL locked and lock loss interrupt handler */
static void spdif_irq_dpll_lock(struct fsl_spdif_priv *spdif_priv)
{
@@ -1262,6 +1272,7 @@ static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv,
}
static const struct of_device_id fsl_spdif_dt_ids[] = {
+ { .compatible = "fsl,imx8mm-spdif", .data = &fsl_spdif_imx8mm, },
{ .compatible = "fsl,imx8qm-spdif", .data = &fsl_spdif_imx8qm, },
{ .compatible = "fsl,imx35-spdif", .data = &fsl_spdif_imx35, },
{ .compatible = "fsl,vf610-spdif", .data = &fsl_spdif_vf610, },