diff options
| author | Viorel Suman <viorel.suman@nxp.com> | 2020-05-10 22:06:33 +0300 |
|---|---|---|
| committer | Viorel Suman <viorel.suman@nxp.com> | 2020-05-10 22:12:29 +0300 |
| commit | e8bc5163ce3ce6bc84fb22d74ceffa93ac14b87a (patch) | |
| tree | 6b8f528f6acbb1267b72811da195bedee63f3d6e /sound/soc/fsl/fsl_xcvr.h | |
| parent | 8618fe69cc5fa7e3f5d2733e630d4bc6696c66bb (diff) | |
ASoC: fsl_xcvr: use SAI PLL for SPDIF playback
Use SAI PLL for SPDIF playback in order to allow
full duplex mode.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Diffstat (limited to 'sound/soc/fsl/fsl_xcvr.h')
| -rw-r--r-- | sound/soc/fsl/fsl_xcvr.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/sound/soc/fsl/fsl_xcvr.h b/sound/soc/fsl/fsl_xcvr.h index 162dc26bec9d..98b8bca99fe0 100644 --- a/sound/soc/fsl/fsl_xcvr.h +++ b/sound/soc/fsl/fsl_xcvr.h @@ -182,7 +182,7 @@ #define FSL_XCVR_RX_DPTH_CTRL_LAYB_MODE BIT(27) #define FSL_XCVR_RX_DPTH_CTRL_PRC BIT(28) #define FSL_XCVR_RX_DPTH_CTRL_COMP BIT(29) -#define FSL_XCVR_RX_DPTH_CTRL_FSM GENMASK(31,30) +#define FSL_XCVR_RX_DPTH_CTRL_FSM GENMASK(31, 30) #define FSL_XCVR_TX_DPTH_CTRL_CS_ACK BIT(0) #define FSL_XCVR_TX_DPTH_CTRL_UD_ACK BIT(1) @@ -199,7 +199,7 @@ #define FSL_XCVR_TX_DPTH_CTRL_ADD_CYC_TX_OE_STR BIT(15) #define FSL_XCVR_TX_DPTH_CTRL_ADD_CYC_TX_OE_END BIT(16) #define FSL_XCVR_TX_DPTH_CTRL_CLK_RATIO BIT(29) -#define FSL_XCVR_TX_DPTH_CTRL_TM_NO_PRE_BME GENMASK(31,30) +#define FSL_XCVR_TX_DPTH_CTRL_TM_NO_PRE_BME GENMASK(31, 30) #define FSL_XCVR_PHY_AI_CTRL_AI_RESETN BIT(15) @@ -225,9 +225,12 @@ #define FSL_XCVR_PHY_CTRL_PHY_EN BIT(0) #define FSL_XCVR_PHY_CTRL_TSDIFF_OE BIT(5) #define FSL_XCVR_PHY_CTRL_SPDIF_EN BIT(8) +#define FSL_XCVR_PHY_CTRL_TX_CLK_MASK GENMASK(26, 25) +#define FSL_XCVR_PHY_CTRL_TX_CLK_HDMI_SS BIT(25) +#define FSL_XCVR_PHY_CTRL_TX_CLK_AUD_SS BIT(26) #define FSL_XCVR_PHY_CTRL2_EARC_TXMS BIT(14) -#define FSL_XCVR_CS_DATA_0_FS_MASK GENMASK(31,24) +#define FSL_XCVR_CS_DATA_0_FS_MASK GENMASK(31, 24) #define FSL_XCVR_CS_DATA_0_FS_32000 0x3000000 #define FSL_XCVR_CS_DATA_0_FS_44100 0x0000000 #define FSL_XCVR_CS_DATA_0_FS_48000 0x2000000 |