diff options
| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2018-11-02 17:47:51 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 15:52:38 +0800 |
| commit | 10fa83ab64fa920a3fa6f627db40e4e6c64ba9b6 (patch) | |
| tree | e4a2e2af6e126b46feca5debee239cb41bb5f89d /sound/soc/fsl/imx-cdnhdmi.c | |
| parent | 2c5a729e00688faecfbacece5b01b87a194a3469 (diff) | |
MLK-20183-2: ASoC: imx-cdnhdmi: reconfigure the mclk for HDMI on imx8mq
In order to support 44kHz and 48kHz sample rate together, we need to
reconfigure the parent clock of mclk.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Diffstat (limited to 'sound/soc/fsl/imx-cdnhdmi.c')
| -rw-r--r-- | sound/soc/fsl/imx-cdnhdmi.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/sound/soc/fsl/imx-cdnhdmi.c b/sound/soc/fsl/imx-cdnhdmi.c index ba0b32f21d9d..8dc9953a26a0 100644 --- a/sound/soc/fsl/imx-cdnhdmi.c +++ b/sound/soc/fsl/imx-cdnhdmi.c @@ -23,6 +23,7 @@ #include <sound/soc-dapm.h> #include <sound/hdmi-codec.h> #include "../../../drivers/gpu/drm/imx/hdp/imx-hdp.h" +#include "fsl_sai.h" #define SUPPORT_RATE_NUM 10 #define SUPPORT_CHANNEL_NUM 10 @@ -98,7 +99,16 @@ static int imx_cdnhdmi_hw_params(struct snd_pcm_substream *substream, return ret; } - ret = snd_soc_dai_set_sysclk(cpu_dai, 0, 0, tx ? SND_SOC_CLOCK_OUT : SND_SOC_CLOCK_IN); + + if (of_device_is_compatible(dev->of_node, + "fsl,imx8mq-evk-cdnhdmi")) + ret = snd_soc_dai_set_sysclk(cpu_dai, FSL_SAI_CLK_MAST1, + 256 * params_rate(params), + SND_SOC_CLOCK_OUT); + else + ret = snd_soc_dai_set_sysclk(cpu_dai, 0, + 0, + tx ? SND_SOC_CLOCK_OUT : SND_SOC_CLOCK_IN); if (ret) { dev_err(dev, "failed to set cpu sysclk: %d\n", ret); return ret; @@ -516,6 +526,7 @@ fail: } static const struct of_device_id imx_cdnhdmi_dt_ids[] = { + { .compatible = "fsl,imx8mq-evk-cdnhdmi", }, { .compatible = "fsl,imx-audio-cdnhdmi", }, { /* sentinel */ } }; |