diff options
| author | Shengjiu Wang <shengjiu.wang@freescale.com> | 2015-06-08 15:55:04 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 15:49:52 +0800 |
| commit | 532bc92ed2d09f7eb4a12d8abe0bb71851c0ea3e (patch) | |
| tree | d5245121a1e96c41a813e5196436b5488331e682 /sound/soc/fsl/imx-mqs.c | |
| parent | 288a1ac19ca9bb3d21111d4284f704c27546969b (diff) | |
MLK-11053: ASoC: imx_mqs: Remove 96k and 192k support for mqs
If the mclk is 24.576MHz, mqs can't support 96k and 192kHz, because
the we can't get a proper clock divider for mqs.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Diffstat (limited to 'sound/soc/fsl/imx-mqs.c')
| -rw-r--r-- | sound/soc/fsl/imx-mqs.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/sound/soc/fsl/imx-mqs.c b/sound/soc/fsl/imx-mqs.c index cb94e53a32dc..22f3ea3d74d7 100644 --- a/sound/soc/fsl/imx-mqs.c +++ b/sound/soc/fsl/imx-mqs.c @@ -40,10 +40,8 @@ static int imx_mqs_startup(struct snd_pcm_substream *substream) if (priv->mclk_freq == 24576000) { support_rates[0] = 48000; - support_rates[1] = 96000; - support_rates[2] = 192000; constraint_rates.list = support_rates; - constraint_rates.count = 3; + constraint_rates.count = 1; ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &constraint_rates); |