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authorDong Aisheng <dong.aisheng@linaro.org>2012-07-20 17:20:25 +0800
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-07-24 20:18:18 +0100
commitd0ba4c014934cb56f1eabb481ff8026b6d49d33c (patch)
tree73d307109dfaa4fa1b692641ee52d4c8e052ed80 /sound/soc/mxs
parentc2e1d9073fc98f471067c0257a31b4818306ebe1 (diff)
ASoC: mxs-saif: set a base clock rate for EXTMASTER mode work
Set an initial clock rate for the saif internal logic to work properly. This is important when working in EXTMASTER mode that uses the other saif's BITCLK&LRCLK but it still needs a basic clock which should be fast enough for the internal logic. Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/mxs')
-rw-r--r--sound/soc/mxs/mxs-saif.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c
index fdbb36aa9cf5..b3030718c228 100644
--- a/sound/soc/mxs/mxs-saif.c
+++ b/sound/soc/mxs/mxs-saif.c
@@ -427,8 +427,22 @@ static int mxs_saif_hw_params(struct snd_pcm_substream *substream,
/* prepare clk in hw_param, enable in trigger */
clk_prepare(saif->clk);
- if (saif != master_saif)
+ if (saif != master_saif) {
+ /*
+ * Set an initial clock rate for the saif internal logic to work
+ * properly. This is important when working in EXTMASTER mode
+ * that uses the other saif's BITCLK&LRCLK but it still needs a
+ * basic clock which should be fast enough for the internal
+ * logic.
+ */
+ clk_enable(saif->clk);
+ ret = clk_set_rate(saif->clk, 24000000);
+ clk_disable(saif->clk);
+ if (ret)
+ return ret;
+
clk_prepare(master_saif->clk);
+ }
scr = __raw_readl(saif->base + SAIF_CTRL);