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authorNicolin Chen <b42378@freescale.com>2013-04-02 15:27:01 +0800
committerNicolin Chen <b42378@freescale.com>2013-04-02 21:00:13 +0800
commit739325483d12276b80b34d7916e6cdb6d8774900 (patch)
treeed951e8f479b1c88273b1df9652edb899066bfee /sound/soc
parent80dd80156772ff155aaf5420e41346674a9521f0 (diff)
ENGR00256933 ASoC: WM8962: Add delay after FLL-enable
There's a start-up time after FLL_ENA bit is set. While the driver didn't run the delay code which already exists in the set_fll() function. This patch let the driver run into the delay section, and made it work more perfectly. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <b42378@freescale.com>
Diffstat (limited to 'sound/soc')
-rw-r--r--sound/soc/codecs/wm8962.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index 969479c09aec..3ec5cc7e06c4 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -3430,6 +3430,8 @@ static int wm8962_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
WM8962_FLL_FRAC | WM8962_FLL_REFCLK_SRC_MASK |
WM8962_FLL_ENA, fll1 | WM8962_FLL_ENA);
+ fll1 |= WM8962_FLL_ENA;
+
dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout);
ret = 0;