diff options
| author | Rahool Paliwal <rpaliwal@nvidia.com> | 2014-07-24 21:24:30 +0530 |
|---|---|---|
| committer | Matthew Pedro <mapedro@nvidia.com> | 2014-08-06 10:40:26 -0700 |
| commit | a9cf57c92ca7044a9854f707220bf0cefc704d54 (patch) | |
| tree | be3a8843cef99a74efc899c698de807be6db5459 /sound | |
| parent | 48a336337e8c2a006c35b6845fe34040521ef4d2 (diff) | |
kernel: make controls access read only
This makes controls HDA Decode Capability, HDA Maximum PCM Channels
for HDA and AVP DMA channel id for Tegra Soc read only.
Bug 200023797
Change-Id: I3271470354b02f3d1b3aab8fa3963ad19d281f41
Signed-off-by: Rahool Paliwal <rpaliwal@nvidia.com>
Reviewed-on: http://git-master/r/441855
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/pci/hda/hda_codec.c | 2 | ||||
| -rw-r--r-- | sound/soc/tegra/tegra_asoc_utils.c | 11 |
2 files changed, 11 insertions, 2 deletions
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 8f212c6eecb8..7286a59a248f 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -3337,12 +3337,14 @@ static struct snd_kcontrol_new dig_mixes[] = { .put = snd_hda_spdif_out_switch_put, }, { + .access = SNDRV_CTL_ELEM_ACCESS_READ, .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "HDA Decode Capability", .info = snd_hda_hdmi_decode_info, .get = snd_hda_hdmi_decode_get, }, { + .access = SNDRV_CTL_ELEM_ACCESS_READ, .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "HDA Maximum PCM Channels", .info = snd_hda_max_pcm_ch_info, diff --git a/sound/soc/tegra/tegra_asoc_utils.c b/sound/soc/tegra/tegra_asoc_utils.c index 52e898983198..f6d0d422779c 100644 --- a/sound/soc/tegra/tegra_asoc_utils.c +++ b/sound/soc/tegra/tegra_asoc_utils.c @@ -321,8 +321,15 @@ static int tegra_set_i2sloopback(struct snd_kcontrol *kcontrol, struct snd_kcontrol_new tegra_avp_controls[] = { SOC_SINGLE_EXT("AVP alsa device select", 0, 0, TEGRA_ALSA_MAX_DEVICES, \ 0, tegra_get_avp_device, tegra_set_avp_device), - SOC_SINGLE_EXT("AVP DMA channel id", 0, 0, TEGRA_DMA_MAX_CHANNELS, \ - 0, tegra_get_dma_ch_id, NULL), + { + .name = "AVP DMA channel id", \ + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ + .info = snd_soc_info_volsw, \ + .access = SNDRV_CTL_ELEM_ACCESS_READ, \ + .get = tegra_get_dma_ch_id, \ + .private_value = SOC_SINGLE_VALUE(0, 0, \ + TEGRA_DMA_MAX_CHANNELS, 0) + }, SOC_SINGLE_EXT("AVP DMA address", 0, 0, 0xFFFFFFFF, \ 0, tegra_get_dma_addr, tegra_set_dma_addr), }; |