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authorRanjani Vaidyanathan <ra5478@freescale.com>2012-02-07 14:34:13 -0600
committerRanjani Vaidyanathan <ra5478@freescale.com>2012-04-13 18:54:12 -0500
commit8f0c21e06d4f7d0c7c078d6261ccd75f2a45c3ab (patch)
tree4e7a19151f7d78e74f3d2ba33eabec4753b07ed6 /sound
parent143b515abb8c2bf154bdabd01c5b544e56335fd6 (diff)
ENGR00179574: MX6- Add bus frequency scaling support
Add support for scaling the bus frequency (both DDR and ahb_clk). The DDR and AHB_CLK are dropped to 24MHz when all devices that need high AHB frequency are disabled and the CORE frequency is at the lowest setpoint. The DDR is dropped to 400MHz for the video playback usecase. In this mode the GPU, FEC, SATA etc are disabled. To scale the bus frequency, its necessary that all cores except the core that is executing the DDR frequency change are in WFE. This is achieved by generating interrupts on un-used interrupts (Int no 139, 144, 145 and 146). Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Diffstat (limited to 'sound')
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