diff options
author | Jon Mayo <jmayo@nvidia.com> | 2012-12-06 17:19:51 -0800 |
---|---|---|
committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-12-17 06:48:01 -0800 |
commit | 59d47b2fd4315d831095785a1257e77435d1c028 (patch) | |
tree | cfbf28e3c5644572f768c90ca85fa1e28a07241b /sound | |
parent | fd78cf164f40f436818d084565c50e3ca7d5185f (diff) |
ALSA: hda: powergate HDA when clock gating
Use powergating APIs to ensure that HDA and display play nice.
Export powergate APIs so snd-intel-hda can be built as a module.
Bug 1178366
Change-Id: I30559b9288fcbd86615a674756e70f04c9fb5d83
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/169245
Reviewed-by: Automatic_Commit_Validation_User
(cherry picked from commit ca49eeb9b0722505194635d68a7ed7a2b3a343b6)
Reviewed-on: http://git-master/r/171205
Diffstat (limited to 'sound')
-rw-r--r-- | sound/pci/hda/hda_intel.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 1ac4ca1725ac..dad3a165da0b 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -59,6 +59,9 @@ #ifdef CONFIG_SND_HDA_VPR #include <linux/nvmap.h> #endif +#ifdef CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA +#include <mach/powergate.h> +#endif static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; @@ -1368,10 +1371,17 @@ static void azx_platform_enable_clocks(struct azx *chip) { int i; +#ifdef CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA +#if defined(CONFIG_ARCH_TEGRA_11x_SOC) + tegra_unpowergate_partition(TEGRA_POWERGATE_DISB); +#endif +#endif + for (i = 0; i < chip->platform_clk_count; i++) clk_enable(chip->platform_clks[i]); chip->platform_clk_enable++; + } static void azx_platform_disable_clocks(struct azx *chip) @@ -1384,6 +1394,12 @@ static void azx_platform_disable_clocks(struct azx *chip) for (i = 0; i < chip->platform_clk_count; i++) clk_disable(chip->platform_clks[i]); +#ifdef CONFIG_SND_HDA_PLATFORM_NVIDIA_TEGRA +#if defined(CONFIG_ARCH_TEGRA_11x_SOC) + tegra_powergate_partition(TEGRA_POWERGATE_DISB); +#endif +#endif + chip->platform_clk_enable--; } #endif /* CONFIG_SND_HDA_PLATFORM_DRIVER */ |