diff options
| author | Fabio Estevam <fabio.estevam@freescale.com> | 2013-07-04 20:01:03 -0300 |
|---|---|---|
| committer | Ben Hutchings <ben@decadent.org.uk> | 2013-08-02 22:14:54 +0200 |
| commit | 4e36209d42a6a0ecff2fefddadf64985d6d005e5 (patch) | |
| tree | bae203f2d093212126be94ecdd7c96668bc249a7 /sound | |
| parent | 95d909e86710aa3f055812b7134c4a568c38fc4c (diff) | |
ASoC: sglt5000: Fix SGTL5000_PLL_FRAC_DIV_MASK
commit 5c78dfe87ea04b501ee000a7f03b9432ac9d008c upstream.
SGTL5000_PLL_FRAC_DIV_MASK is used to mask bits 0-10 (11 bits in total) of
register CHIP_PLL_CTRL, so fix the mask to accomodate all this bit range.
Reported-by: Oskar Schirmer <oskar@scara.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/codecs/sgtl5000.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/codecs/sgtl5000.h b/sound/soc/codecs/sgtl5000.h index 8a9f43534b79..d3a68bbfea00 100644 --- a/sound/soc/codecs/sgtl5000.h +++ b/sound/soc/codecs/sgtl5000.h @@ -347,7 +347,7 @@ #define SGTL5000_PLL_INT_DIV_MASK 0xf800 #define SGTL5000_PLL_INT_DIV_SHIFT 11 #define SGTL5000_PLL_INT_DIV_WIDTH 5 -#define SGTL5000_PLL_FRAC_DIV_MASK 0x0700 +#define SGTL5000_PLL_FRAC_DIV_MASK 0x07ff #define SGTL5000_PLL_FRAC_DIV_SHIFT 0 #define SGTL5000_PLL_FRAC_DIV_WIDTH 11 |