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authorShengjiu Wang <shengjiu.wang@freescale.com>2016-02-04 15:07:57 +0800
committerOctavian Purdila <octavian.purdila@nxp.com>2017-02-23 15:20:53 +0200
commit29f13b1513c6f4ef3c6f7b1cab67180c4d7d75df (patch)
tree70b7276b7760fbd8e8372bbfcbe640a968350203 /sound
parent267e9532298c8808f4b512ca8c2e7c8b1fb67562 (diff)
MLK-12374: ASoC: fsl_sai: Change the dev_warn to dev_dbg
When audio stop, it will first stop dma, then stop cpu_dai. If there is delay between dma stop and cpu dai stop, there will be underrun error, the print will cost time, then will cause another underrun error, it is a infinite loop. Which will cause the cpu dai can't stop. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/fsl/fsl_sai.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 357ccc80888c..2fc0caaca87b 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -1,7 +1,7 @@
/*
* Freescale ALSA SoC Digital Audio Interface (SAI) driver.
*
- * Copyright 2012-2015 Freescale Semiconductor, Inc.
+ * Copyright 2012-2016 Freescale Semiconductor, Inc.
*
* This program is free software, you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -70,10 +70,10 @@ static irqreturn_t fsl_sai_isr(int irq, void *devid)
dev_dbg(dev, "isr: Start of Tx word detected\n");
if (flags & FSL_SAI_CSR_SEF)
- dev_warn(dev, "isr: Tx Frame sync error detected\n");
+ dev_dbg(dev, "isr: Tx Frame sync error detected\n");
if (flags & FSL_SAI_CSR_FEF) {
- dev_warn(dev, "isr: Transmit underrun detected\n");
+ dev_dbg(dev, "isr: Transmit underrun detected\n");
/* FIFO reset for safety */
xcsr |= FSL_SAI_CSR_FR;
}
@@ -104,10 +104,10 @@ irq_rx:
dev_dbg(dev, "isr: Start of Rx word detected\n");
if (flags & FSL_SAI_CSR_SEF)
- dev_warn(dev, "isr: Rx Frame sync error detected\n");
+ dev_dbg(dev, "isr: Rx Frame sync error detected\n");
if (flags & FSL_SAI_CSR_FEF) {
- dev_warn(dev, "isr: Receive overflow detected\n");
+ dev_dbg(dev, "isr: Receive overflow detected\n");
/* FIFO reset for safety */
xcsr |= FSL_SAI_CSR_FR;
}