diff options
| author | Takashi Iwai <tiwai@suse.de> | 2011-07-05 07:33:06 +0200 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2011-07-05 07:33:06 +0200 |
| commit | 63bc9750167ac765827470aa5aed1e79aeaaad9e (patch) | |
| tree | f9e352364314f2bcb4e450a148f7ee95b2313c70 /sound | |
| parent | 53dea36c70c1857149a8c447224e3936eb8b5339 (diff) | |
| parent | 9fb352b18b11124ed1ddebc0d74ebbd7ba8defd7 (diff) | |
Merge branch 'for-3.0' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/asoc-2.6 into fix/asoc
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/codecs/tlv320aic26.c | 14 | ||||
| -rw-r--r-- | sound/soc/codecs/tlv320aic3x.c | 9 |
2 files changed, 19 insertions, 4 deletions
diff --git a/sound/soc/codecs/tlv320aic26.c b/sound/soc/codecs/tlv320aic26.c index e2a7608d3944..7859bdcc93db 100644 --- a/sound/soc/codecs/tlv320aic26.c +++ b/sound/soc/codecs/tlv320aic26.c @@ -161,10 +161,18 @@ static int aic26_hw_params(struct snd_pcm_substream *substream, dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL; } - /* Configure PLL */ + /** + * Configure PLL + * fsref = (mclk * PLLM) / 2048 + * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal) + */ pval = 1; - jval = (fsref == 44100) ? 7 : 8; - dval = (fsref == 44100) ? 5264 : 1920; + /* compute J portion of multiplier */ + jval = fsref / (aic26->mclk / 2048); + /* compute fractional DDDD component of multiplier */ + dval = fsref - (jval * (aic26->mclk / 2048)); + dval = (10000 * dval) / (aic26->mclk / 2048); + dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval); qval = 0; reg = 0x8000 | qval << 11 | pval << 8 | jval << 2; aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg); diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c index c3d96fc8c267..789453d44ec5 100644 --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c @@ -1114,12 +1114,19 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power) /* Sync reg_cache with the hardware */ codec->cache_only = 0; - for (i = 0; i < ARRAY_SIZE(aic3x_reg); i++) + for (i = AIC3X_SAMPLE_RATE_SEL_REG; i < ARRAY_SIZE(aic3x_reg); i++) snd_soc_write(codec, i, cache[i]); if (aic3x->model == AIC3X_MODEL_3007) aic3x_init_3007(codec); codec->cache_sync = 0; } else { + /* + * Do soft reset to this codec instance in order to clear + * possible VDD leakage currents in case the supply regulators + * remain on + */ + snd_soc_write(codec, AIC3X_RESET, SOFT_RESET); + codec->cache_sync = 1; aic3x->power = 0; /* HW writes are needless when bias is off */ codec->cache_only = 1; |