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authorArnaldo Carvalho de Melo <acme@redhat.com>2016-07-15 10:08:43 -0300
committerArnaldo Carvalho de Melo <acme@redhat.com>2016-07-15 10:08:43 -0300
commit0d203166de37ad50ea826f97570b3a2beea87c9d (patch)
tree8f21ed251ba09bcffb05f11bf8cf02ad9ef41c54 /tools/lib/api
parent8811e8ea14c1056b09c794c67836b8a84584ddef (diff)
perf tools: Bail out at "--sort dcacheline" and cacheline_size not known
There are cases where further work would be needed to overcome the fact that neither sysconf(_SC_LEVEL1_DCACHE_LINESIZE) nor /sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size are available in some systems (Android, for instance), so bail out when such a situation takes place. Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Wang Nan <wangnan0@huawei.com> Link: http://lkml.kernel.org/n/tip-ho8d8g8mh0o2dri7ckcccafi@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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