diff options
author | Len Brown <len.brown@intel.com> | 2012-10-06 15:26:31 -0400 |
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committer | Len Brown <len.brown@intel.com> | 2012-10-06 15:26:31 -0400 |
commit | f9240813e61cb3e5838c9ab0237af831c61df7cf (patch) | |
tree | 8408a94902f3247f7feeca042a9283f6c5280e34 /tools/power/x86/turbostat/turbostat.8 | |
parent | 8e180f3cb6b7510a3bdf14e16ce87c9f5d86f102 (diff) |
tools/power/turbostat: add option to count SMIs, re-name some options
Counting SMIs is popular, so add a dedicated "-s" option to do it,
and juggle some of the other option letters.
-S is now system summary (was -s)
-c is 32 bit counter (was -d)
-C is 64-bit counter (was -D)
-p is 1st thread in core (was -c)
-P is 1st thread in package (was -p)
bump the minor version number
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'tools/power/x86/turbostat/turbostat.8')
-rw-r--r-- | tools/power/x86/turbostat/turbostat.8 | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8 index 0fc7a11f300e..e4d0690cccf9 100644 --- a/tools/power/x86/turbostat/turbostat.8 +++ b/tools/power/x86/turbostat/turbostat.8 @@ -23,17 +23,19 @@ supports an "invariant" TSC, plus the APERF and MPERF MSRs. on processors that additionally support C-state residency counters. .SS Options -The \fB-s\fP option limits output to a 1-line system summary for each interval. +The \fB-p\fP option limits output to the 1st thread in 1st core of each package. .PP -The \fB-c\fP option limits output to the 1st thread in each core. +The \fB-P\fP option limits output to the 1st thread in each Package. .PP -The \fB-p\fP option limits output to the 1st thread in each package. +The \fB-S\fP option limits output to a 1-line System Summary for each interval. .PP The \fB-v\fP option increases verbosity. .PP -The \fB-d MSR#\fP option includes the delta of the specified 32-bit MSR counter. +The \fB-s\fP option prints the SMI counter, equivalent to "-c 0x34" .PP -The \fB-D MSR#\fP option includes the delta of the specified 64-bit MSR counter. +The \fB-c MSR#\fP option includes the delta of the specified 32-bit MSR counter. +.PP +The \fB-C MSR#\fP option includes the delta of the specified 64-bit MSR counter. .PP The \fB-m MSR#\fP option includes the the specified 32-bit MSR value. .PP |