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authorChen-Yu Tsai <wens@csie.org>2015-03-25 01:22:07 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-03-25 11:46:32 -0700
commit934fe5f48ae52841f8a5f5e0411147a8ccd171c1 (patch)
treefb00b27ce88966a502c5c58e9af7558d9c6f4d31 /tools
parentb712a623bd5c3b04b005e757945d43441e0aa4a8 (diff)
clk: sunxi: Make divs clocks specify which output is the base factor clock
The current sunxi clock driver has the base factor clock of divs clocks as the last clock output of the clock node. This makes it rather difficult to add new outputs, such as fixed dividers, which were previously unknown. This patch makes the divs clocks data structure specify which output is the factor clock, and updates all current divs clocks accordingly. We can then add new outputs after the factor clocks, at least not breaking backward compatibility with regards to the devicetree bindings. Also replace kzalloc with kcalloc in sunxi_divs_clk_setup(). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'tools')
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