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authorSuzuki K. Poulose <suzuki.poulose@arm.com>2015-05-26 10:53:15 +0100
committerArnd Bergmann <arnd@arndb.de>2015-05-29 16:43:51 +0200
commita95791efa72a08d3824713a75235d0407c0715dc (patch)
tree0d21aded97664e3911753c90a485d00e56681faf /virt/kvm
parentf4d58938adb15ec961e3f694edaffdfcb5758635 (diff)
arm-cci: Add CCI-500 PMU support
CCI-500 provides 8 event counters which can count any of the supported events independently. The PMU event id is a 9-bit value made of two parts. bits [8:5] - Source port 0x0-0x6 Slave Ports 0x8-0xD Master Ports 0xf Global Events to CCI 0x7,0xe Reserved bits [0:4] - Event code (specific to each type of port) The generic CCI-500 controlling interface remains the same with CCI-400. However there are some differences in the PMU event counters. - No cycle counter - Upto 8 counters(4 in CCI-400) - Each counter area is 64K(4K in CCI400) - The counter0 starts at offset 0x10000 from the base of CCI Cc: Punit Agrawal <punit.agrawal@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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