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-rw-r--r--arch/arm/mach-mvf/board-twr-vf700.c65
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mvf.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/spi-mvf.h4
3 files changed, 42 insertions, 29 deletions
diff --git a/arch/arm/mach-mvf/board-twr-vf700.c b/arch/arm/mach-mvf/board-twr-vf700.c
index 4b5e7cd7024c..c672fb3103b5 100644
--- a/arch/arm/mach-mvf/board-twr-vf700.c
+++ b/arch/arm/mach-mvf/board-twr-vf700.c
@@ -105,13 +105,13 @@ static iomux_v3_cfg_t mvf600_pads[] = {
/*CAN1*/
MVF600_PAD38_PTB16__CAN1_RX,
MVF600_PAD39_PTB17__CAN1_TX,
-
+#endif
/*DSPI0*/
MVF600_PAD41_PTB19__DSPI0_PCS0,
MVF600_PAD42_PTB20__DSPI0_SIN,
MVF600_PAD43_PTB21__DSPI0_SOUT,
MVF600_PAD44_PTB22__DSPI0_SCK,
-#endif
+
/*FEC0*/
MVF600_PAD0_PTA6__RMII_CLKIN,
MVF600_PAD45_PTC0__RMII0_MDC,
@@ -242,35 +242,47 @@ static struct fec_platform_data fec_data __initdata = {
.phy = PHY_INTERFACE_MODE_RMII,
};
-static int mvf_vf700_spi_cs[] = {
+static int mvf_vf600_spi_cs[] = {
+ 134,
};
-static const struct spi_mvf_master mvf_vf700_spi_data __initconst = {
+static const struct spi_mvf_master mvf_vf600_spi_data __initconst = {
.bus_num = 0,
- .chipselect = mvf_vf700_spi_cs,
- .num_chipselect = ARRAY_SIZE(mvf_vf700_spi_cs),
+ .chipselect = mvf_vf600_spi_cs,
+ .num_chipselect = ARRAY_SIZE(mvf_vf600_spi_cs),
.cs_control = NULL,
};
#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
-static struct mtd_partition m25p32_partitions[] = {
+static struct mtd_partition at26df081a_partitions[] = {
{
- .name = "bootloader",
- .offset = 0,
- .size = 0x00040000,
- },
- {
- .name = "kernel",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- },
+ .name = "at26df081a",
+ .size = (1024 * 64 * 16),
+ .offset = 0x00000000,
+ .mask_flags = 0,
+ }
};
-static struct flash_platform_data m25p32_spi_flash_data = {
- .name = "m25p32",
- .parts = m25p32_partitions,
- .nr_parts = ARRAY_SIZE(m25p32_partitions),
- .type = "m25p32",
+static struct flash_platform_data at26df081a_platform_data = {
+ .name = "Atmel at26df081a SPI Flash chip",
+ .parts = at26df081a_partitions,
+ .nr_parts = ARRAY_SIZE(at26df081a_partitions),
+ .type = "at26df081a",
+};
+
+static struct spi_mvf_chip at26df081a_chip_info = {
+ .mode = SPI_MODE_3,
+ .bits_per_word = 8,
+ .void_write_data = 0,
+ .dbr = 0,
+ .pbr = 0,
+ .br = 0,
+ .pcssck = 0,
+ .pasc = 0,
+ .pdt = 0,
+ .cssck = 0,
+ .asc = 0,
+ .dt = 0,
};
#endif
@@ -279,10 +291,11 @@ static struct spi_board_info mvf_spi_board_info[] __initdata = {
{
/* The modalias must be the same as spi device driver name */
.modalias = "m25p80",
- .max_speed_hz = 20000000,
+ .max_speed_hz = 16000000,
.bus_num = 0,
.chip_select = 0,
- .platform_data = &m25p32_spi_flash_data,
+ .platform_data = &at26df081a_platform_data,
+ .controller_data = &at26df081a_chip_info
},
#endif
};
@@ -382,10 +395,10 @@ static void __init mvf_board_init(void)
mvf_add_imx_i2c(0, &mvf600_i2c_data);
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
-#if 0
- mvf_add_dspi(0, &mvf_vf700_spi_data);
+
+ mvf_add_dspi(0, &mvf_vf600_spi_data);
spi_device_init();
-#endif
+
mvfa5_add_dcu(0, &mvf_dcu_pdata);
mxc_register_device(&mvf_twr_audio_device, &mvf_twr_audio_data);
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mvf.h b/arch/arm/plat-mxc/include/mach/iomux-mvf.h
index 775b0eb5d484..3c46ad41e8eb 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mvf.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mvf.h
@@ -118,7 +118,7 @@ typedef enum iomux_config {
MVF600_DSPI_PAD_CTRL | PAD_CTL_OBE_ENABLE)
#define MVF600_PAD44_PTB22__DSPI0_SCK \
IOMUX_PAD(0x00B0, 0x00B0, 1, 0x0000, 0, \
- MVF600_DSPI_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE)
+ MVF600_DSPI_PAD_CTRL | PAD_CTL_OBE_ENABLE)
/*FEC0*/
#define MVF600_PAD0_PTA6__RMII_CLKIN \
diff --git a/arch/arm/plat-mxc/include/mach/spi-mvf.h b/arch/arm/plat-mxc/include/mach/spi-mvf.h
index 4db9f9502661..4a05f3b349af 100644
--- a/arch/arm/plat-mxc/include/mach/spi-mvf.h
+++ b/arch/arm/plat-mxc/include/mach/spi-mvf.h
@@ -71,7 +71,7 @@ struct spi_mvf_master {
#define SPI_PUSHR_CTAS(x) (((x) & 0x00000007) << 28)
#define SPI_PUSHR_EOQ (1 << 27)
#define SPI_PUSHR_CTCNT (1 << 26)
-#define SPI_PUSHR_PCS(x) (((x) & 0x0000003f) << 16)
+#define SPI_PUSHR_PCS(x) (((1 << x) & 0x0000003f) << 16)
#define SPI_PUSHR_TXDATA(x) ((x) & 0x0000ffff)
#define SPI_PUSHR_SLAVE 0x34
@@ -91,7 +91,7 @@ struct spi_mvf_master {
#define SPI_FRAME_BITS SPI_CTAR_FMSZ(0xf)
#define SPI_FRAME_BITS_16 SPI_CTAR_FMSZ(0xf)
-#define SPI_FRAME_BITS_8 SPI_CTAR_FMSZ(0xf)
+#define SPI_FRAME_BITS_8 SPI_CTAR_FMSZ(0x7)
#define SPI_CS_INIT 0x01
#define SPI_CS_ASSERT 0x02