diff options
-rw-r--r-- | arch/arm/mach-tegra/board-ardbeg-power.c | 17 | ||||
-rw-r--r-- | arch/arm64/boot/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm64/boot/dts/tegra132-bowmore-e1973-1000-a01-01.dts | 134 |
3 files changed, 149 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/board-ardbeg-power.c b/arch/arm/mach-tegra/board-ardbeg-power.c index 8f28b22770da..a5343abdd1da 100644 --- a/arch/arm/mach-tegra/board-ardbeg-power.c +++ b/arch/arm/mach-tegra/board-ardbeg-power.c @@ -166,11 +166,12 @@ static struct tegra_cl_dvfs_cfg_param e1733_ardbeg_cl_dvfs_param = { /* E1733 volatge map. Fixed 10mv steps from 700mv to 1400mv */ #define E1733_CPU_VDD_MAP_SIZE ((1400000 - 700000) / 10000 + 1) static struct voltage_reg_map e1733_cpu_vdd_map[E1733_CPU_VDD_MAP_SIZE]; -static inline void e1733_fill_reg_map(void) +static inline void e1733_fill_reg_map(int minor_ver) { int i; + int reg_init_value = (minor_ver == 2) ? 0x1e : 0xa; for (i = 0; i < E1733_CPU_VDD_MAP_SIZE; i++) { - e1733_cpu_vdd_map[i].reg_value = i + 0xa; + e1733_cpu_vdd_map[i].reg_value = i + reg_init_value; e1733_cpu_vdd_map[i].reg_uV = 700000 + 10000 * i; } } @@ -252,7 +253,17 @@ static int __init ardbeg_cl_dvfs_init(struct board_info *pmu_board_info) if (pmu_board_id == BOARD_E1733) { - e1733_fill_reg_map(); + int minor_ver = 1; + + if ((pmu_board_info->major_revision == 'F') && + (pmu_board_info->minor_revision == 0x2)) { + pr_err("AMS PMIC version 1V2\n"); + minor_ver = 2; + } else { + minor_ver = 1; + pr_err("AMS PMIC version 1V2\n"); + } + e1733_fill_reg_map(minor_ver); data = &e1733_cl_dvfs_data; } diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index 7f164b2ce981..cc2fdb613452 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -8,6 +8,7 @@ dtb-$(CONFIG_MACH_T132REF) += tegra132-norrin-pm374-0001-a01-00.dtb dtb-$(CONFIG_MACH_T132REF) += tegra132-laguna.dtb dtb-$(CONFIG_MACH_T132REF) += tegra132-bowmore-ers-s.dtb dtb-$(CONFIG_MACH_T132REF) += tegra132-bowmore-e1973-1000-a01-00.dtb +dtb-$(CONFIG_MACH_T132REF) += tegra132-bowmore-e1973-1000-a01-01.dtb dtb-$(CONFIG_MACH_T132REF) += tegra132-bowmore-ers.dtb dtb-$(CONFIG_MACH_T132REF) += tegra132-bowmore-e1971-1100-a00-00.dtb dtb-$(CONFIG_MACH_T132REF) += tegra132-bowmore-e1971-1100-a00-00-powerconfig.dtb diff --git a/arch/arm64/boot/dts/tegra132-bowmore-e1973-1000-a01-01.dts b/arch/arm64/boot/dts/tegra132-bowmore-e1973-1000-a01-01.dts new file mode 100644 index 000000000000..1a89b1d0bfab --- /dev/null +++ b/arch/arm64/boot/dts/tegra132-bowmore-e1973-1000-a01-01.dts @@ -0,0 +1,134 @@ +/dts-v1/; + +#include "tegra132.dtsi" +#include "tegra124-platforms/tegra124-tn8-keys-e1780-1100-a02.dtsi" +#include "tegra124-platforms/tegra124-ardbeg-pmic-e1733-1000-a00.dtsi" +#include "tegra124-platforms/tegra124-ardbeg-fixed-e1733-1000-a00.dtsi" +#include "tegra132-platforms/tegra132-bowmore-sensor-e1934-1000-a00.dtsi" +#include "tegra132-platforms/tegra132-bowmore-camera-a00.dtsi" + +/ { + model = "bowmore"; + compatible = "nvidia,bowmore", "nvidia,tegra132"; + nvidia,boardids = "1973:1000:01;1733:1000:00"; + nvidia,dtsfilename = __FILE__; + nvidia,proc-boardid = "1973:1000:01"; + nvidia,pmu-boardid = "1733:1000:00:D.4"; + #address-cells = <2>; + #size-cells = <2>; + + chosen { + bootargs = "tegraid=40.0.0.00.00 vmalloc=256M video=tegrafb console=ttyS0,115200n8 earlyprintk"; + linux,initrd-start = <0x85000000>; + linux,initrd-end = <0x851bc400>; + }; + host1x { + dsi { + nvidia,controller-vs = <1>; + status = "disabled"; + panel-p-wuxga-10-1 { + nvidia,dsi-panel-rst-gpio = <&gpio TEGRA_GPIO(H, 3) 0>; /* PH3 */ + nvidia,dsi-panel-bl-pwm-gpio = <&gpio TEGRA_GPIO(H, 1) 0>; /* PH1 */ + }; + }; + }; + i2c@7000d000 { + as3722@40 { + ams,minor-rev = <2>; + }; + }; + serial@70006000 { + compatible = "nvidia,tegra114-hsuart"; + status = "okay"; + }; + + serial@70006040 { + compatible = "nvidia,tegra114-hsuart"; + status = "okay"; + }; + + serial@70006200 { + compatible = "nvidia,tegra114-hsuart"; + status = "okay"; + }; + + memory@0x80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + + i2c@7000c000 { + clock-frequency = <100000>; + mpu6515@69 { + vlogic-supply = <&as3722_sd5>; + vdd-supply = <&as3722_sd5>; + }; + + ak8963c@0d { + vid-supply = <&as3722_sd5>; + vdd-supply = <&as3722_sd5>; + }; + + max44006@44 { + vcc-supply = <&as3722_sd5>; + }; + }; + + i2c@7000d000 { + nvidia,bit-banging-xfer-after-shutdown; + }; + + spi@7000d400 { + status = "okay"; + spi-max-frequency = <25000000>; + }; + + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + }; + + pmc { + status = "okay"; + nvidia,invert-interrupt; + nvidia,suspend-mode = <0>; + nvidia,cpu-pwr-good-time = <500>; + nvidia,cpu-pwr-off-time = <300>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <2000>; + nvidia,core-power-req-active-high; + nvidia,sys-clock-req-active-high; + }; + + stm8t143 { + compatible = "stm,stm8t143"; + pout-gpio = <&gpio 190 0>; + tout-gpio = <&gpio 112 0>; + }; + + xusb@70090000 { + /* nvidia,uses_external_pmic; + nvidia,gpio_controls_muxed_ss_lanes; */ + nvidia,gpio_ss1_sata = <0>; + nvidia,portmap = <0x703>; /* SSP0, SSP1 USB2P0, USB2P1, USBP2 */ + nvidia,ss_portmap = <0x20>; /* SSP0 on USB2P0, SSP1 on USB2P2 */ + nvidia,lane_owner = <6>; /* USB3P0 USB3P1 */ + nvidia,ulpicap = <0>; /* No ulpi support. can we remove */ + nvidia,supply_utmi_vbuses = "usb_vbus0", "usb_vbus1", "usb_vbus2"; + nvidia,supply_s3p3v = "hvdd_usb"; + nvidia,supply_s1p8v = "avdd_pll_utmip"; + nvidia,supply_vddio_hsic = "vddio_hsic"; + nvidia,supply_s1p05v = "avddio_usb"; + /* hsic config values in order defined in structure */ + nvidia,hsic0 = /bits/8 <0x1 0x1 0x8 0xa 0 0 1 0x22 0>; + status = "okay"; + }; + + pcie-controller { + nvidia,port0_status = <1>; + nvidia,port1_status = <1>; + nvidia,hot-plug-gpio = <&gpio TEGRA_GPIO(O, 1) 0>; + nvidia,wake-gpio = <&gpio TEGRA_GPIO(DD, 3) 0>; + status = "okay"; + }; +}; |