diff options
30 files changed, 8991 insertions, 1064 deletions
diff --git a/arch/arm/configs/colibri_t20_defconfig b/arch/arm/configs/colibri_t20_defconfig new file mode 100644 index 000000000000..7d2dced4cd47 --- /dev/null +++ b/arch/arm/configs/colibri_t20_defconfig @@ -0,0 +1,407 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_DEV_INITRD=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS_ALL=y +# CONFIG_ELF_CORE is not set +CONFIG_EMBEDDED=y +CONFIG_SLAB=y +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_ARCH_TEGRA=y +CONFIG_GPIO_PCA953X=y +CONFIG_MACH_HARMONY=y +CONFIG_MACH_VENTANA=y +CONFIG_MACH_KAEN=y +CONFIG_MACH_PAZ00=y +CONFIG_MACH_TRIMSLICE=y +CONFIG_MACH_WARIO=y +CONFIG_MACH_WHISTLER=y +CONFIG_MACH_COLIBRI_T20=y +CONFIG_TEGRA_PWM=y +CONFIG_TEGRA_EMC_SCALING_ENABLE=y +CONFIG_TEGRA_CLOCK_DEBUG_WRITE=y +CONFIG_USB_HOTPLUG=y +CONFIG_TEGRA_USB_MODEM_POWER=y +CONFIG_TEGRA_PREINIT_CLOCKS=y +CONFIG_TEGRA_PREPOWER_WIFI=y +CONFIG_ARM_ERRATA_720789=y +CONFIG_ARM_ERRATA_751472=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +CONFIG_NR_CPUS=2 +CONFIG_PREEMPT=y +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_HIGHMEM=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_PM_RUNTIME=y +CONFIG_SUSPEND_TIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_NET_KEY=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_CUBIC=m +CONFIG_TCP_CONG_VEGAS=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_ILLINOIS=m +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_TUNNEL=y +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_ANDROID_PARANOID_NETWORK is not set +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_LOG=y +CONFIG_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_INGRESS=y +CONFIG_NET_CLS_U32=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=y +CONFIG_NET_ACT_GACT=y +CONFIG_NET_ACT_MIRRED=y +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_BLUESLEEP=y +CONFIG_CFG80211=y +CONFIG_RFKILL=y +CONFIG_DEVTMPFS=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_NAND_TEGRA=y +CONFIG_MTD_NAND=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_MISC_DEVICES=y +CONFIG_AD525X_DPOT=y +CONFIG_AD525X_DPOT_I2C=y +CONFIG_APDS9802ALS=y +CONFIG_ISL29003=y +CONFIG_SENSORS_NCT1008=y +CONFIG_UID_STAT=y +CONFIG_BCM4329_RFKILL=y +CONFIG_TEGRA_CRYPTO_DEV=y +CONFIG_MPU_SENSORS_TIMERIRQ=y +CONFIG_MPU_SENSORS_MPU3050=m +CONFIG_MPU_SENSORS_KXTF9=m +CONFIG_MPU_SENSORS_AK8963=m +CONFIG_MPU_SENSORS_AK8975=m +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_CHR_DEV_SG=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_DM_UEVENT=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +CONFIG_R8169=y +# CONFIG_NETDEV_10000 is not set +CONFIG_BCM4329=m +CONFIG_BCM4329_FIRST_SCAN=y +CONFIG_BCM4329_FW_PATH="/lib/firmware/bcm4329/fw_bcm4329.bin" +CONFIG_BCM4329_NVRAM_PATH="/lib/firmware/nvram_4329.txt" +CONFIG_BCM4329_WIFI_CONTROL_FUNC=y +CONFIG_USB_CATC=y +CONFIG_USB_KAWETH=y +CONFIG_USB_PEGASUS=y +CONFIG_USB_RTL8150=y +CONFIG_USB_USBNET=y +CONFIG_USB_NET_DM9601=y +CONFIG_USB_NET_SMSC75XX=y +CONFIG_USB_NET_SMSC95XX=y +# CONFIG_USB_NET_NET1080 is not set +CONFIG_USB_NET_MCS7830=y +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_PPP=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=y +CONFIG_PPP_SYNC_TTY=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +CONFIG_INPUT_JOYDEV=y +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_KEYRESET=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_TEGRA=y +CONFIG_INPUT_JOYSTICK=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ATMEL_MXT=y +CONFIG_TOUCHSCREEN_PANJIT_I2C=y +CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI=y +CONFIG_TOUCHSCREEN_WM97XX=y +# CONFIG_TOUCHSCREEN_WM9705 is not set +# CONFIG_TOUCHSCREEN_WM9713 is not set +CONFIG_INPUT_MISC=y +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_GPIO=y +CONFIG_INPUT_ADXL34X=y +CONFIG_INPUT_ALPS_GPIO_SCROLLWHEEL=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_TEGRA=y +# CONFIG_HW_RANDOM is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_TEGRA=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_POWER_SUPPLY=y +CONFIG_BATTERY_BQ20Z75=y +CONFIG_CHARGER_GPIO=y +CONFIG_SENSORS_ADT7461=y +CONFIG_SENSORS_LM90=y +CONFIG_MFD_TPS6586X=y +CONFIG_MFD_MAX8907C=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_VIRTUAL_CONSUMER=y +CONFIG_REGULATOR_MAX8907C=y +CONFIG_REGULATOR_TPS6586X=y +CONFIG_REGULATOR_TPS658623=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +CONFIG_VIDEO_OV5650=m +CONFIG_VIDEO_OV2710=m +CONFIG_VIDEO_SOC380=m +CONFIG_TORCH_SSL3250A=m +CONFIG_VIDEO_SH532U=m +CONFIG_VIDEO_AD5820=m +CONFIG_USB_VIDEO_CLASS=y +# CONFIG_RADIO_ADAPTERS is not set +# CONFIG_VGA_ARB is not set +CONFIG_VIDEO_OUTPUT_CONTROL=y +CONFIG_FB=y +CONFIG_TEGRA_GRHOST=y +CONFIG_TEGRA_DC=y +CONFIG_TEGRA_DSI=y +CONFIG_TEGRA_NVHDCP=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_BACKLIGHT_PWM=y +CONFIG_BACKLIGHT_TEGRA_PWM=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_TEGRA=y +CONFIG_SND_SOC_TEGRA_WM8903=y +CONFIG_SND_SOC_TEGRA_COLIBRI_T20=y +CONFIG_SND_SOC_TEGRA_WM8753=y +CONFIG_HID_SONY=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_DEVICEFS=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_WHITELIST is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_TEGRA=y +CONFIG_USB_ACM=y +CONFIG_USB_WDM=y +CONFIG_USB_STORAGE=y +CONFIG_USB_LIBUSUAL=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_PL2303=y +CONFIG_USB_SERIAL_OPTION=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_FSL_USB2=y +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_TEGRA_OTG=y +CONFIG_MMC=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_TEST=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_TEGRA=y +CONFIG_SWITCH=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_MAX8907C=y +CONFIG_RTC_DRV_TPS6586X=y +CONFIG_RTC_DRV_TEGRA=y +CONFIG_STAGING=y +CONFIG_IIO=y +CONFIG_SENSORS_ISL29018=y +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +# CONFIG_DNOTIFY is not set +CONFIG_FUSE_FS=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=m +CONFIG_NTFS_RW=y +CONFIG_TMPFS=y +CONFIG_YAFFS_FS=y +CONFIG_YAFFS_DISABLE_TAGS_ECC=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_ROOT_NFS=y +CONFIG_CIFS=m +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=m +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_LOCKUP_DETECTOR=y +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +CONFIG_DEBUG_SLAB=y +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_VM=y +CONFIG_DEBUG_SG=y +CONFIG_FUNCTION_TRACER=y +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_TWOFISH=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DEV_TEGRA_AES=y diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index c0bf9340483e..0684e13f7e9c 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -71,6 +71,12 @@ config TEGRA_PCI comment "Tegra board type" +config MACH_COLIBRI_T20 + bool "Toradex Colibri T20 module" + depends on ARCH_TEGRA_2x_SOC + help + Support for Toradex Colibri T20 module on Iris carrier board + config MACH_HARMONY bool "Harmony board" depends on ARCH_TEGRA_2x_SOC diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 96d4667a51be..cc0bb6bc00fd 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -101,6 +101,14 @@ obj-$(CONFIG_SENSORS_TEGRA_TSENSOR) += tegra3_tsensor.o obj-$(CONFIG_TEGRA_DYNAMIC_PWRDET) += powerdetect.o obj-$(CONFIG_TEGRA_USB_MODEM_POWER) += tegra_usb_modem_power.o obj-$(CONFIG_TEGRA_PCI) += pcie.o + +obj-${CONFIG_MACH_COLIBRI_T20} += board-colibri_t20.o +#memory +obj-${CONFIG_MACH_COLIBRI_T20} += board-colibri_t20-panel.o +obj-${CONFIG_MACH_COLIBRI_T20} += board-colibri_t20-pinmux.o +obj-${CONFIG_MACH_COLIBRI_T20} += board-colibri_t20-power.o +#sensors + obj-${CONFIG_MACH_HARMONY} += board-harmony.o obj-${CONFIG_MACH_HARMONY} += board-harmony-kbc.o obj-${CONFIG_MACH_HARMONY} += board-harmony-panel.o diff --git a/arch/arm/mach-tegra/board-colibri_t20-panel.c b/arch/arm/mach-tegra/board-colibri_t20-panel.c new file mode 100644 index 000000000000..86a331648ede --- /dev/null +++ b/arch/arm/mach-tegra/board-colibri_t20-panel.c @@ -0,0 +1,493 @@ +/* + * arch/arm/mach-tegra/board-colibri_t20-panel.c + * + * Copyright (c) 2012, Toradex, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#include <asm/mach-types.h> + +#include <linux/delay.h> +#include <linux/earlysuspend.h> +#include <linux/gpio.h> +#include <linux/nvhost.h> +#include <linux/platform_device.h> +#include <linux/pwm_backlight.h> +#include <linux/regulator/consumer.h> +#include <linux/resource.h> + +#include <mach/dc.h> +#include <mach/fb.h> +#include <mach/iomap.h> +#include <mach/irqs.h> +#include <mach/nvmap.h> + +#include "board.h" +#include "devices.h" +#include "gpio-names.h" + +#ifndef CAMERA_INTERFACE +#define colibri_t20_bl_enb TEGRA_GPIO_PT4 /* BL_ON */ +#endif +#define colibri_t20_hdmi_hpd TEGRA_GPIO_PN7 /* HOTPLUG_DETECT */ + +#ifdef CONFIG_TEGRA_DC +static struct regulator *colibri_t20_hdmi_reg = NULL; +static struct regulator *colibri_t20_hdmi_pll = NULL; +#endif + +#ifndef CAMERA_INTERFACE +static int colibri_t20_backlight_init(struct device *dev) { + int ret; + + ret = gpio_request(colibri_t20_bl_enb, "BL_ON"); + if (ret < 0) + return ret; + + ret = gpio_direction_output(colibri_t20_bl_enb, 1); + if (ret < 0) + gpio_free(colibri_t20_bl_enb); + else + tegra_gpio_enable(colibri_t20_bl_enb); + + return ret; +}; + +static void colibri_t20_backlight_exit(struct device *dev) { + gpio_set_value(colibri_t20_bl_enb, 0); + gpio_free(colibri_t20_bl_enb); + tegra_gpio_disable(colibri_t20_bl_enb); +} + +static int colibri_t20_backlight_notify(struct device *unused, int brightness) +{ + gpio_set_value(colibri_t20_bl_enb, !!brightness); + return brightness; +} + +static int colibri_t20_disp1_check_fb(struct device *dev, struct fb_info *info); + +static struct platform_pwm_backlight_data colibri_t20_backlight_data = { + .pwm_id = 2, /* PWM<C> (PMFM_PWM2) */ + .max_brightness = 255, + .dft_brightness = 127, + .pwm_period_ns = 5000000, + .init = colibri_t20_backlight_init, + .exit = colibri_t20_backlight_exit, + .notify = colibri_t20_backlight_notify, + /* Only toggle backlight on fb blank notifications for disp1 */ + .check_fb = colibri_t20_disp1_check_fb, +}; + +static struct platform_device colibri_t20_backlight_device = { + .name = "pwm-backlight", + .id = -1, + .dev = { + .platform_data = &colibri_t20_backlight_data, + }, +}; +#endif /* !CAMERA_INTERFACE */ + +#ifdef CONFIG_TEGRA_DC +static int colibri_t20_panel_enable(void) +{ + struct regulator *reg = regulator_get(NULL, "vdd_ldo4"); + + if (!reg) { + regulator_enable(reg); + regulator_put(reg); + } + + reg = regulator_get(NULL, "avdd_vdac"); + pr_info("LDO6: %d\n", regulator_get_voltage(reg)); + regulator_set_voltage(reg, 2850000, 2850000); + pr_info("LDO6: %d\n", regulator_get_voltage(reg)); + regulator_enable(reg); + + reg = regulator_get(NULL, "avdd_hdmi"); + pr_info("LDO7: %d\n", regulator_get_voltage(reg)); + regulator_set_voltage(reg, 3300000, 3300000); + pr_info("LDO7: %d\n", regulator_get_voltage(reg)); + regulator_enable(reg); + + reg = regulator_get(NULL, "avdd_hdmi_pll"); + pr_info("LDO8: %d\n", regulator_get_voltage(reg)); + regulator_set_voltage(reg, 1800000, 1800000); + pr_info("LDO8: %d\n", regulator_get_voltage(reg)); + regulator_enable(reg); + + return 0; +} + +static int colibri_t20_panel_disable(void) +{ + return 0; +} + +static int colibri_t20_hdmi_enable(void) +{ + if (!colibri_t20_hdmi_reg) { + colibri_t20_hdmi_reg = regulator_get(NULL, "avdd_hdmi"); /* LD07 */ + if (IS_ERR_OR_NULL(colibri_t20_hdmi_reg)) { + pr_err("hdmi: couldn't get regulator avdd_hdmi\n"); + colibri_t20_hdmi_reg = NULL; + return PTR_ERR(colibri_t20_hdmi_reg); + } + } + regulator_enable(colibri_t20_hdmi_reg); + + if (!colibri_t20_hdmi_pll) { + colibri_t20_hdmi_pll = regulator_get(NULL, "avdd_hdmi_pll"); /* LD08 */ + if (IS_ERR_OR_NULL(colibri_t20_hdmi_pll)) { + pr_err("hdmi: couldn't get regulator avdd_hdmi_pll\n"); + colibri_t20_hdmi_pll = NULL; + regulator_disable(colibri_t20_hdmi_reg); + colibri_t20_hdmi_reg = NULL; + return PTR_ERR(colibri_t20_hdmi_pll); + } + } + regulator_enable(colibri_t20_hdmi_pll); + return 0; +} + +static int colibri_t20_hdmi_disable(void) +{ + regulator_disable(colibri_t20_hdmi_reg); + regulator_disable(colibri_t20_hdmi_pll); + return 0; +} + +static struct resource colibri_t20_disp1_resources[] = { + { + .name = "irq", + .start = INT_DISPLAY_GENERAL, + .end = INT_DISPLAY_GENERAL, + .flags = IORESOURCE_IRQ, + }, + { + .name = "regs", + .start = TEGRA_DISPLAY_BASE, + .end = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE-1, + .flags = IORESOURCE_MEM, + }, + { + .name = "fbmem", + .flags = IORESOURCE_MEM, + }, +}; + +static struct resource colibri_t20_disp2_resources[] = { + { + .name = "irq", + .start = INT_DISPLAY_B_GENERAL, + .end = INT_DISPLAY_B_GENERAL, + .flags = IORESOURCE_IRQ, + }, + { + .name = "regs", + .start = TEGRA_DISPLAY2_BASE, + .end = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + { + .name = "fbmem", + .flags = IORESOURCE_MEM, + }, + { + .name = "hdmi_regs", + .start = TEGRA_HDMI_BASE, + .end = TEGRA_HDMI_BASE + TEGRA_HDMI_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct tegra_dc_mode colibri_t20_panel_modes[] = { + { + .pclk = 72072000, + .h_ref_to_sync = 11, + .v_ref_to_sync = 1, + .h_sync_width = 58, + .v_sync_width = 4, + .h_back_porch = 58, + .v_back_porch = 4, + .h_active = 1366, + .v_active = 768, + .h_front_porch = 58, + .v_front_porch = 4, +#if 0 + .pclk = 25175000, + .h_ref_to_sync = 8, + .v_ref_to_sync = 2, + .h_sync_width = 96, + .v_sync_width = 2, + .h_back_porch = 48, + .v_back_porch = 33, + .h_active = 640, + .v_active = 480, + .h_front_porch = 16, + .v_front_porch = 10, +//#else + .pclk = 74250000, + .h_ref_to_sync = 1, + .v_ref_to_sync = 1, + .h_sync_width = 40, + .v_sync_width = 5, + .h_back_porch = 220, + .v_back_porch = 20, + .h_active = 1280, + .v_active = 720, + .h_front_porch = 110, + .v_front_porch = 5, +#endif + }, +}; + +static struct tegra_fb_data colibri_t20_fb_data = { + .win = 0, + .xres = 1366, + .yres = 768, +#if 0 + .xres = 640, + .yres = 480, +//#else + .xres = 1280, + .yres = 720, +#endif + .bits_per_pixel = 32, + .flags = TEGRA_FB_FLIP_ON_PROBE, +}; + +static struct tegra_fb_data colibri_t20_hdmi_fb_data = { + .win = 0, + .xres = 640, + .yres = 480, + .bits_per_pixel = 32, + .flags = TEGRA_FB_FLIP_ON_PROBE, +}; + +static struct tegra_dc_out colibri_t20_disp1_out = { + .type = TEGRA_DC_OUT_RGB, + + .align = TEGRA_DC_ALIGN_MSB, + .order = TEGRA_DC_ORDER_RED_BLUE, + .depth = 18, + .dither = TEGRA_DC_ORDERED_DITHER, + + .modes = colibri_t20_panel_modes, + .n_modes = ARRAY_SIZE(colibri_t20_panel_modes), + + .enable = colibri_t20_panel_enable, + .disable = colibri_t20_panel_disable, +}; + +static struct tegra_dc_out colibri_t20_disp2_out = { + .type = TEGRA_DC_OUT_HDMI, + .flags = TEGRA_DC_OUT_HOTPLUG_HIGH, + + .dcc_bus = 1, + .hotplug_gpio = colibri_t20_hdmi_hpd, + + .max_pixclock = KHZ2PICOS(148500), + + .align = TEGRA_DC_ALIGN_MSB, + .order = TEGRA_DC_ORDER_RED_BLUE, + + .enable = colibri_t20_hdmi_enable, + .disable = colibri_t20_hdmi_disable, + +// .dither = TEGRA_DC_ORDERED_DITHER, +}; + +static struct tegra_dc_platform_data colibri_t20_disp1_pdata = { + .flags = TEGRA_DC_FLAG_ENABLED, + .default_out = &colibri_t20_disp1_out, + .fb = &colibri_t20_fb_data, +}; + +static struct tegra_dc_platform_data colibri_t20_disp2_pdata = { + .flags = 0, + .default_out = &colibri_t20_disp2_out, + .fb = &colibri_t20_hdmi_fb_data, +}; + +static struct nvhost_device colibri_t20_disp1_device = { + .name = "tegradc", + .id = 0, + .resource = colibri_t20_disp1_resources, + .num_resources = ARRAY_SIZE(colibri_t20_disp1_resources), + .dev = { + .platform_data = &colibri_t20_disp1_pdata, + }, +}; + +static int colibri_t20_disp1_check_fb(struct device *dev, struct fb_info *info) +{ + return info->device == &colibri_t20_disp1_device.dev; +} + +static struct nvhost_device colibri_t20_disp2_device = { + .name = "tegradc", + .id = 1, + .resource = colibri_t20_disp2_resources, + .num_resources = ARRAY_SIZE(colibri_t20_disp2_resources), + .dev = { + .platform_data = &colibri_t20_disp2_pdata, + }, +}; +#else +static int colibri_t20_disp1_check_fb(struct device *dev, struct fb_info *info) +{ + return 0; +} +#endif + +#if defined(CONFIG_TEGRA_NVMAP) +static struct nvmap_platform_carveout colibri_t20_carveouts[] = { + [0] = NVMAP_HEAP_CARVEOUT_IRAM_INIT, + [1] = { + .name = "generic-0", + .usage_mask = NVMAP_HEAP_CARVEOUT_GENERIC, + .buddy_size = SZ_32K, + }, +}; + +static struct nvmap_platform_data colibri_t20_nvmap_data = { + .carveouts = colibri_t20_carveouts, + .nr_carveouts = ARRAY_SIZE(colibri_t20_carveouts), +}; + +static struct platform_device colibri_t20_nvmap_device = { + .name = "tegra-nvmap", + .id = -1, + .dev = { + .platform_data = &colibri_t20_nvmap_data, + }, +}; +#endif /* CONFIG_TEGRA_NVMAP */ + +static struct platform_device *colibri_t20_gfx_devices[] __initdata = { +#if defined(CONFIG_TEGRA_NVMAP) + &colibri_t20_nvmap_device, +#endif +#ifndef CAMERA_INTERFACE + &tegra_pwfm2_device, + &colibri_t20_backlight_device, +#endif /* !CAMERA_INTERFACE */ +}; + +#ifdef CONFIG_HAS_EARLYSUSPEND +/* put early_suspend/late_resume handlers here for the display in order + * to keep the code out of the display driver, keeping it closer to upstream + */ +struct early_suspend colibri_t20_panel_early_suspender; + +static void colibri_t20_panel_early_suspend(struct early_suspend *h) +{ + /* power down LCD, add use a black screen for HDMI */ + if (num_registered_fb > 0) + fb_blank(registered_fb[0], FB_BLANK_POWERDOWN); + if (num_registered_fb > 1) + fb_blank(registered_fb[1], FB_BLANK_NORMAL); +#ifdef CONFIG_TEGRA_CONVSERVATIVE_GOV_ON_EARLYSUPSEND + cpufreq_save_default_governor(); + cpufreq_set_conservative_governor(); + cpufreq_set_conservative_governor_param("up_threshold", + SET_CONSERVATIVE_GOVERNOR_UP_THRESHOLD); + + cpufreq_set_conservative_governor_param("down_threshold", + SET_CONSERVATIVE_GOVERNOR_DOWN_THRESHOLD); + + cpufreq_set_conservative_governor_param("freq_step", + SET_CONSERVATIVE_GOVERNOR_FREQ_STEP); +#endif +} + +static void colibri_t20_panel_late_resume(struct early_suspend *h) +{ + unsigned i; +#ifdef CONFIG_TEGRA_CONVSERVATIVE_GOV_ON_EARLYSUPSEND + cpufreq_restore_default_governor(); +#endif + for (i = 0; i < num_registered_fb; i++) + fb_blank(registered_fb[i], FB_BLANK_UNBLANK); +} +#endif + +int __init colibri_t20_panel_init(void) +{ + int err; + struct resource __maybe_unused *res; + + /* enable hdmi hotplug gpio for hotplug detection */ + tegra_gpio_enable(colibri_t20_hdmi_hpd); + gpio_request(colibri_t20_hdmi_hpd, "hdmi_hpd"); + gpio_direction_input(colibri_t20_hdmi_hpd); + +#ifdef CONFIG_HAS_EARLYSUSPEND + colibri_t20_panel_early_suspender.suspend = colibri_t20_panel_early_suspend; + colibri_t20_panel_early_suspender.resume = colibri_t20_panel_late_resume; + colibri_t20_panel_early_suspender.level = EARLY_SUSPEND_LEVEL_DISABLE_FB; + register_early_suspend(&colibri_t20_panel_early_suspender); +#endif + +#if defined(CONFIG_TEGRA_NVMAP) + colibri_t20_carveouts[1].base = tegra_carveout_start; +printk("tegra_carveout_start=0x%08x\n", tegra_carveout_start); + colibri_t20_carveouts[1].size = tegra_carveout_size; +printk("tegra_carveout_size=0x%08x\n", tegra_carveout_size); +#endif /* CONFIG_TEGRA_NVMAP */ + +#ifdef CONFIG_TEGRA_GRHOST + err = nvhost_device_register(&tegra_grhost_device); + if (err) + return err; +#endif + + err = platform_add_devices(colibri_t20_gfx_devices, + ARRAY_SIZE(colibri_t20_gfx_devices)); +//return 0; +//<3>tegra_grhost tegra_grhost: missing required platform resources +#if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_DC) + res = nvhost_get_resource_byname(&colibri_t20_disp1_device, + IORESOURCE_MEM, "fbmem"); + res->start = tegra_fb_start; + res->end = tegra_fb_start + tegra_fb_size - 1; + + res = nvhost_get_resource_byname(&colibri_t20_disp2_device, + IORESOURCE_MEM, "fbmem"); + res->start = tegra_fb2_start; + res->end = tegra_fb2_start + tegra_fb2_size - 1; +#endif + + /* Copy the bootloader fb to the fb. */ + tegra_move_framebuffer(tegra_fb_start, tegra_bootloader_fb_start, + min(tegra_fb_size, tegra_bootloader_fb_size)); + + /* Copy the bootloader fb to the fb2. */ + tegra_move_framebuffer(tegra_fb2_start, tegra_bootloader_fb_start, + min(tegra_fb2_size, tegra_bootloader_fb_size)); + + +#if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_DC) + if (!err) + err = nvhost_device_register(&colibri_t20_disp1_device); + + if (!err) + err = nvhost_device_register(&colibri_t20_disp2_device); +#endif + + return err; +} diff --git a/arch/arm/mach-tegra/board-colibri_t20-pinmux.c b/arch/arm/mach-tegra/board-colibri_t20-pinmux.c new file mode 100644 index 000000000000..94e0dd446a7f --- /dev/null +++ b/arch/arm/mach-tegra/board-colibri_t20-pinmux.c @@ -0,0 +1,286 @@ +/* + * arch/arm/mach-tegra/board-colibri_t20-pinmux.c + * + * Copyright (C) 2011 Toradex, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/gpio.h> +#include <linux/init.h> +#include <linux/kernel.h> + +#include <mach/pinmux.h> + +#include "board-colibri_t20.h" +#include "gpio-names.h" + +#define DEFAULT_DRIVE(_name) \ + { \ + .pingroup = TEGRA_DRIVE_PINGROUP_##_name, \ + .hsm = TEGRA_HSM_DISABLE, \ + .schmitt = TEGRA_SCHMITT_ENABLE, \ + .drive = TEGRA_DRIVE_DIV_1, \ + .pull_down = TEGRA_PULL_31, \ + .pull_up = TEGRA_PULL_31, \ + .slew_rising = TEGRA_SLEW_SLOWEST, \ + .slew_falling = TEGRA_SLEW_SLOWEST, \ + } + +#define SET_DRIVE(_name, _hsm, _schmitt, _drive, _pulldn_drive, _pullup_drive, _pulldn_slew, _pullup_slew) \ + { \ + .pingroup = TEGRA_DRIVE_PINGROUP_##_name, \ + .hsm = TEGRA_HSM_##_hsm, \ + .schmitt = TEGRA_SCHMITT_##_schmitt, \ + .drive = TEGRA_DRIVE_##_drive, \ + .pull_down = TEGRA_PULL_##_pulldn_drive, \ + .pull_up = TEGRA_PULL_##_pullup_drive, \ + .slew_rising = TEGRA_SLEW_##_pulldn_slew, \ + .slew_falling = TEGRA_SLEW_##_pullup_slew, \ + } + +static __initdata struct tegra_drive_pingroup_config colibri_t20_drive_pinmux[] = { + DEFAULT_DRIVE(DDC), + DEFAULT_DRIVE(SDIO1), + DEFAULT_DRIVE(VI1), + + SET_DRIVE(AO1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), + SET_DRIVE(AT1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), + SET_DRIVE(DBG, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), + SET_DRIVE(VI2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), +}; + +static __initdata struct tegra_pingroup_config colibri_t20_pinmux[] = { +/* tegra_pingroup tegra_mux_func tegra_pullupdown tegra_tristate */ + /* nRESET_OUT, GPIO I3, I4 and I6 */ + {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* nCSx, AD0, AD1, AD2, AD3, AD4, AD5, AD6 and AD7, nWR, nOE, GPIO K0, K1, K2, K3 and K4 */ + {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* AD8, AD9, AD10 and AD11 */ + {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* AD12, AD13, AD14 and AD15 */ + {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* WM9715L XTL_IN */ +//audio sync clk could be either AC97 or PLLA_OUT0 +//SYNC_CLK_DOUBLER_ENB: Enable audio sync clk doubler. +// {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_AUDIO_SYNC, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* USB3340 REFCLK */ + {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_CK32, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK,TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + /* GPIO N0, N1, N2, N3 and USBC_DET */ + {TEGRA_PINGROUP_DAP1, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* GPIO A2 and A3 */ + {TEGRA_PINGROUP_DAP2, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* A13, A14, A15 and A16, GPIO P4, P5, P6 and P7 */ + {TEGRA_PINGROUP_DAP4, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DDC, TEGRA_MUX_I2C2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DDRC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* GPIO D5 */ + {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + /* GPIO T2 and T3 */ + {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + /* GPIO L0, L1, L2, L3, L6 and L7 */ + {TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + /* AX88772B V_BUS, WM9715L PENDOWN, GPIO A0 and BB4 */ +// {TEGRA_PINGROUP_DTE, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DTE, TEGRA_MUX_VI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* GPIO BB2 and BB3 */ + {TEGRA_PINGROUP_DTF, TEGRA_MUX_I2C3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* MM_CD */ + {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI_INT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* BT_TXD, BT_RXD, BT_CTS and BT_RTS, GPIO K7 */ + {TEGRA_PINGROUP_GMC, TEGRA_MUX_UARTD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GMD, TEGRA_MUX_RSVD, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + /* GPIO AA4, AA5, AA6 and AA7 */ +#ifndef SDHCI_8BIT + {TEGRA_PINGROUP_GME, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +#else + {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +#endif + /* A6, A7, A8, A9, A10, A11 and A12, GPIO U6 */ + {TEGRA_PINGROUP_GPU, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + /* AX88772B RESET_N and EXTWAKEUP_N */ + {TEGRA_PINGROUP_GPV, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* HDMI HOTPLUG_DETECT */ + {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* A0 */ + {TEGRA_PINGROUP_IRRX, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* A1 */ + {TEGRA_PINGROUP_IRTX, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCA, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCB, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCD, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCE, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCF, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* GPIO N4 */ + {TEGRA_PINGROUP_LCSN, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD10, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD11, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD12, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD13, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD14, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD15, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD16, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD17, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD3, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD4, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD5, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD6, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD7, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD8, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD9, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* GPIO N6 */ + {TEGRA_PINGROUP_LDC, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LDI, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LHP0, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LHP1, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LHP2, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LHS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* Multiplexed RDnWR */ + {TEGRA_PINGROUP_LM0, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LM1, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LPP, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* GPIO B2 */ +// {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LPW0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LPW1, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, +// {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LPW2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* Multiplexed nPWE */ +// {TEGRA_PINGROUP_LSC1, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LSC1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + /* GPIO Z4 */ +// {TEGRA_PINGROUP_LSCK, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LSCK, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* GPIO N5 */ +// {TEGRA_PINGROUP_LSDA, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LSDA, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* GPIO Z2 */ + {TEGRA_PINGROUP_LSDI, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LVP0, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LVP1, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_OWC, TEGRA_MUX_OWR, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, +//Todo: Tri-state for now due to 5K/s spurious interrupts. +// {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_PMCA, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_PMCB, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_PMCC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_PMCD, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +//Todo: What exactly is PMCE? Why would it need pull-up? +// {TEGRA_PINGROUP_PMCE, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_PMCE, TEGRA_MUX_NONE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + /* Not tri-stating RDnWR, nPWE */ + {TEGRA_PINGROUP_PTA, TEGRA_MUX_RSVD, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* PWM3 */ +#ifdef CAMERA_INTERFACE + /* PWM<D> multiplexed with CIF_DD<6> */ + {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, +#else + {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +#endif + /* GPIO B6 and B7, PWM0 and PWM1 */ +#ifdef CAMERA_INTERFACE + /* PWM<A> multiplexed with CIF_DD<7> */ + {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, +#else + {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +#endif + /* PWM2 */ + {TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + + /* SPI4 */ + {TEGRA_PINGROUP_SLXA, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SLXK, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + + {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + + /* X0, X1, X2, X3, X4, X5, X6 and X7 */ +// {TEGRA_PINGROUP_SPIA, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +// {TEGRA_PINGROUP_SPIB, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +// {TEGRA_PINGROUP_SPIC, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +// {TEGRA_PINGROUP_SPID, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +// {TEGRA_PINGROUP_SPIE, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIF, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + + /* USBH_PEN */ +// {TEGRA_PINGROUP_SPIG, TEGRA_MUX_RSVD, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* USBH_OC */ +// {TEGRA_PINGROUP_SPIH, TEGRA_MUX_RSVD, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + /* WM9715L RESET#, USB3340 RESETB, WM9715L GENIRQ and GPIO V3 */ + {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* STD_TXD and STD_RXD */ + {TEGRA_PINGROUP_UAD, TEGRA_MUX_IRDA, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* A2 and A3 */ + {TEGRA_PINGROUP_UCA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* A4 and A5 */ + {TEGRA_PINGROUP_UCB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_UDA, TEGRA_MUX_ULPI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_XM2C, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +}; + +#if 0 +/* 32-bit wide data and 28-bit wide address bus, more chip selects */ +static __initdata struct tegra_pingroup_config colibri_t20_widebus_pinmux[] = { + /* D28, D29, D30 and D31 */ + {TEGRA_PINGROUP_DAP1, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* AD20, AD21, AD22 and AD23 */ + {TEGRA_PINGROUP_GMA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* AD16, AD17, AD18 and AD19 */ + {TEGRA_PINGROUP_GMC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + /* nCS0 and nCS1 */ + {TEGRA_PINGROUP_GMD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +#ifndef SDHCI_8BIT + /* AD24, AD25, AD26 and AD27 */ + {TEGRA_PINGROUP_GME, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +#endif +}; +#endif + +int __init colibri_t20_pinmux_init(void) +{ + tegra_pinmux_config_table(colibri_t20_pinmux, ARRAY_SIZE(colibri_t20_pinmux)); + tegra_drive_pinmux_config_table(colibri_t20_drive_pinmux, + ARRAY_SIZE(colibri_t20_drive_pinmux)); + + return 0; +} diff --git a/arch/arm/mach-tegra/board-colibri_t20-power.c b/arch/arm/mach-tegra/board-colibri_t20-power.c new file mode 100644 index 000000000000..e5c1d9bf5716 --- /dev/null +++ b/arch/arm/mach-tegra/board-colibri_t20-power.c @@ -0,0 +1,279 @@ +/* + * Copyright (C) 2011 Toradex, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#include <linux/gpio.h> +#include <linux/i2c.h> +#include <linux/io.h> +#include <linux/mfd/tps6586x.h> +// +#include <linux/pda_power.h> +// +#include <linux/platform_device.h> +#include <linux/regulator/machine.h> +// +#include <linux/resource.h> +// + +#include <mach/iomap.h> +#include <mach/irqs.h> + +#include <generated/mach-types.h> + +#include "gpio-names.h" +#include "fuse.h" +#include "pm.h" +#include "wakeups-t2.h" +#include "board.h" +#include "board-colibri_t20.h" + +#define PMC_CTRL 0x0 +#define PMC_CTRL_INTR_LOW (1 << 17) + +static struct regulator_consumer_supply tps658621_sm0_supply[] = { + REGULATOR_SUPPLY("vdd_core", NULL), +}; + +static struct regulator_consumer_supply tps658621_sm1_supply[] = { + REGULATOR_SUPPLY("vdd_cpu", NULL), +}; + +static struct regulator_consumer_supply tps658621_sm2_supply[] = { + REGULATOR_SUPPLY("vdd_sm2", NULL), +}; + +static struct regulator_consumer_supply tps658621_ldo0_supply[] = { + REGULATOR_SUPPLY("vdd_ldo0", NULL), + REGULATOR_SUPPLY("p_cam_avdd", NULL), +}; + +static struct regulator_consumer_supply tps658621_ldo1_supply[] = { + REGULATOR_SUPPLY("vdd_ldo1", NULL), + REGULATOR_SUPPLY("avdd_pll", NULL), +}; + +static struct regulator_consumer_supply tps658621_ldo2_supply[] = { + REGULATOR_SUPPLY("vdd_ldo2", NULL), + REGULATOR_SUPPLY("vdd_rtc", NULL), + REGULATOR_SUPPLY("vdd_aon", NULL), +}; + +static struct regulator_consumer_supply tps658621_ldo3_supply[] = { + /* unused */ + REGULATOR_SUPPLY("vdd_ldo3", NULL), + REGULATOR_SUPPLY("avdd_lvds", NULL), +}; + +static struct regulator_consumer_supply tps658621_ldo4_supply[] = { + REGULATOR_SUPPLY("vdd_ldo4", NULL), + REGULATOR_SUPPLY("avdd_osc", NULL), + REGULATOR_SUPPLY("vddio_sys", "panjit_touch"), +}; + +static struct regulator_consumer_supply tps658621_ldo5_supply[] = { + REGULATOR_SUPPLY("vdd_ldo5", NULL), + REGULATOR_SUPPLY("avdd_usb", NULL), + REGULATOR_SUPPLY("avdd_usb_pll", NULL), +// REGULATOR_SUPPLY("vcore_mmc", "sdhci-tegra.1"), + REGULATOR_SUPPLY("vmmc", "sdhci-tegra.3"), + /* fuse via separate GPIO FET (FUSE_ENABLE_N) */ + REGULATOR_SUPPLY("vdd_fuse", NULL), +}; + +static struct regulator_consumer_supply tps658621_ldo6_supply[] = { + /* Off after boot, needs to be explicitly turned on! */ + REGULATOR_SUPPLY("vdd_ldo6", NULL), + REGULATOR_SUPPLY("avdd_vdac", NULL), +}; + +static struct regulator_consumer_supply tps658621_ldo7_supply[] = { + REGULATOR_SUPPLY("vdd_ldo7", NULL), + REGULATOR_SUPPLY("avdd_hdmi", NULL), +}; + +static struct regulator_consumer_supply tps658621_ldo8_supply[] = { + REGULATOR_SUPPLY("vdd_ldo8", NULL), + REGULATOR_SUPPLY("avdd_hdmi_pll", NULL), +}; + +static struct regulator_consumer_supply tps658621_ldo9_supply[] = { + REGULATOR_SUPPLY("vdd_ldo9", NULL), + REGULATOR_SUPPLY("avdd_2v85", NULL), + REGULATOR_SUPPLY("vdd_ddr_rx", NULL), +// REGULATOR_SUPPLY("avdd_amp", NULL), +}; + +static struct tps6586x_settings sm0_config = { + .sm_pwm_mode = PWM_DEFAULT_VALUE, + .slew_rate = SLEW_RATE_3520UV_PER_SEC, +}; + +static struct tps6586x_settings sm1_config = { + /* + * Current TPS6586x is known for having a voltage glitch if current load + * changes from low to high in auto PWM/PFM mode for CPU's Vdd line. + */ + .sm_pwm_mode = PWM_ONLY, + .slew_rate = SLEW_RATE_3520UV_PER_SEC, +}; + +#define REGULATOR_INIT(_id, _minmv, _maxmv, on, config) \ + { \ + .constraints = { \ + .min_uV = (_minmv)*1000, \ + .max_uV = (_maxmv)*1000, \ + .valid_modes_mask = (REGULATOR_MODE_NORMAL | \ + REGULATOR_MODE_STANDBY), \ + .valid_ops_mask = (REGULATOR_CHANGE_MODE | \ + REGULATOR_CHANGE_STATUS | \ + REGULATOR_CHANGE_VOLTAGE), \ + .always_on = on, \ + .apply_uV = 1, \ + }, \ + .num_consumer_supplies = ARRAY_SIZE(tps658621_##_id##_supply),\ + .consumer_supplies = tps658621_##_id##_supply, \ + .driver_data = config, \ + } + +#define ON 1 +#define OFF 0 + +static struct regulator_init_data sm0_data = REGULATOR_INIT(sm0, 725, 1500, ON, &sm0_config); +static struct regulator_init_data sm1_data = REGULATOR_INIT(sm1, 725, 1500, ON, &sm1_config); +static struct regulator_init_data sm2_data = REGULATOR_INIT(sm2, 1700, 2475, ON, NULL); +static struct regulator_init_data ldo0_data = REGULATOR_INIT(ldo0, 1200, 3300, OFF, NULL); +static struct regulator_init_data ldo1_data = REGULATOR_INIT(ldo1, 725, 1500, ON, NULL); +static struct regulator_init_data ldo2_data = REGULATOR_INIT(ldo2, 725, 1500, OFF, NULL); +static struct regulator_init_data ldo3_data = REGULATOR_INIT(ldo3, 1250, 3300, OFF, NULL); +static struct regulator_init_data ldo4_data = REGULATOR_INIT(ldo4, 1700, 2475, ON, NULL); +static struct regulator_init_data ldo5_data = REGULATOR_INIT(ldo5, 1250, 3300, ON, NULL); +static struct regulator_init_data ldo6_data = REGULATOR_INIT(ldo6, 1250, 3300, OFF, NULL); +static struct regulator_init_data ldo7_data = REGULATOR_INIT(ldo7, 1250, 3300, OFF, NULL); +static struct regulator_init_data ldo8_data = REGULATOR_INIT(ldo8, 1250, 3300, OFF, NULL); +static struct regulator_init_data ldo9_data = REGULATOR_INIT(ldo9, 1250, 3300, OFF, NULL); + +static struct tps6586x_rtc_platform_data rtc_data = { + .irq = TEGRA_NR_IRQS + TPS6586X_INT_RTC_ALM1, + .start = { + .year = 2009, + .month = 1, + .day = 1, + }, + .cl_sel = TPS6586X_RTC_CL_SEL_1_5PF /* use lowest (external 20pF cap) */ +}; + +#define TPS_REG(_id, _data) \ + { \ + .id = TPS6586X_ID_##_id, \ + .name = "tps6586x-regulator", \ + .platform_data = _data, \ + } + +static struct tps6586x_subdev_info tps_devs[] = { + TPS_REG(SM_0, &sm0_data), + TPS_REG(SM_1, &sm1_data), + TPS_REG(SM_2, &sm2_data), + TPS_REG(LDO_0, &ldo0_data), + TPS_REG(LDO_1, &ldo1_data), + TPS_REG(LDO_2, &ldo2_data), + TPS_REG(LDO_3, &ldo3_data), + TPS_REG(LDO_4, &ldo4_data), + TPS_REG(LDO_5, &ldo5_data), + TPS_REG(LDO_6, &ldo6_data), + TPS_REG(LDO_7, &ldo7_data), + TPS_REG(LDO_8, &ldo8_data), + TPS_REG(LDO_9, &ldo9_data), + { + .id = 0, + .name = "tps6586x-rtc", + .platform_data = &rtc_data, + }, +}; + +static struct tps6586x_platform_data tps_platform = { + .irq_base = TPS6586X_INT_BASE, + .num_subdevs = ARRAY_SIZE(tps_devs), + .subdevs = tps_devs, + .gpio_base = TPS6586X_GPIO_BASE, +}; + +static struct i2c_board_info __initdata colibri_t20_regulators[] = { + { + I2C_BOARD_INFO("tps6586x", 0x34), + .irq = INT_EXTERNAL_PMU, + .platform_data = &tps_platform, + }, + { + /* LM95245 temperature sensor on PWR_I2C_SCL/SDA */ + I2C_BOARD_INFO("lm95241", 0x4c), + .type = "lm95241", + }, +}; + +static void colibri_t20_board_suspend(int lp_state, enum suspend_stage stg) +{ + if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU)) + tegra_console_uart_suspend(); +} + +static void colibri_t20_board_resume(int lp_state, enum resume_stage stg) +{ + if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU)) + tegra_console_uart_resume(); +} + +static struct tegra_suspend_platform_data colibri_t20_suspend_data = { + /* + * Check power on time and crystal oscillator start time + * for appropriate settings. + */ + .cpu_timer = 2000, + .cpu_off_timer = 100, + .suspend_mode = TEGRA_SUSPEND_LP0, + .core_timer = 0x7e7e, + .core_off_timer = 0xf, + .corereq_high = false, + .sysclkreq_high = true, + .board_suspend = colibri_t20_board_suspend, + .board_resume = colibri_t20_board_resume, +}; + +int __init colibri_t20_regulator_init(void) +{ + void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE); + void __iomem *chip_id = IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804; + u32 pmc_ctrl; + u32 minor; + + minor = (readl(chip_id) >> 16) & 0xf; + /* A03 (but not A03p) chips do not support LP0 */ + if (minor == 3 && !(tegra_spare_fuse(18) || tegra_spare_fuse(19))) + colibri_t20_suspend_data.suspend_mode = TEGRA_SUSPEND_LP1; + + /* configure the power management controller to trigger PMU + * interrupts when low */ + pmc_ctrl = readl(pmc + PMC_CTRL); + writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL); + + i2c_register_board_info(4, colibri_t20_regulators, ARRAY_SIZE(colibri_t20_regulators)); + +// regulator_has_full_constraints(); + + tegra_init_suspend(&colibri_t20_suspend_data); + + return 0; +} diff --git a/arch/arm/mach-tegra/board-colibri_t20.c b/arch/arm/mach-tegra/board-colibri_t20.c new file mode 100644 index 000000000000..2caafbbad76e --- /dev/null +++ b/arch/arm/mach-tegra/board-colibri_t20.c @@ -0,0 +1,977 @@ +/* + * arch/arm/mach-tegra/board-colibri_t20.c + * + * Copyright (C) 2011 Toradex, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/setup.h> + +#include <linux/clk.h> +#include <linux/dma-mapping.h> +#include <linux/gpio_keys.h> +#include <linux/i2c.h> +#include <linux/i2c-tegra.h> +#include <linux/init.h> +#include <linux/input.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/memblock.h> +#include <linux/mfd/tps6586x.h> +#include <linux/platform_data/tegra_usb.h> +#include <linux/platform_device.h> +#include <linux/serial_8250.h> +#include <linux/slab.h> +#include <linux/spi/spi.h> +#include <linux/suspend.h> +#include <linux/tegra_uart.h> +#include <linux/wm97xx.h> + +#include <mach/audio.h> +#include <mach/clk.h> +#include <mach/gpio.h> +#include <mach/iomap.h> +#include <mach/irqs.h> +#include <mach/nand.h> +#include <mach/sdhci.h> +#include <mach/spdif.h> +#include <mach/usb_phy.h> + +#include "board-colibri_t20.h" +#include "board.h" +#include "clock.h" +#include "devices.h" +#include "gpio-names.h" +//move to board-colibri_t20-power.c? +#include "pm.h" + +#ifdef CONFIG_TEGRA_OSC_CRYSTAL_FREQ_12MHZ +#define OSC_CTL_FREQ 12000000 +#else +#ifdef CONFIG_TEGRA_OSC_CRYSTAL_FREQ_13MHZ +#define OSC_CTL_FREQ 13000000 +#else +#error choose either TEGRA_OSC_CRYSTAL_FREQ_12MHZ or \ +TEGRA_OSC_CRYSTAL_FREQ_13MHZ +#endif +#endif + +/* ADC */ + +static struct wm97xx_batt_pdata colibri_t20_adc_pdata = { + .batt_aux = WM97XX_AUX_ID1, /* AD0 - ANALOG_IN0 */ + .temp_aux = WM97XX_AUX_ID2, /* AD1 - ANALOG_IN1 */ + .charge_gpio = -1, + .batt_div = 1, + .batt_mult = 1, + .temp_div = 1, + .temp_mult = 1, + .batt_name = "colibri_t20-analog_inputs", +}; + +static struct wm97xx_pdata colibri_t20_wm97xx_pdata = { + .batt_pdata = &colibri_t20_adc_pdata, +}; + +/* Audio */ + +static struct platform_device colibri_t20_audio_device = { + .name = "colibri_t20-snd-wm9715l", + .id = 0, +// .dev = { +// .platform_data = &colibri_t20_audio_pdata, +// }, +}; + +#ifdef CAMERA_INTERFACE +/* Camera */ +static struct platform_device tegra_camera = { + .name = "tegra_camera", + .id = -1, +}; +#endif /* CAMERA_INTERFACE */ + +/* Clock */ +static __initdata struct tegra_clk_init_table colibri_t20_clk_init_table[] = { + /* name parent rate enabled */ +#if 1 + {"blink", "clk_32k", 32768, false}, + /* SMSC3340 REFCLK 24 MHz */ + {"pll_p_out4", "pll_p", 24000000, true}, + {"pwm", "clk_32k", 32768, false}, + {"i2s1", "pll_a_out0", 0, false}, + {"i2s2", "pll_a_out0", 0, false}, + {"spdif_out", "pll_a_out0", 0, false}, + +//required otherwise getting disabled by "Disabling clocks left on by bootloader" stage + {"uarta", "pll_p", 216000000, true}, + +//required otherwise uses pll_p_out4 as parent and changing its rate to 72 MHz + {"sclk", "pll_p_out3", 108000000, true }, + + {"ac97", "pll_a_out0", 24576000, true}, + /* WM9715L XTL_IN 24.576 MHz */ +//[ 0.372722] Unable to set parent pll_a_out0 of clock cdev1: -38 +// {"cdev1", "pll_a_out0", 24576000, true}, +// {"pll_a_out0", "pll_a", 24576000, true}, + + {NULL, NULL, 0, 0}, +#else + {"2d", "pll_c", 300000000, true}, + {"3d", "pll_c", 300000000, true}, + {"ac97", "pll_a_out0", 24576000, true}, + /* afi ? */ + {"audio", "pll_a_out0", 24576000, true}, + {"audio_2x", "audio", 49152000, false}, + /* bit stream engine for audio applications */ + {"bsea", "clk_m", OSC_CTL_FREQ, false}, + /* encryption/security ? */ + {"bsev", "clk_m", OSC_CTL_FREQ, false}, + {"clk_32k", NULL, 32768, true}, + {"clk_d", "clk_m", OSC_CTL_FREQ*2, true}, + {"clk_dev1", NULL, 26000000, true}, + {"clk_m", NULL, OSC_CTL_FREQ, true}, + {"csi", "pll_p_out3", 72000000, false}, + /* coresight debug registers */ + {"csite", "pll_p", 144000000, true}, + /* required for vi_sensor ? */ + {"csus", "clk_m", OSC_CTL_FREQ, true}, + /* Zoran TV encoder */ + {"cve", "clk_m", OSC_CTL_FREQ, false}, + {"disp1", "pll_p", 216000000, true}, + {"disp2", "clk_m", OSC_CTL_FREQ, true}, + {"dsi", "pll_d", 594000000, false}, + /* dynamic voltage controller module */ + {"dvc", "clk_m", 3000000, false}, + {"dvc_i2c", "pll_p_out3", 72000000, true}, + /* video encoder pre-processor */ + {"epp", "pll_m", 111000000, true}, + {"hclk", "sclk", 240000000, true}, + {"hdmi", "clk_m", OSC_CTL_FREQ, false}, + {"host1x", "pll_p", 166000000, true}, + {"i2c1", "clk_m", 3000000, false}, + {"i2c1_i2c", "pll_p_out3", 72000000, true}, + {"i2c2", "clk_m", 3000000, false}, + {"i2c2_i2c", "pll_p_out3", 72000000, true}, + {"i2c3", "clk_m", 3000000, false}, + {"i2c3_i2c", "pll_p_out3", 72000000, true}, + {"i2s1", "pll_a_out0", 11289600, true}, + {"i2s2", "clk_m", 11289600, false}, + {"ide", "clk_m", OSC_CTL_FREQ, false}, + /* image signal processor */ + {"isp", "clk_m", OSC_CTL_FREQ, true}, + {"kbc", "clk_32k", 32768, true}, + /* ? */ + {"la", "clk_m", OSC_CTL_FREQ, false}, + {"mipi", "clk_m", OSC_CTL_FREQ, false}, + /* video encoder */ + {"mpe", "pll_m", 111000000, true}, + {"ndflash", "pll_p", 108000000, true}, +// {"ndflash", "pll_p", 144000000, true}, +// {"ndflash", "pll_c", 150000000, true}, +// {"ndflash", "pll_m", 160333333, true}, +// {"ndflash", "clk_m", 162500000, true}, + {"nor", "pll_p", 86500000, true}, + /* one wire controller */ + {"owr", "clk_m", OSC_CTL_FREQ, false}, + {"pclk", "hclk", 120000000, true}, + {"pll_a", "pll_p_out1", 73728000, true}, + /* WM9715L XTL_IN 24.576 MHz */ + {"pll_a_out0", "pll_a", 24576000, true}, + {"pll_c", "clk_m", 600000000, true}, + {"pll_c_out1", "pll_c", 240000000, true}, + {"pll_d", "clk_m", 594000000, false}, + {"pll_d_out0", "pll_d", 297000000, false}, + {"pll_m", "clk_m", 721500000, true}, + {"pll_p", "clk_m", 216000000, true}, + {"pll_p_out1", "pll_p", 28800000, true}, + {"pll_p_out2", "pll_p", 48000000, true}, + {"pll_p_out3", "pll_p", 72000000, true}, + /* SMSC3340 REFCLK 24 MHz */ + {"pll_p_out4", "pll_p", 24000000, true}, + {"pll_s", "clk_32k", 32768, false}, + {"pll_u", "clk_m", OSC_CTL_FREQ*40,true}, + {"pwm", "clk_32k", 32768, false}, + {"rtc", "clk_32k", 32768, true}, + {"sbc1", "clk_m", OSC_CTL_FREQ, false}, + {"sbc2", "clk_m", OSC_CTL_FREQ, false}, + {"sbc3", "clk_m", OSC_CTL_FREQ, false}, + {"sbc4", "clk_m", OSC_CTL_FREQ, false}, + {"sclk", "pll_c_out1", 240000000, true}, + {"sdmmc1", "pll_p", 48000000, false}, + {"sdmmc2", "pll_p", 48000000, false}, + {"sdmmc3", "pll_p", 48000000, false}, + {"sdmmc4", "pll_p", 48000000, false}, + {"spdif_in", "pll_m", 22579000, true}, + {"spdif_out", "pll_a_out0", 5644800, true}, + {"spi", "clk_m", OSC_CTL_FREQ, false}, + {"timer", "clk_m", OSC_CTL_FREQ, true}, + {"tvdac", "clk_m", OSC_CTL_FREQ, true}, + {"tvo", "clk_m", OSC_CTL_FREQ, false}, + /* three-wire controller */ + {"twc", "clk_m", OSC_CTL_FREQ, false}, + {"uarta", "pll_p", 216000000, true}, + {"uartb", "clk_m", OSC_CTL_FREQ, false}, + {"uartc", "pll_p", 216000000, false}, + {"uartd", "clk_m", OSC_CTL_FREQ, false}, + {"uarte", "clk_m", OSC_CTL_FREQ, false}, + {"usb2", "clk_m", OSC_CTL_FREQ, true}, + {"usb3", "clk_m", OSC_CTL_FREQ, true}, + {"usbd", "clk_m", OSC_CTL_FREQ, false}, + /* vector co-processor (vcp) */ + /* video decoder engine */ + {"vde", "pll_c", 240000000, false}, + {"vfir", "clk_m", OSC_CTL_FREQ, false}, + /* video input block */ + {"vi", "pll_m", 111000000, true}, + /* CIF_MCLK 27 MHz */ + {"vi_sensor", "pll_m", 27000000, true}, + /* misc I/O */ + {"xio", "clk_m", OSC_CTL_FREQ, false}, +#endif + {NULL, NULL, 0, 0}, +}; + +/* GPIO */ + +static struct gpio colibri_t20_gpios[] = { +//conflicts with CAN interrupt on Colibri Evaluation Board and MECS Tellurium xPOD1 CAN + {TEGRA_GPIO_PA0, GPIOF_OUT_INIT_LOW, "SODIMM pin 73"}, + {TEGRA_GPIO_PA2, GPIOF_OUT_INIT_LOW, "SODIMM pin 186"}, + {TEGRA_GPIO_PA3, GPIOF_OUT_INIT_LOW, "SODIMM pin 184"}, + {TEGRA_GPIO_PB2, GPIOF_OUT_INIT_LOW, "SODIMM pin 154"}, +//conflicts with MECS Tellurium xPOD2 SSPCLK2 + {TEGRA_GPIO_PB6, GPIOF_OUT_INIT_LOW, "SODIMM pin 55"}, +//conflicts with MECS Tellurium xPOD2 SSPFRM2 + {TEGRA_GPIO_PB7, GPIOF_OUT_INIT_LOW, "SODIMM pin 63"}, +#ifndef CAMERA_INTERFACE + {TEGRA_GPIO_PD5, GPIOF_OUT_INIT_LOW, "SODI-98, Iris X16-13"}, + {TEGRA_GPIO_PD6, GPIOF_OUT_INIT_LOW, "SODIMM pin 81"}, + {TEGRA_GPIO_PD7, GPIOF_OUT_INIT_LOW, "SODIMM pin 94"}, +#endif + {TEGRA_GPIO_PI3, GPIOF_OUT_INIT_LOW, "SODIMM pin 130"}, + {TEGRA_GPIO_PI4, GPIOF_OUT_INIT_LOW, "SODIMM pin 87"}, + {TEGRA_GPIO_PI6, GPIOF_OUT_INIT_LOW, "SODIMM pin 132"}, + {TEGRA_GPIO_PK0, GPIOF_OUT_INIT_LOW, "SODIMM pin 150"}, + {TEGRA_GPIO_PK1, GPIOF_OUT_INIT_LOW, "SODIMM pin 152"}, +//conflicts with CAN reset on MECS Tellurium xPOD1 CAN + {TEGRA_GPIO_PK4, GPIOF_OUT_INIT_LOW, "SODIMM pin 106"}, +// {TEGRA_GPIO_PK5, GPIOF_OUT_INIT_LOW, "USBC_DET"}, +#ifndef CAMERA_INTERFACE + {TEGRA_GPIO_PL0, GPIOF_OUT_INIT_LOW, "SOD-101, Iris X16-16"}, + {TEGRA_GPIO_PL1, GPIOF_OUT_INIT_LOW, "SOD-103, Iris X16-15"}, +//conflicts with Ethernet interrupt on Protea + {TEGRA_GPIO_PL2, GPIOF_OUT_INIT_LOW, "SODI-79, Iris X16-19"}, + {TEGRA_GPIO_PL3, GPIOF_OUT_INIT_LOW, "SODI-97, Iris X16-17"}, + {TEGRA_GPIO_PL4, GPIOF_OUT_INIT_LOW, "SODIMM pin 67"}, + {TEGRA_GPIO_PL5, GPIOF_OUT_INIT_LOW, "SODIMM pin 59"}, + {TEGRA_GPIO_PL6, GPIOF_OUT_INIT_LOW, "SODI-85, Iris X16-18"}, + {TEGRA_GPIO_PL7, GPIOF_OUT_INIT_LOW, "SODIMM pin 65"}, +#endif + {TEGRA_GPIO_PN0, GPIOF_OUT_INIT_LOW, "SODIMM pin 174"}, + {TEGRA_GPIO_PN1, GPIOF_OUT_INIT_LOW, "SODIMM pin 176"}, + {TEGRA_GPIO_PN2, GPIOF_OUT_INIT_LOW, "SODIMM pin 178"}, + {TEGRA_GPIO_PN3, GPIOF_OUT_INIT_LOW, "SODIMM pin 180"}, + {TEGRA_GPIO_PN4, GPIOF_OUT_INIT_LOW, "SODIMM pin 160"}, + {TEGRA_GPIO_PN5, GPIOF_OUT_INIT_LOW, "SODIMM pin 158"}, + {TEGRA_GPIO_PN6, GPIOF_OUT_INIT_LOW, "SODIMM pin 162"}, +//conflicts with ADDRESS13 + {TEGRA_GPIO_PP4, GPIOF_OUT_INIT_LOW, "SODIMM pin 120"}, +//conflicts with ADDRESS14 + {TEGRA_GPIO_PP5, GPIOF_OUT_INIT_LOW, "SODIMM pin 122"}, +//conflicts with ADDRESS15 + {TEGRA_GPIO_PP6, GPIOF_OUT_INIT_LOW, "SODIMM pin 124"}, + {TEGRA_GPIO_PP7, GPIOF_OUT_INIT_LOW, "SODIMM pin 188"}, +#ifndef CAMERA_INTERFACE + {TEGRA_GPIO_PT0, GPIOF_OUT_INIT_LOW, "SODIMM pin 96"}, + {TEGRA_GPIO_PT1, GPIOF_OUT_INIT_LOW, "SODIMM pin 75"}, + {TEGRA_GPIO_PT2, GPIOF_OUT_INIT_LOW, "SODIMM pin 69"}, + {TEGRA_GPIO_PT3, GPIOF_OUT_INIT_LOW, "SODIMM pin 77"}, +//conflicts with BL_ON +// {TEGRA_GPIO_PT4, GPIOF_OUT_INIT_LOW, "SODIMM pin 71"}, +#endif +//conflicts with ADDRESS12 + {TEGRA_GPIO_PU6, GPIOF_OUT_INIT_LOW, "SODIMM pin 118"}, +//conflicts with power key (WAKE1) + {TEGRA_GPIO_PV3, GPIOF_OUT_INIT_LOW, "SODI-45, Iris X16-20"}, + {TEGRA_GPIO_PX0, GPIOF_OUT_INIT_LOW, "SODIMM pin 142"}, + {TEGRA_GPIO_PX1, GPIOF_OUT_INIT_LOW, "SODIMM pin 140"}, + {TEGRA_GPIO_PX2, GPIOF_OUT_INIT_LOW, "SODIMM pin 138"}, + {TEGRA_GPIO_PX3, GPIOF_OUT_INIT_LOW, "SODIMM pin 136"}, + {TEGRA_GPIO_PX4, GPIOF_OUT_INIT_LOW, "SODIMM pin 134"}, + {TEGRA_GPIO_PX6, GPIOF_OUT_INIT_LOW, "102, I X13 ForceOFF#"}, + {TEGRA_GPIO_PX7, GPIOF_OUT_INIT_LOW, "104, I X14 ForceOFF#"}, + {TEGRA_GPIO_PZ2, GPIOF_OUT_INIT_LOW, "SODIMM pin 156"}, + {TEGRA_GPIO_PZ4, GPIOF_OUT_INIT_LOW, "SODIMM pin 164"}, +#ifndef SDHCI_8BIT + {TEGRA_GPIO_PAA4, GPIOF_OUT_INIT_LOW, "SODIMM pin 166"}, + {TEGRA_GPIO_PAA5, GPIOF_OUT_INIT_LOW, "SODIMM pin 168"}, + {TEGRA_GPIO_PAA6, GPIOF_OUT_INIT_LOW, "SODIMM pin 170"}, + {TEGRA_GPIO_PAA7, GPIOF_OUT_INIT_LOW, "SODIMM pin 172"}, +#endif + {TEGRA_GPIO_PBB2, GPIOF_OUT_INIT_LOW, "SOD-133, Iris X16-14"}, + {TEGRA_GPIO_PBB3, GPIOF_OUT_INIT_LOW, "SODIMM pin 127"}, + {TEGRA_GPIO_PBB4, GPIOF_OUT_INIT_LOW, "SODIMM pin 22"}, + {TEGRA_GPIO_PBB5, GPIOF_OUT_INIT_LOW, "SODIMM pin 24"}, +}; + +static void colibri_t20_gpio_init(void) +{ + int i = 0; + int length = sizeof(colibri_t20_gpios) / sizeof(struct gpio); + int err = 0; + + for (i = 0; i < length; i++) { + err = gpio_request_one(colibri_t20_gpios[i].gpio, + colibri_t20_gpios[i].flags, + colibri_t20_gpios[i].label); + + if (err) { + pr_warning("gpio_request(%s)failed, err = %d", + colibri_t20_gpios[i].label, err); + } else { + tegra_gpio_enable(colibri_t20_gpios[i].gpio); + gpio_export(colibri_t20_gpios[i].gpio, true); + /* gpio direction was always out when exported so + explicitly making it in */ + gpio_direction_input(colibri_t20_gpios[i].gpio); + } + } +} + +/* I2C*/ + +/* GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier board) */ +static struct i2c_board_info colibri_t20_i2c_bus1_board_info[] = { + { + /* M41T0M6 real time clock on Iris carrier board */ + I2C_BOARD_INFO("rtc-ds1307", 0x68), + .type = "m41t00", + }, +#if 0 +//#ifdef CAMERA_INTERFACE + { + I2C_BOARD_INFO("adv7180", 0x21), + }, + { + I2C_BOARD_INFO("mt9v111", 0x5c), + .platform_data = (void *)&camera_mt9v111_data, + }, +#endif /* CAMERA_INTERFACE */ +}; + +static struct tegra_i2c_platform_data colibri_t20_i2c1_platform_data = { + .adapter_nr = 0, + .bus_count = 1, + .bus_clk_rate = {400000, 0}, + .slave_addr = 0x00FC, + .scl_gpio = {TEGRA_GPIO_PC4, 0}, /* I2C_SDA */ + .sda_gpio = {TEGRA_GPIO_PC5, 0}, /* I2C_SCL */ + .arb_recovery = arb_lost_recovery, +}; + +static const struct tegra_pingroup_config i2c2_ddc = { + .pingroup = TEGRA_PINGROUP_DDC, + .func = TEGRA_MUX_I2C2, +}; + +/* GEN2_I2C: SODIMM pin 93/99 */ +static const struct tegra_pingroup_config i2c2_gen2 = { + .pingroup = TEGRA_PINGROUP_PTA, + .func = TEGRA_MUX_I2C2, +}; + +static struct tegra_i2c_platform_data colibri_t20_i2c2_platform_data = { + .adapter_nr = 1, + .bus_count = 2, + .bus_clk_rate = {10000, 10000}, + .bus_mux = {&i2c2_ddc, &i2c2_gen2}, + .bus_mux_len = {1, 1}, + .slave_addr = 0x00FC, + .scl_gpio = {0, TEGRA_GPIO_PT5}, + .sda_gpio = {0, TEGRA_GPIO_PT6}, + .arb_recovery = arb_lost_recovery, +}; + +/* CAM_I2C SODIMM pin 127/133 */ +static struct tegra_i2c_platform_data colibri_t20_i2c3_platform_data = { + .adapter_nr = 3, + .bus_count = 1, + .bus_clk_rate = {400000, 0}, + .slave_addr = 0x00FC, + .scl_gpio = {TEGRA_GPIO_PBB2, 0}, + .sda_gpio = {TEGRA_GPIO_PBB3, 0}, + .arb_recovery = arb_lost_recovery, +}; + +/* PWR_I2C: power I2C to PMIC and temperature sensor */ +static struct tegra_i2c_platform_data colibri_t20_dvc_platform_data = { + .adapter_nr = 4, + .bus_count = 1, + .bus_clk_rate = {400000, 0}, + .is_dvc = true, + .scl_gpio = {TEGRA_GPIO_PZ6, 0}, + .sda_gpio = {TEGRA_GPIO_PZ7, 0}, + .arb_recovery = arb_lost_recovery, +}; + +static void colibri_t20_i2c_init(void) +{ + tegra_i2c_device1.dev.platform_data = &colibri_t20_i2c1_platform_data; + tegra_i2c_device2.dev.platform_data = &colibri_t20_i2c2_platform_data; + tegra_i2c_device3.dev.platform_data = &colibri_t20_i2c3_platform_data; + tegra_i2c_device4.dev.platform_data = &colibri_t20_dvc_platform_data; + + platform_device_register(&tegra_i2c_device1); + platform_device_register(&tegra_i2c_device2); + platform_device_register(&tegra_i2c_device3); + platform_device_register(&tegra_i2c_device4); + + i2c_register_board_info(0, colibri_t20_i2c_bus1_board_info, ARRAY_SIZE(colibri_t20_i2c_bus1_board_info)); +} + +/* Keys */ + +/* MMC/SD */ + +static struct tegra_sdhci_platform_data colibri_t20_sdhci_platform_data = { + .cd_gpio = TEGRA_GPIO_PC7, /* MM_CD */ +#ifndef SDHCI_8BIT + .is_8bit = 0, +#else + .is_8bit = 1, +#endif + .power_gpio = -1, + .wp_gpio = -1, +}; + +int __init colibri_t20_sdhci_init(void) +{ + tegra_gpio_enable(colibri_t20_sdhci_platform_data.cd_gpio); + + tegra_sdhci_device4.dev.platform_data = + &colibri_t20_sdhci_platform_data; + platform_device_register(&tegra_sdhci_device4); + + return 0; +} + +/* NAND */ + +static struct tegra_nand_chip_parms nand_chip_parms[] = { + /* Micron MT29F4G08ABBDAH4 */ + [0] = { + .vendor_id = 0x2C, + .device_id = 0xAC, + .read_id_fourth_byte = 0x15, + .capacity = 512, + .timing = { + .trp = 12, + .trh = 10, /* tREH */ + .twp = 12, + .twh = 10, + .tcs = 20, /* Max(tCS, tCH, tALS, tALH) */ + .twhr = 80, + .tcr_tar_trr = 20, /* Max(tCR, tAR, tRR) */ + .twb = 100, + .trp_resp = 12, /* tRP */ + .tadl = 70, + }, + }, + /* Micron MT29F4G08ABBEAH4 */ + [1] = { + .vendor_id = 0x2C, + .device_id = 0xAC, + .read_id_fourth_byte = 0x26, + .capacity = 512, + .timing = { + .trp = 15, + .trh = 10, /* tREH */ + .twp = 15, + .twh = 10, + .tcs = 25, /* Max(tCS, tCH, tALS, tALH) */ + .twhr = 80, + .tcr_tar_trr = 20, /* Max(tCR, tAR, tRR) */ + .twb = 100, + .trp_resp = 15, /* tRP */ + .tadl = 100, + }, + }, + /* Micron MT29F8G08ABCBB on Colibri T20 before V1.2 */ + [2] = { + .vendor_id = 0x2C, + .device_id = 0x38, + .read_id_fourth_byte = 0x26, + .capacity = 1024, + .timing = { + /* timing mode 4 */ + .trp = 12, + .trh = 10, /* tREH */ + .twp = 12, + .twh = 10, + .tcs = 20, /* Max(tCS, tCH, tALS, tALH) */ + .twhr = 60, + .tcr_tar_trr = 20, /* Max(tCR, tAR, tRR) */ + .twb = 100, + .trp_resp = 12, /* tRP */ + .tadl = 70, + }, + }, + /* Micron MT29F8G08ADBDAH4 */ + [3] = { + .vendor_id = 0x2C, + .device_id = 0xA3, + .read_id_fourth_byte = 0x15, + .capacity = 1024, + .timing = { + .trp = 12, + .trh = 10, /* tREH */ + .twp = 12, + .twh = 10, + .tcs = 20, /* Max(tCS, tCH, tALS, tALH) */ + .twhr = 80, + .tcr_tar_trr = 20, /* Max(tCR, tAR, tRR) */ + .twb = 100, + .trp_resp = 12, /* tRP */ + .tadl = 70, + }, + }, + /* Micron MT29F8G08ABBCA */ + [4] = { + .vendor_id = 0x2C, + .device_id = 0xA3, + .read_id_fourth_byte = 0x26, + .capacity = 1024, + .timing = { + .trp = 15, + .trh = 10, /* tREH */ + .twp = 15, + .twh = 10, + .tcs = 25, /* Max(tCS, tCH, tALS, tALH) */ + .twhr = 80, + .tcr_tar_trr = 20, /* Max(tCR, tAR, tRR) */ + .twb = 100, + .trp_resp = 15, /* tRP */ + .tadl = 100, + }, + }, +}; + +struct tegra_nand_platform colibri_t20_nand_data = { + .max_chips = 8, + .chip_parms = nand_chip_parms, + .nr_chip_parms = ARRAY_SIZE(nand_chip_parms), + .wp_gpio = TEGRA_GPIO_PS0, +}; + +static struct resource resources_nand[] = { + [0] = { + .start = INT_NANDFLASH, + .end = INT_NANDFLASH, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tegra_nand_device = { + .name = "tegra_nand", + .id = -1, + .num_resources = ARRAY_SIZE(resources_nand), + .resource = resources_nand, + .dev = { + .platform_data = &colibri_t20_nand_data, + }, +}; + +/* RTC */ +static struct resource tegra_rtc_resources[] = { + [0] = { + .start = TEGRA_RTC_BASE, + .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = INT_RTC, + .end = INT_RTC, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tegra_rtc_device = { + .name = "tegra_rtc", + .id = -1, + .resource = tegra_rtc_resources, + .num_resources = ARRAY_SIZE(tegra_rtc_resources), +}; + +/* SPI */ + +static struct spi_board_info tegra_spi_devices[] __initdata = { + { + .bus_num = 3, + .chip_select = 0, + .irq = 0, + .max_speed_hz = 50000000, + .modalias = "spidev", + .mode = SPI_MODE_0, + .platform_data = NULL, + }, +}; + +static void __init colibri_t20_register_spidev(void) +{ + spi_register_board_info(tegra_spi_devices, + ARRAY_SIZE(tegra_spi_devices)); +} + +/* UART */ + +static struct platform_device *colibri_t20_uart_devices[] __initdata = { + &tegra_uarta_device, + &tegra_uartb_device, + &tegra_uartd_device, +}; + +static struct uart_clk_parent uart_parent_clk[] = { +#if 1 + [0] = {.name = "pll_m"}, + [1] = {.name = "pll_p"}, + [2] = {.name = "clk_m"}, +#else + [0] = {.name = "clk_m"}, + [1] = {.name = "pll_m"}, + [2] = {.name = "pll_p"}, +#endif +}; + +static struct tegra_uart_platform_data colibri_t20_uart_pdata; + +static void __init uart_debug_init(void) +{ + unsigned long rate; + struct clk *c; + + /* UARTA is the debug port. */ + pr_info("Selecting UARTA as the debug console\n"); + colibri_t20_uart_devices[0] = &debug_uarta_device; + debug_uart_port_base = ((struct plat_serial8250_port *)( + debug_uarta_device.dev.platform_data))->mapbase; + debug_uart_clk = clk_get_sys("serial8250.0", "uarta"); + + /* Clock enable for the debug channel */ + if (!IS_ERR_OR_NULL(debug_uart_clk)) { + rate = ((struct plat_serial8250_port *)( + debug_uarta_device.dev.platform_data))->uartclk; + pr_info("The debug console clock name is %s\n", + debug_uart_clk->name); + c = tegra_get_clock_by_name("pll_p"); + if (IS_ERR_OR_NULL(c)) + pr_err("Not getting the parent clock pll_p\n"); + else + clk_set_parent(debug_uart_clk, c); + + clk_enable(debug_uart_clk); + clk_set_rate(debug_uart_clk, rate); + } else { + pr_err("Not getting the clock %s for debug console\n", + debug_uart_clk->name); + } +} + +static void __init colibri_t20_uart_init(void) +{ + int i; + struct clk *c; + + for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) { + c = tegra_get_clock_by_name(uart_parent_clk[i].name); + if (IS_ERR_OR_NULL(c)) { + pr_err("Not able to get the clock for %s\n", + uart_parent_clk[i].name); + continue; + } + uart_parent_clk[i].parent_clk = c; + uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c); + } + colibri_t20_uart_pdata.parent_clk_list = uart_parent_clk; + colibri_t20_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk); + tegra_uarta_device.dev.platform_data = &colibri_t20_uart_pdata; + tegra_uartb_device.dev.platform_data = &colibri_t20_uart_pdata; + tegra_uartd_device.dev.platform_data = &colibri_t20_uart_pdata; + + /* Register low speed only if it is selected */ + if (!is_tegra_debug_uartport_hs()) + uart_debug_init(); + + platform_add_devices(colibri_t20_uart_devices, + ARRAY_SIZE(colibri_t20_uart_devices)); +} + +/* USB */ + +static struct tegra_utmip_config utmi_phy_config[] = { + [0] = { + .hssync_start_delay = 9, + .idle_wait_delay = 17, + .elastic_limit = 16, + .term_range_adj = 6, + .xcvr_setup = 15, + .xcvr_setup_offset = 0, + .xcvr_use_fuses = 1, + .xcvr_lsfslew = 2, + .xcvr_lsrslew = 2, + }, + [1] = { + .hssync_start_delay = 9, + .idle_wait_delay = 17, + .elastic_limit = 16, + .term_range_adj = 6, + .xcvr_setup = 8, + .xcvr_setup_offset = 0, + .xcvr_use_fuses = 1, + .xcvr_lsfslew = 2, + .xcvr_lsrslew = 2, + }, +}; + +static struct tegra_ulpi_config colibri_t20_ehci2_ulpi_phy_config = { + .clk = "cdev2", + .reset_gpio = TEGRA_GPIO_PV1, /* USB3340 RESETB */ +}; + +static struct tegra_ehci_platform_data colibri_t20_ehci2_ulpi_platform_data = { + .operating_mode = TEGRA_USB_HOST, + .power_down_on_bus_suspend = 1, + .phy_config = &colibri_t20_ehci2_ulpi_phy_config, + .phy_type = TEGRA_USB_PHY_TYPE_LINK_ULPI, +}; + +static struct usb_phy_plat_data tegra_usb_phy_pdata[] = { + [0] = { + .instance = 0, +//[ 4.309032] Failed to register IRQ +//tegra_gpio_enable required? +// .vbus_irq = TEGRA_GPIO_PK5, /* USBC_DET */ + .vbus_gpio = -1, + }, + [1] = { + .instance = 1, + .vbus_gpio = -1, +// .vbus_gpio = TEGRA_GPIO_PBB1, /* ETHERNET_VBUS_GPIO */ + }, + [2] = { + .instance = 2, + .vbus_gpio = TEGRA_GPIO_PW2, /* USBH_PEN */ + .vbus_gpio_inverted = 1, + }, +}; + +static struct tegra_ehci_platform_data tegra_ehci_pdata[] = { + [0] = { + .phy_config = &utmi_phy_config[0], + .operating_mode = TEGRA_USB_HOST, + .power_down_on_bus_suspend = 1, + }, + [1] = { + .phy_config = &colibri_t20_ehci2_ulpi_phy_config, + .operating_mode = TEGRA_USB_HOST, + .power_down_on_bus_suspend = 1, + .phy_type = TEGRA_USB_PHY_TYPE_LINK_ULPI, + }, + [2] = { + .phy_config = &utmi_phy_config[1], + .operating_mode = TEGRA_USB_HOST, + .power_down_on_bus_suspend = 1, + .hotplug = 1, + }, +}; + +static struct tegra_otg_platform_data tegra_otg_pdata = { + .ehci_device = &tegra_ehci1_device, + .ehci_pdata = &tegra_ehci_pdata[0], +}; + +static void colibri_t20_usb_init(void) +{ +//no improvement +// tegra_gpio_enable(TEGRA_GPIO_PK5); +#ifdef CONFIG_USB_SUPPORT + tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata)); +#endif + + /* OTG should be the first to be registered + EHCI instance 0: USB1_DP/N -> USBOTG_P/N */ + tegra_otg_device.dev.platform_data = &tegra_otg_pdata; + platform_device_register(&tegra_otg_device); + platform_device_register(&tegra_udc_device); + +// + tegra_ehci2_device.dev.platform_data=&tegra_ehci_pdata[1]; +// + platform_device_register(&tegra_ehci2_device); + + /* EHCI instance 2: USB3_DP/N -> USBH1_P/N */ + tegra_ehci3_device.dev.platform_data=&tegra_ehci_pdata[2]; + platform_device_register(&tegra_ehci3_device); + +#ifdef MECS_TELLURIUM +//SD card multiplexing: pull GPIO_PT2 and GPIO_PBB2 low +//working even without any modifications + { + int gpio_status; + unsigned int i2c_scl = TEGRA_GPIO_PC5; + unsigned int i2c_sda = TEGRA_GPIO_PC4; + unsigned int tellurium_usb_hub_reset = TEGRA_GPIO_PBB3; + + printk("MECS Tellurium USB Hub Initialisation\n"); + + /* configure USB hub reset line as output and pull low into reset */ + gpio_status = gpio_request(tellurium_usb_hub_reset, "USB_HUB_RESET"); + if (gpio_status < 0) + pr_warning("USB_HUB_RESET request GPIO FAILED\n"); + tegra_gpio_enable(tellurium_usb_hub_reset); + gpio_status = gpio_direction_output(tellurium_usb_hub_reset, 0); + if (gpio_status < 0) + pr_warning("USB_HUB_RESET request GPIO DIRECTION FAILED\n"); + + /* configure I2C pins as outputs and pull low */ + tegra_gpio_enable(i2c_scl); + gpio_status = gpio_direction_output(i2c_scl, 0); + if (gpio_status < 0) + pr_warning("I2C_SCL request GPIO DIRECTION FAILED\n"); + tegra_gpio_enable(i2c_sda); + gpio_status = gpio_direction_output(i2c_sda, 0); + if (gpio_status < 0) + pr_warning("I2C_SDA request GPIO DIRECTION FAILED\n"); + + /* pull USB hub out of reset */ + gpio_set_value(tellurium_usb_hub_reset, 1); + + /* release I2C pins again */ + tegra_gpio_disable(i2c_scl); + tegra_gpio_disable(i2c_sda); + } +#endif /* MECS_TELLURIUM */ +} + +static struct platform_device *colibri_t20_devices[] __initdata = { + &tegra_rtc_device, + &tegra_nand_device, + + &tegra_pmu_device, + &tegra_gart_device, + &tegra_aes_device, +#ifdef CONFIG_KEYBOARD_GPIO +// &colibri_t20_keys_device, +#endif + &tegra_wdt_device, + &tegra_avp_device, +#ifdef CAMERA_INTERFACE + &tegra_camera, +#endif + &tegra_ac97_device, + &tegra_spdif_device, + &tegra_das_device, + &spdif_dit_device, +//bluetooth + &tegra_pcm_device, + &colibri_t20_audio_device, + + &tegra_spi_device4, +}; + +static void __init tegra_colibri_t20_init(void) +{ +#if 0 +tegra_clk_init_from_table(colibri_t20_clk_init_table); +colibri_t20_pinmux_init(); +colibri_t20_i2c_init(); +colibri_t20_uart_init(); +tegra_ehci2_device.dev.platform_data += &colibri_t20_ehci2_ulpi_platform_data; +platform_add_devices(colibri_t20_devices, +ARRAY_SIZE(colibri_t20_devices)); +colibri_t20_sdhci_init(); +colibri_t20_regulator_init(); + +//disabled for now: +//regulator +//panel +#else + tegra_clk_init_from_table(colibri_t20_clk_init_table); + colibri_t20_pinmux_init(); + colibri_t20_i2c_init(); + colibri_t20_uart_init(); +// + tegra_ac97_device.dev.platform_data = &colibri_t20_wm97xx_pdata; +// + tegra_ehci2_device.dev.platform_data + = &colibri_t20_ehci2_ulpi_platform_data; + platform_add_devices(colibri_t20_devices, + ARRAY_SIZE(colibri_t20_devices)); + tegra_ram_console_debug_init(); + colibri_t20_sdhci_init(); +//charge +// + colibri_t20_regulator_init(); +// +//charger + +// tegra_das_device.dev.platform_data = &tegra_das_pdata; +// tegra_ac97_device.dev.platform_data = &tegra_audio_pdata; +// tegra_spdif_input_device.name = "spdif"; +// tegra_spdif_input_device.dev.platform_data = &tegra_spdif_audio_pdata; + +#ifdef CONFIG_KEYBOARD_GPIO +//keys +#endif + + colibri_t20_usb_init(); + colibri_t20_panel_init(); +//sensors +//emc + + colibri_t20_gpio_init(); + colibri_t20_register_spidev(); + + tegra_release_bootloader_fb(); +#endif +} + +int __init tegra_colibri_t20_protected_aperture_init(void) +{ + if (!machine_is_colibri_t20()) + return 0; + + tegra_protected_aperture_init(tegra_grhost_aperture); + return 0; +} +late_initcall(tegra_colibri_t20_protected_aperture_init); + +void __init tegra_colibri_t20_reserve(void) +{ + if (memblock_reserve(0x0, 4096) < 0) + pr_warn("Cannot reserve first 4K of memory for safety\n"); + + tegra_reserve(SZ_256M, SZ_8M + SZ_1M, SZ_16M); +} + +MACHINE_START(COLIBRI_T20, "Toradex Colibri T20") + .boot_params = 0x00000100, + .init_early = tegra_init_early, + .init_irq = tegra_init_irq, + .init_machine = tegra_colibri_t20_init, + .map_io = tegra_map_common_io, + .reserve = tegra_colibri_t20_reserve, + .timer = &tegra_timer, +MACHINE_END diff --git a/arch/arm/mach-tegra/board-colibri_t20.h b/arch/arm/mach-tegra/board-colibri_t20.h new file mode 100644 index 000000000000..900be9363702 --- /dev/null +++ b/arch/arm/mach-tegra/board-colibri_t20.h @@ -0,0 +1,49 @@ +/* + * arch/arm/mach-tegra/board-colibri_t20.h + * + * Copyright (C) 2011 Toradex, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _MACH_TEGRA_BOARD_COLIBRI_T20_H +#define _MACH_TEGRA_BOARD_COLIBRI_T20_H + +#define CONFIG_TEGRA_OSC_CRYSTAL_FREQ_13MHZ + +/* TPS6586X gpios */ +#define TPS6586X_GPIO_BASE TEGRA_NR_GPIOS +#define AVDD_DSI_CSI_ENB_GPIO (TPS6586X_GPIO_BASE + 1) /* gpio2 */ + +/* Interrupt numbers from external peripherals */ +#define TPS6586X_INT_BASE TEGRA_NR_IRQS +#define TPS6586X_INT_END (TPS6586X_INT_BASE + 32) + +/* Uncomment for camera interface support on Colibri Evaluation carrier board */ +#define CAMERA_INTERFACE + +/* Uncomment to use OTG port as host only */ +//#define HOST_ONLY + +/* Uncomment for back light and USB hub support on MECS Tellurium carrier board */ +//#define MECS_TELLURIUM + +/* Uncomment for 8-bit SDHCI on HSMMC controller (requires custom carrier board) */ +//#define SDHCI_8BIT + +/* Run framebuffer in VGA mode */ +#define TEGRA_FB_VGA + +int colibri_t20_panel_init(void); +int colibri_t20_pinmux_init(void); +int colibri_t20_regulator_init(void); + +#endif diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index f0c0cb69896f..200604694508 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -168,7 +168,9 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = { { "pll_p_out4", "pll_p", 108000000, false }, { "pll_m", "clk_m", 0, true }, { "pll_m_out1", "pll_m", 120000000, true }, - { "sclk", "pll_c_out1", 40000000, true }, +//[ 0.000000] Failed to set parent pll_c_out1 for sclk (violates clock limit 240000000) +//[ 0.000000] Unable to set parent pll_c_out1 of clock sclk: -22 + { "sclk", "pll_p_out3", 72000000, true }, { "hclk", "sclk", 40000000, true }, { "pclk", "hclk", 40000000, true }, { "mpe", "pll_c", 0, false }, diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c index 202c767550e8..079d18e2339b 100644 --- a/arch/arm/mach-tegra/devices.c +++ b/arch/arm/mach-tegra/devices.c @@ -911,6 +911,31 @@ struct platform_device debug_uarte_device = { #endif #ifdef CONFIG_ARCH_TEGRA_2x_SOC +static struct resource tegra_ac97_resource[] = { + [0] = { + .start = INT_AC97, + .end = INT_AC97, + .flags = IORESOURCE_IRQ + }, + [1] = { + .start = TEGRA_DMA_REQ_SEL_AC97, + .end = TEGRA_DMA_REQ_SEL_AC97, + .flags = IORESOURCE_DMA + }, + [2] = { + .start = TEGRA_AC97_BASE, + .end = TEGRA_AC97_BASE + TEGRA_AC97_SIZE - 1, + .flags = IORESOURCE_MEM + } +}; + +struct platform_device tegra_ac97_device = { + .name = "tegra20-ac97", + .id = -1, + .resource = tegra_ac97_resource, + .num_resources = ARRAY_SIZE(tegra_ac97_resource), +}; + static struct resource i2s_resource1[] = { [0] = { .start = INT_I2S1, diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h index 97a0c53ccfce..8b413d45d9b9 100644 --- a/arch/arm/mach-tegra/devices.h +++ b/arch/arm/mach-tegra/devices.h @@ -74,6 +74,7 @@ extern struct platform_device tegra_udc_device; extern struct platform_device tegra_ehci1_device; extern struct platform_device tegra_ehci2_device; extern struct platform_device tegra_ehci3_device; +extern struct platform_device tegra_ac97_device; extern struct platform_device tegra_i2s_device1; extern struct platform_device tegra_i2s_device2; #ifndef CONFIG_ARCH_TEGRA_2x_SOC diff --git a/arch/arm/mach-tegra/include/mach/ac97.h b/arch/arm/mach-tegra/include/mach/ac97.h new file mode 100644 index 000000000000..a62cb93123a9 --- /dev/null +++ b/arch/arm/mach-tegra/include/mach/ac97.h @@ -0,0 +1,87 @@ +/* + * arch/arm/mach-tegra/include/mach/ac97.h + * + * Copyright (C) 2011 Toradex, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __ARCH_ARM_MACH_TEGRA_AC97_H +#define __ARCH_ARM_MACH_TEGRA_AC97_H + +#include <linux/kernel.h> +#include <linux/types.h> + +/* Offsets from TEGRA_AC97_BASE */ +#define AC_AC_CTRL_0 0 +#define AC_AC_CMD_0 4 +#define AC_AC_STATUS1_0 8 +/* ... */ +#define AC_AC_FIFO1_SCR_0 0x1c +#define AC_AC_FIFO2_SCR_0 0x2c +/* ... */ +#define AC_AC_FIFO_OUT1_0 0x40 +#define AC_AC_FIFO_IN1_0 0x80 +#define AC_AC_FIFO_OUT2_0 0x140 +#define AC_AC_FIFO_IN2_0 0x180 + +/* AC_AC_CTRL_0 */ +#define AC_AC_CTRL_STM2_EN (1<<16) +#define AC_AC_CTRL_DOUBLE_SAMPLING_EN (1<<11) +#define AC_AC_CTRL_IO_CNTRL_EN (1<<10) +#define AC_AC_CTRL_HSET_DAC_EN (1<<9) +#define AC_AC_CTRL_LINE2_DAC_EN (1<<8) +#define AC_AC_CTRL_PCM_LFE_EN (1<<7) +#define AC_AC_CTRL_PCM_SUR_EN (1<<6) +#define AC_AC_CTRL_PCM_CEN_DAC_EN (1<<5) +#define AC_AC_CTRL_LINE1_DAC_EN (1<<4) +#define AC_AC_CTRL_PCM_DAC_EN (1<<3) +#define AC_AC_CTRL_COLD_RESET (1<<2) +#define AC_AC_CTRL_WARM_RESET (1<<1) +#define AC_AC_CTRL_STM_EN (1<<0) + +/* AC_AC_CMD_0 */ +#define AC_AC_CMD_CMD_ADDR_SHIFT (24) +#define AC_AC_CMD_CMD_ADDR_MASK (0xff<<AC_AC_CMD_CMD_ADDR_SHIFT) +#define AC_AC_CMD_CMD_DATA_SHIFT (8) +#define AC_AC_CMD_CMD_DATA_MASK (0xffff<<AC_AC_CMD_CMD_DATA_SHIFT) +#define AC_AC_CMD_CMD_ID_SHIFT (2) +#define AC_AC_CMD_CMD_ID_MASK (0x3<<AC_AC_CMD_CMD_ID_SHIFT) +#define AC_AC_CMD_BUSY (1<<0) + +/* AC_AC_STATUS1_0 */ +#define AC_AC_STATUS1_STA_ADDR1_SHIFT (24) +#define AC_AC_STATUS1_STA_ADDR1_MASK (0xff<<AC_AC_STATUS1_STA_ADDR1_SHIFT) +#define AC_AC_STATUS1_STA_DATA1_SHIFT (8) +#define AC_AC_STATUS1_STA_DATA1_MASK (0xffff<<AC_AC_STATUS1_STA_DATA1_SHIFT) +#define AC_AC_STATUS1_STA_VALID1 (1<<2) +#define AC_AC_STATUS1_STANDBY1 (1<<1) +#define AC_AC_STATUS1_CODEC1_RDY (1<<0) + +/* AC_AC_FIFO1_SCR_0 and AC_AC_FIFO2_SCR_0 */ +#define AC_AC_FIFOx_SCR_REC_FIFOx_MT_CNT_SHIFT (27) +#define AC_AC_FIFOx_SCR_REC_FIFOx_MT_CNT_MASK (0x1f << REC_FIFO1_MT_CNT_SHIFT) +#define AC_AC_FIFOx_SCR_PB_FIFOx_MT_CNT_SHIFT (22) +#define AC_AC_FIFOx_SCR_PB_FIFOx_MT_CNT_MASK (0x1f << PB_FIFO1_MT_CNT_SHIFT) +#define AC_AC_FIFOx_SCR_REC_FIFOx_OVERRUN_INT_STA (1<<19) +#define AC_AC_FIFOx_SCR_PB_FIFOx_UNDERRUN_INT_STA (1<<18) +#define AC_AC_FIFOx_SCR_RECx_FORCE_MT (1<<17) +#define AC_AC_FIFOx_SCR_PBx_FORCE_MT (1<<16) +#define AC_AC_FIFOx_SCR_REC_FIFOx_FULL_EN (1<<15) +#define AC_AC_FIFOx_SCR_REC_FIFOx_3QRT_FULL_EN (1<<14) +#define AC_AC_FIFOx_SCR_REC_FIFOx_QRT_FULL_EN (1<<13) +#define AC_AC_FIFOx_SCR_REC_FIFOx_NOT_MT_EN (1<<12) +#define AC_AC_FIFOx_SCR_PB_FIFOx_NOT_FULL_EN (1<<11) +#define AC_AC_FIFOx_SCR_PB_FIFOx_QRT_MT_EN (1<<10) +#define AC_AC_FIFOx_SCR_PB_FIFOx_3QRT_MT_EN (1<<9) +#define AC_AC_FIFOx_SCR_PB_FIFOx_MT_EN (1<<8) + +#endif /* __ARCH_ARM_MACH_TEGRA_AC97_H */ diff --git a/arch/arm/mach-tegra/include/mach/usb_phy.h b/arch/arm/mach-tegra/include/mach/usb_phy.h index 3ad1128e2026..46fe8c84a2f3 100644 --- a/arch/arm/mach-tegra/include/mach/usb_phy.h +++ b/arch/arm/mach-tegra/include/mach/usb_phy.h @@ -88,6 +88,7 @@ struct usb_phy_plat_data { int instance; int vbus_irq; int vbus_gpio; + int vbus_gpio_inverted; char * vbus_reg_supply; }; diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 7c207153a0e9..d694b5d6081a 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -2102,9 +2102,9 @@ static const struct audio_sources { { .name = "spdif_in", .value = 0 }, { .name = "i2s1", .value = 1 }, { .name = "i2s2", .value = 2 }, + { .name = "ac97", .value = 3 }, { .name = "pll_a_out0", .value = 4 }, #if 0 /* FIXME: not implemented */ - { .name = "ac97", .value = 3 }, { .name = "ext_audio_clk2", .value = 5 }, { .name = "ext_audio_clk1", .value = 6 }, { .name = "ext_vimclk", .value = 7 }, @@ -2427,6 +2427,7 @@ struct clk tegra_list_periph_clks[] = { PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 0x31E, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB), PERIPH_CLK("kbc", "tegra-kbc", NULL, 36, 0, 0x31E, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB), PERIPH_CLK("timer", "timer", NULL, 5, 0, 0x31E, 26000000, mux_clk_m, 0), + PERIPH_CLK("ac97", "tegra20-ac97", NULL, 3, 0, 0x31E, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("i2s1", "tegra20-i2s.0", NULL, 11, 0x100, 0x31E, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("i2s2", "tegra20-i2s.1", NULL, 18, 0x104, 0x31E, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("fuse", "fuse-tegra", "fuse", 39, 0, 0x31E, 26000000, mux_clk_m, PERIPH_ON_APB), diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index c3ce57a95574..a842e38c0d33 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -34,6 +34,7 @@ #include <mach/iomap.h> #include <mach/pinmux.h> #include "fuse.h" +#include "gpio-names.h" #ifdef CONFIG_ARCH_TEGRA_2x_SOC @@ -718,9 +719,9 @@ static struct tegra_utmip_config utmip_default[] = { }; struct usb_phy_plat_data usb_phy_data[] = { - { 0, 0, -1, NULL}, - { 0, 0, -1, NULL}, - { 0, 0, -1, NULL}, + { 0, 0, -1, (int)NULL}, + { 0, 0, -1, (int)NULL}, + { 0, 0, -1, (int)NULL}, }; static int utmip_pad_open(struct tegra_usb_phy *phy) @@ -908,6 +909,7 @@ static void vbus_enable(struct tegra_usb_phy *phy) #ifdef CONFIG_ARCH_TEGRA_2x_SOC int gpio_status; int gpio = usb_phy_data[phy->instance].vbus_gpio; + int gpio_inverted = usb_phy_data[phy->instance].vbus_gpio_inverted; if (gpio == -1) return; @@ -919,13 +921,13 @@ static void vbus_enable(struct tegra_usb_phy *phy) return; } if (gpio < TEGRA_NR_GPIOS) tegra_gpio_enable(gpio); - gpio_status = gpio_direction_output(gpio, 1); + gpio_status = gpio_direction_output(gpio, !gpio_inverted); if (gpio_status < 0) { printk("VBUS_USB request GPIO DIRECTION FAILED \n"); WARN_ON(1); return; } - gpio_set_value_cansleep(gpio, 1); + gpio_set_value_cansleep(gpio, !gpio_inverted); #else if (phy->reg_vbus) regulator_enable(phy->reg_vbus); @@ -936,11 +938,12 @@ static void vbus_disable(struct tegra_usb_phy *phy) { #ifdef CONFIG_ARCH_TEGRA_2x_SOC int gpio = usb_phy_data[phy->instance].vbus_gpio; + int gpio_inverted = usb_phy_data[phy->instance].vbus_gpio_inverted; if (gpio == -1) return; - gpio_set_value_cansleep(gpio, 0); + gpio_set_value_cansleep(gpio, gpio_inverted); gpio_free(gpio); #else if (phy->reg_vbus) @@ -2002,6 +2005,25 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy, bool is_dpd) val |= USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN; writel(val, base + USB_PORTSC1); +//should really all be done in some board specific enable_vbus() +#ifdef CONFIG_MACH_COLIBRI_T20 + /* Fix Ethernet detection faults */ + mdelay(100); + +#define ETHERNET_VBUS_GPIO TEGRA_GPIO_PBB1 +#define ETHERNET_RESET_GPIO TEGRA_GPIO_PV4 + + tegra_gpio_enable(ETHERNET_VBUS_GPIO); + gpio_request(ETHERNET_VBUS_GPIO, "ethernet_vbus"); + gpio_direction_output(ETHERNET_VBUS_GPIO, 1); + gpio_export(ETHERNET_VBUS_GPIO, false); + + tegra_gpio_enable(ETHERNET_RESET_GPIO); + gpio_request(ETHERNET_RESET_GPIO, "ethernet_reset"); + gpio_direction_output(ETHERNET_RESET_GPIO, 1); + gpio_export(ETHERNET_RESET_GPIO, false); +#endif /* CONFIG_MACH_COLIBRI_T20 */ + return 0; } @@ -3182,6 +3204,7 @@ int __init tegra_usb_phy_init(struct usb_phy_plat_data *pdata, int size) usb_phy_data[pdata->instance].instance = pdata->instance; usb_phy_data[pdata->instance].vbus_irq = pdata->vbus_irq; usb_phy_data[pdata->instance].vbus_gpio = pdata->vbus_gpio; + usb_phy_data[pdata->instance].vbus_gpio_inverted = pdata->vbus_gpio_inverted; usb_phy_data[pdata->instance].vbus_reg_supply = pdata->vbus_reg_supply; } } diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 9e31c03f3663..8805e034eec5 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -946,7 +946,7 @@ shenzhou MACH_SHENZHOU SHENZHOU 3319 cwme9210 MACH_CWME9210 CWME9210 3320 cwme9210js MACH_CWME9210JS CWME9210JS 3321 pgs_v1 MACH_PGS_SITARA PGS_SITARA 3322 -colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323 +colibri_t20 MACH_COLIBRI_T20 COLIBRI_T20 3323 w21 MACH_W21 W21 3324 polysat1 MACH_POLYSAT1 POLYSAT1 3325 dataway MACH_DATAWAY DATAWAY 3326 diff --git a/drivers/mtd/devices/tegra_nand.c b/drivers/mtd/devices/tegra_nand.c index c8a3e7090b90..f8656ed6683c 100644 --- a/drivers/mtd/devices/tegra_nand.c +++ b/drivers/mtd/devices/tegra_nand.c @@ -434,6 +434,35 @@ static int nand_cmd_get_status(struct tegra_nand_info *info, uint32_t *status) return 0; } +static int tegra_nand_cmd_reset(struct tegra_nand_info *info, + uint32_t *chip_id) +{ + int err; + uint32_t status = 0; + +#ifdef TEGRA_NAND_DEBUG_PEDANTIC + BUG_ON(info->chip.curr_chip == -1); +#endif + + info->command_reg = (COMMAND_CLE | + (COMMAND_CE(info->chip.curr_chip))); + writel(NAND_CMD_RESET, CMD_REG1); + writel(0, CMD_REG2); + writel(0, ADDR_REG1); + writel(0, ADDR_REG2); + writel(0, CONFIG_REG); + + err = tegra_nand_go(info); + if (err != 0) + return err; + + err = nand_cmd_get_status(info, &status); + if (err != 0) + return err; + + return 0; +} + /* must be called with lock held */ static int check_block_isbad(struct mtd_info *mtd, loff_t offs) { @@ -1400,6 +1429,11 @@ static int tegra_nand_scan(struct mtd_info *mtd, int maxchips) writel(0, CONFIG_REG); select_chip(info, 0); + + err = tegra_nand_cmd_reset(info, &tmp); + if (err != 0) + goto out_error; + err = tegra_nand_cmd_readid(info, &tmp); if (err != 0) goto out_error; @@ -1481,6 +1515,11 @@ static int tegra_nand_scan(struct mtd_info *mtd, int maxchips) /* data block size (erase size) (w/o spare) */ tmp = (dev_parms >> 4) & 0x3; + /* work around wrong block size identified for our device + Note: ONFI would really be the way to go but has not been supported + in Linux prior to version 2.6.37. */ + if ((vendor_id == 0x2C) && (dev_id == 0x38)) + tmp += 1; mtd->erasesize = (64 * 1024) << tmp; info->chip.block_shift = ffs(mtd->erasesize) - 1; /* bus width of the nand chip 8/16 */ diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index 00cf1b0d6053..a56bf52acf5e 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -104,6 +104,7 @@ struct nand_flash_dev nand_flash_ids[] = { {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16}, /* 8 Gigabit */ + {"NAND 1GiB 1,8V 8-bit", 0x38, 0, 1024, 0, LP_OPTIONS}, {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS}, {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS}, {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16}, diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c index 710557700095..3bbed1d376f9 100644 --- a/drivers/net/usb/asix.c +++ b/drivers/net/usb/asix.c @@ -1,8 +1,7 @@ /* * ASIX AX8817X based USB 2.0 Ethernet Devices - * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com> + * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com> * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net> - * Copyright (C) 2006 James Painter <jamie.painter@iname.com> * Copyright (c) 2002-2003 TiVo Inc. * * This program is free software; you can redistribute it and/or modify @@ -20,11 +19,16 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -// #define DEBUG // error path messages, extra info -// #define VERBOSE // more; success messages +//#define DEBUG // debug messages, extra info +#include <linux/version.h> +//#include <linux/config.h> +#ifdef CONFIG_USB_DEBUG +# define DEBUG +#endif #include <linux/module.h> #include <linux/kmod.h> +#include <linux/sched.h> #include <linux/init.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> @@ -33,248 +37,319 @@ #include <linux/mii.h> #include <linux/usb.h> #include <linux/crc32.h> -#include <linux/usb/usbnet.h> -#include <linux/slab.h> -#define DRIVER_VERSION "14-Jun-2006" -static const char driver_name [] = "asix"; - -/* ASIX AX8817X based USB 2.0 Ethernet Devices */ +#include "axusbnet.c" +#include "asix.h" + +#define DRV_VERSION "4.2.0" + +static char version[] = +KERN_INFO "ASIX USB Ethernet Adapter:v" DRV_VERSION + " " __TIME__ " " __DATE__ "\n" +KERN_INFO " http://www.asix.com.tw\n"; + +static char g_mac_addr[ETH_ALEN]; +static int g_usr_mac = 0; + +/* configuration of maximum bulk in size */ +static int bsize = AX88772B_MAX_BULKIN_16K; +module_param (bsize, int, 0); +MODULE_PARM_DESC (bsize, "Maximum transfer size per bulk"); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void ax88772b_link_reset (void *data); +static void ax88772a_link_reset (void *data); +static void ax88772_link_reset (void *data); +#else +static void ax88772b_link_reset (struct work_struct *work); +static void ax88772a_link_reset (struct work_struct *work); +static void ax88772_link_reset (struct work_struct *work); +#endif +static int ax88772a_phy_powerup (struct usbnet *dev); + +/* Retrieve user set MAC address */ +static int __init setup_asix_mac(char *macstr) +{ + int i, j; + unsigned char result, value; + + for (i = 0; i < ETH_ALEN; i++) { + result = 0; + + if (i != 5 && *(macstr + 2) != ':') + return -1; + + for (j = 0; j < 2; j++) { + if (isxdigit(*macstr) + && (value = + isdigit(*macstr) ? *macstr - + '0' : toupper(*macstr) - 'A' + 10) < 16) { + result = result * 16 + value; + macstr++; + } else + return -1; + } -#define AX_CMD_SET_SW_MII 0x06 -#define AX_CMD_READ_MII_REG 0x07 -#define AX_CMD_WRITE_MII_REG 0x08 -#define AX_CMD_SET_HW_MII 0x0a -#define AX_CMD_READ_EEPROM 0x0b -#define AX_CMD_WRITE_EEPROM 0x0c -#define AX_CMD_WRITE_ENABLE 0x0d -#define AX_CMD_WRITE_DISABLE 0x0e -#define AX_CMD_READ_RX_CTL 0x0f -#define AX_CMD_WRITE_RX_CTL 0x10 -#define AX_CMD_READ_IPG012 0x11 -#define AX_CMD_WRITE_IPG0 0x12 -#define AX_CMD_WRITE_IPG1 0x13 -#define AX_CMD_READ_NODE_ID 0x13 -#define AX_CMD_WRITE_NODE_ID 0x14 -#define AX_CMD_WRITE_IPG2 0x14 -#define AX_CMD_WRITE_MULTI_FILTER 0x16 -#define AX88172_CMD_READ_NODE_ID 0x17 -#define AX_CMD_READ_PHY_ID 0x19 -#define AX_CMD_READ_MEDIUM_STATUS 0x1a -#define AX_CMD_WRITE_MEDIUM_MODE 0x1b -#define AX_CMD_READ_MONITOR_MODE 0x1c -#define AX_CMD_WRITE_MONITOR_MODE 0x1d -#define AX_CMD_READ_GPIOS 0x1e -#define AX_CMD_WRITE_GPIOS 0x1f -#define AX_CMD_SW_RESET 0x20 -#define AX_CMD_SW_PHY_STATUS 0x21 -#define AX_CMD_SW_PHY_SELECT 0x22 - -#define AX_MONITOR_MODE 0x01 -#define AX_MONITOR_LINK 0x02 -#define AX_MONITOR_MAGIC 0x04 -#define AX_MONITOR_HSFS 0x10 - -/* AX88172 Medium Status Register values */ -#define AX88172_MEDIUM_FD 0x02 -#define AX88172_MEDIUM_TX 0x04 -#define AX88172_MEDIUM_FC 0x10 -#define AX88172_MEDIUM_DEFAULT \ - ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC ) - -#define AX_MCAST_FILTER_SIZE 8 -#define AX_MAX_MCAST 64 - -#define AX_SWRESET_CLEAR 0x00 -#define AX_SWRESET_RR 0x01 -#define AX_SWRESET_RT 0x02 -#define AX_SWRESET_PRTE 0x04 -#define AX_SWRESET_PRL 0x08 -#define AX_SWRESET_BZ 0x10 -#define AX_SWRESET_IPRL 0x20 -#define AX_SWRESET_IPPD 0x40 - -#define AX88772_IPG0_DEFAULT 0x15 -#define AX88772_IPG1_DEFAULT 0x0c -#define AX88772_IPG2_DEFAULT 0x12 - -/* AX88772 & AX88178 Medium Mode Register */ -#define AX_MEDIUM_PF 0x0080 -#define AX_MEDIUM_JFE 0x0040 -#define AX_MEDIUM_TFC 0x0020 -#define AX_MEDIUM_RFC 0x0010 -#define AX_MEDIUM_ENCK 0x0008 -#define AX_MEDIUM_AC 0x0004 -#define AX_MEDIUM_FD 0x0002 -#define AX_MEDIUM_GM 0x0001 -#define AX_MEDIUM_SM 0x1000 -#define AX_MEDIUM_SBP 0x0800 -#define AX_MEDIUM_PS 0x0200 -#define AX_MEDIUM_RE 0x0100 - -#define AX88178_MEDIUM_DEFAULT \ - (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \ - AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \ - AX_MEDIUM_RE ) - -#define AX88772_MEDIUM_DEFAULT \ - (AX_MEDIUM_FD | AX_MEDIUM_RFC | \ - AX_MEDIUM_TFC | AX_MEDIUM_PS | \ - AX_MEDIUM_AC | AX_MEDIUM_RE ) - -/* AX88772 & AX88178 RX_CTL values */ -#define AX_RX_CTL_SO 0x0080 -#define AX_RX_CTL_AP 0x0020 -#define AX_RX_CTL_AM 0x0010 -#define AX_RX_CTL_AB 0x0008 -#define AX_RX_CTL_SEP 0x0004 -#define AX_RX_CTL_AMALL 0x0002 -#define AX_RX_CTL_PRO 0x0001 -#define AX_RX_CTL_MFB_2048 0x0000 -#define AX_RX_CTL_MFB_4096 0x0100 -#define AX_RX_CTL_MFB_8192 0x0200 -#define AX_RX_CTL_MFB_16384 0x0300 - -#define AX_DEFAULT_RX_CTL \ - (AX_RX_CTL_SO | AX_RX_CTL_AB ) - -/* GPIO 0 .. 2 toggles */ -#define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */ -#define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */ -#define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */ -#define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */ -#define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */ -#define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */ -#define AX_GPIO_RESERVED 0x40 /* Reserved */ -#define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */ - -#define AX_EEPROM_MAGIC 0xdeadbeef -#define AX88172_EEPROM_LEN 0x40 -#define AX88772_EEPROM_LEN 0xff - -#define PHY_MODE_MARVELL 0x0000 -#define MII_MARVELL_LED_CTRL 0x0018 -#define MII_MARVELL_STATUS 0x001b -#define MII_MARVELL_CTRL 0x0014 - -#define MARVELL_LED_MANUAL 0x0019 - -#define MARVELL_STATUS_HWCFG 0x0004 - -#define MARVELL_CTRL_TXDELAY 0x0002 -#define MARVELL_CTRL_RXDELAY 0x0080 - -/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */ -struct asix_data { - u8 multi_filter[AX_MCAST_FILTER_SIZE]; - u8 mac_addr[ETH_ALEN]; - u8 phymode; - u8 ledmode; - u8 eeprom_len; -}; + macstr++; + g_mac_addr[i] = result; + } -struct ax88172_int_data { - __le16 res1; - u8 link; - __le16 res2; - u8 status; - __le16 res3; -} __packed; + g_usr_mac = 1; -static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, - u16 size, void *data) -{ - void *buf; - int err = -ENOMEM; + return 0; +} - netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", - cmd, value, index, size); +__setup("asix_mac=", setup_asix_mac); - buf = kmalloc(size, GFP_KERNEL); - if (!buf) - goto out; +/* ASIX AX8817X based USB 2.0 Ethernet Devices */ - err = usb_control_msg( +static int ax8817x_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, + u16 size, void *data) +{ + return usb_control_msg( dev->udev, usb_rcvctrlpipe(dev->udev, 0), cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, value, index, - buf, + data, size, USB_CTRL_GET_TIMEOUT); - if (err == size) - memcpy(data, buf, size); - else if (err >= 0) - err = -EINVAL; - kfree(buf); - -out: - return err; } -static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, +static int ax8817x_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, u16 size, void *data) { - void *buf = NULL; - int err = -ENOMEM; - - netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", - cmd, value, index, size); - - if (data) { - buf = kmemdup(data, size, GFP_KERNEL); - if (!buf) - goto out; - } - - err = usb_control_msg( + return usb_control_msg( dev->udev, usb_sndctrlpipe(dev->udev, 0), cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, value, index, - buf, + data, size, USB_CTRL_SET_TIMEOUT); - kfree(buf); - -out: - return err; } -static void asix_async_cmd_callback(struct urb *urb) +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void ax8817x_async_cmd_callback(struct urb *urb, struct pt_regs *regs) +#else +static void ax8817x_async_cmd_callback(struct urb *urb) +#endif { struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context; - int status = urb->status; - if (status < 0) - printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d", - status); + if (urb->status < 0) + printk(KERN_DEBUG "ax8817x_async_cmd_callback() failed with %d", + urb->status); kfree(req); usb_free_urb(urb); } -static void -asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index, +static int ax8817x_set_mac_addr (struct net_device *net, void *p) +{ + struct usbnet *dev = netdev_priv(net); + struct sockaddr *addr = p; + + memcpy (net->dev_addr, addr->sa_data, ETH_ALEN); + + /* Set the MAC address */ + return ax8817x_write_cmd (dev, AX88772_CMD_WRITE_NODE_ID, + 0, 0, ETH_ALEN, net->dev_addr); + +} + +static void ax88178_status(struct usbnet *dev, struct urb *urb) +{ + struct ax88172_int_data *event; + struct ax88178_data *ax178dataptr = (struct ax88178_data *)dev->priv; + int link; + + if (urb->actual_length < 8) + return; + + if (ax178dataptr->EepromData == PHY_MODE_MAC_TO_MAC_GMII) + return; + + event = urb->transfer_buffer; + link = event->link & 0x01; + if (netif_carrier_ok(dev->net) != link) { + if (link) { + netif_carrier_on(dev->net); + axusbnet_defer_kevent (dev, EVENT_LINK_RESET); + } else + netif_carrier_off(dev->net); + devwarn(dev, "ax88178 - Link status is: %d", link); + } +} + +static void ax8817x_status(struct usbnet *dev, struct urb *urb) +{ + struct ax88172_int_data *event; + int link; + + if (urb->actual_length < 8) + return; + + event = urb->transfer_buffer; + link = event->link & 0x01; + if (netif_carrier_ok(dev->net) != link) { + if (link) { + netif_carrier_on(dev->net); + axusbnet_defer_kevent (dev, EVENT_LINK_RESET ); + } else + netif_carrier_off(dev->net); + devwarn(dev, "ax8817x - Link status is: %d", link); + } +} + +static void ax88772_status(struct usbnet *dev, struct urb *urb) +{ + struct ax88172_int_data *event; + struct ax88772_data *ax772_data = (struct ax88772_data *)dev->priv; + int link; + + if (urb->actual_length < 8) + return; + + event = urb->transfer_buffer; + link = event->link & 0x01; + + if (netif_carrier_ok(dev->net) != link) { + if (link) { + netif_carrier_on(dev->net); + ax772_data->Event = AX_SET_RX_CFG; + } else { + netif_carrier_off(dev->net); + if (ax772_data->Event == AX_NOP) { + ax772_data->Event = PHY_POWER_DOWN; + ax772_data->TickToExpire = 25; + } + } + + devwarn(dev, "ax88772 - Link status is: %d", link); + } + + if (ax772_data->Event) + queue_work (ax772_data->ax_work, &ax772_data->check_link); +} + +static void ax88772a_status(struct usbnet *dev, struct urb *urb) +{ + struct ax88172_int_data *event; + struct ax88772a_data *ax772a_data = (struct ax88772a_data *)dev->priv; + int link; + int PowSave = (ax772a_data->EepromData >> 14); + + if (urb->actual_length < 8) + return; + + event = urb->transfer_buffer; + link = event->link & 0x01; + + if (netif_carrier_ok(dev->net) != link) { + + if (link) { + netif_carrier_on(dev->net); + ax772a_data->Event = AX_SET_RX_CFG; + } else if ((PowSave == 0x3) || (PowSave == 0x1)) { + netif_carrier_off(dev->net); + if (ax772a_data->Event == AX_NOP) { + ax772a_data->Event = CHK_CABLE_EXIST; + ax772a_data->TickToExpire = 14; + } + } else { + netif_carrier_off(dev->net); + ax772a_data->Event = AX_NOP; + } + + devwarn(dev, "ax88772a - Link status is: %d", link); + } + + if (ax772a_data->Event) + queue_work (ax772a_data->ax_work, &ax772a_data->check_link); +} + +static void ax88772b_status(struct usbnet *dev, struct urb *urb) +{ + struct ax88772b_data *ax772b_data = (struct ax88772b_data *)dev->priv; + struct ax88172_int_data *event; + int link; + + if (urb->actual_length < 8) + return; + + if (ax772b_data->OperationMode == OPERATION_PHY_MODE) + return; + + event = urb->transfer_buffer; + if (ax772b_data->PhySelect == 0 && ax772b_data->OperationMode + == OPERATION_MAC_MODE) + link = event->link & AX_INT_SPLS_LINK; + else + link = event->link & AX_INT_PPLS_LINK; + + if (netif_carrier_ok(dev->net) != link) { + if (link) { + netif_carrier_on(dev->net); + ax772b_data->Event = AX_SET_RX_CFG; + } else { + netif_carrier_off(dev->net); + ax772b_data->time_to_chk = jiffies; + } + devwarn(dev, "ax88772b - Link status is: %d", link); + } + + if (!link) { + + int no_cable = (event->link & AX_INT_CABOFF_UNPLUG) ? 1 : 0; + + if (no_cable) { + if ((ax772b_data->psc & + (AX_SWRESET_IPPSL_0 | AX_SWRESET_IPPSL_1)) && + !ax772b_data->pw_enabled) { + /* + * AX88772B already entered power saving state + */ + ax772b_data->pw_enabled = 1; + } + + } else { + /* AX88772B resumed from power saving state */ + if (ax772b_data->pw_enabled || + (jiffies > (ax772b_data->time_to_chk + + AX88772B_WATCHDOG))) { + if (ax772b_data->pw_enabled) + ax772b_data->pw_enabled = 0; + ax772b_data->Event = PHY_POWER_UP; + ax772b_data->time_to_chk = jiffies; + } + } + } + + if (ax772b_data->Event) + queue_work (ax772b_data->ax_work, &ax772b_data->check_link); +} + +void +ax8817x_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index, u16 size, void *data) { struct usb_ctrlrequest *req; int status; struct urb *urb; - netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n", - cmd, value, index, size); if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) { - netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n"); + deverr(dev, "Error allocating URB in write_cmd_async!"); return; } - if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) { - netdev_err(dev->net, "Failed to allocate memory for control request\n"); + if ((req = kmalloc (sizeof (struct usb_ctrlrequest), + GFP_ATOMIC)) == NULL) { + deverr(dev, "Failed to allocate memory for control request"); usb_free_urb(urb); return; } @@ -288,435 +363,444 @@ asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index, usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0), (void *)req, data, size, - asix_async_cmd_callback, req); + ax8817x_async_cmd_callback, req); if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) { - netdev_err(dev->net, "Error submitting the control message: status=%d\n", - status); + deverr(dev, "Error submitting the control message: status=%d", + status); kfree(req); usb_free_urb(urb); } } -static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb) +static void ax8817x_set_multicast(struct net_device *net) { - u8 *head; - u32 header; - char *packet; - struct sk_buff *ax_skb; - u16 size; - - head = (u8 *) skb->data; - memcpy(&header, head, sizeof(header)); - le32_to_cpus(&header); - packet = head + sizeof(header); - - skb_pull(skb, 4); + struct usbnet *dev = netdev_priv(net); + struct ax8817x_data *data = (struct ax8817x_data *)&dev->data; + u8 rx_ctl = AX_RX_CTL_START | AX_RX_CTL_AB; + int mc_count; - while (skb->len > 0) { - if ((header & 0x07ff) != ((~header >> 16) & 0x07ff)) - netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n"); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) + mc_count = net->mc_count; +#else + mc_count = netdev_mc_count (net); +#endif - /* get the packet length */ - size = (u16) (header & 0x000007ff); + if (net->flags & IFF_PROMISC) { + rx_ctl |= AX_RX_CTL_PRO; + } else if (net->flags & IFF_ALLMULTI + || mc_count > AX_MAX_MCAST) { + rx_ctl |= AX_RX_CTL_AMALL; + } else if (mc_count == 0) { + /* just broadcast and directed */ + } else { + /* We use the 20 byte dev->data + * for our 8 byte filter buffer + * to avoid allocating memory that + * is tricky to free later */ + u32 crc_bits; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) + struct dev_mc_list *mc_list = net->mc_list; + int i; - if ((skb->len) - ((size + 1) & 0xfffe) == 0) { - u8 alignment = (unsigned long)skb->data & 0x3; - if (alignment != 0x2) { - /* - * not 16bit aligned so use the room provided by - * the 32 bit header to align the data - * - * note we want 16bit alignment as MAC header is - * 14bytes thus ip header will be aligned on - * 32bit boundary so accessing ipheader elements - * using a cast to struct ip header wont cause - * an unaligned accesses. - */ - u8 realignment = (alignment + 2) & 0x3; - memmove(skb->data - realignment, - skb->data, - size); - skb->data -= realignment; - skb_set_tail_pointer(skb, size); - } - return 2; - } + memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); - if (size > dev->net->mtu + ETH_HLEN) { - netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n", - size); - return 0; + /* Build the multicast hash filter. */ + for (i = 0; i < net->mc_count; i++) { + crc_bits = + ether_crc(ETH_ALEN, + mc_list->dmi_addr) >> 26; + data->multi_filter[crc_bits >> 3] |= + 1 << (crc_bits & 7); + mc_list = mc_list->next; } - ax_skb = skb_clone(skb, GFP_ATOMIC); - if (ax_skb) { - u8 alignment = (unsigned long)packet & 0x3; - ax_skb->len = size; - - if (alignment != 0x2) { - /* - * not 16bit aligned use the room provided by - * the 32 bit header to align the data - */ - u8 realignment = (alignment + 2) & 0x3; - memmove(packet - realignment, packet, size); - packet -= realignment; - } - ax_skb->data = packet; - skb_set_tail_pointer(ax_skb, size); - usbnet_skb_return(dev, ax_skb); - } else { - return 0; +#else + struct netdev_hw_addr *ha; + memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); + netdev_for_each_mc_addr (ha, net) { + crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; + data->multi_filter[crc_bits >> 3] |= + 1 << (crc_bits & 7); } +#endif + ax8817x_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, + AX_MCAST_FILTER_SIZE, data->multi_filter); - skb_pull(skb, (size + 1) & 0xfffe); - - if (skb->len < sizeof(header)) - break; - - head = (u8 *) skb->data; - memcpy(&header, head, sizeof(header)); - le32_to_cpus(&header); - packet = head + sizeof(header); - skb_pull(skb, 4); + rx_ctl |= AX_RX_CTL_AM; } - if (skb->len < 0) { - netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n", - skb->len); - return 0; - } - return 1; + ax8817x_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); } -static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb, - gfp_t flags) +static void ax88772b_set_multicast(struct net_device *net) { - int padlen; - int headroom = skb_headroom(skb); - int tailroom = skb_tailroom(skb); - u32 packet_len; - u32 padbytes = 0xffff0000; + struct usbnet *dev = netdev_priv(net); + struct ax8817x_data *data = (struct ax8817x_data *)&dev->data; + u16 rx_ctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_HEADER_DEFAULT); + int mc_count; - padlen = ((skb->len + 4) % 512) ? 0 : 4; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) + mc_count = net->mc_count; +#else + mc_count = netdev_mc_count (net); +#endif - if ((!skb_cloned(skb)) && - ((headroom + tailroom) >= (4 + padlen))) { - if ((headroom < 4) || (tailroom < padlen)) { - skb->data = memmove(skb->head + 4, skb->data, skb->len); - skb_set_tail_pointer(skb, skb->len); - } + if (net->flags & IFF_PROMISC) { + rx_ctl |= AX_RX_CTL_PRO; + } else if (net->flags & IFF_ALLMULTI + || mc_count > AX_MAX_MCAST) { + rx_ctl |= AX_RX_CTL_AMALL; + } else if (mc_count == 0) { + /* just broadcast and directed */ } else { - struct sk_buff *skb2; - skb2 = skb_copy_expand(skb, 4, padlen, flags); - dev_kfree_skb_any(skb); - skb = skb2; - if (!skb) - return NULL; - } + /* We use the 20 byte dev->data + * for our 8 byte filter buffer + * to avoid allocating memory that + * is tricky to free later */ + u32 crc_bits; - skb_push(skb, 4); - packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4); - cpu_to_le32s(&packet_len); - skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len)); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) + struct dev_mc_list *mc_list = net->mc_list; + int i; - if ((skb->len % 512) == 0) { - cpu_to_le32s(&padbytes); - memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes)); - skb_put(skb, sizeof(padbytes)); + memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); + + /* Build the multicast hash filter. */ + for (i = 0; i < net->mc_count; i++) { + crc_bits = + ether_crc(ETH_ALEN, + mc_list->dmi_addr) >> 26; + data->multi_filter[crc_bits >> 3] |= + 1 << (crc_bits & 7); + mc_list = mc_list->next; + } +#else + struct netdev_hw_addr *ha; + memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); + netdev_for_each_mc_addr (ha, net) { + crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; + data->multi_filter[crc_bits >> 3] |= + 1 << (crc_bits & 7); + } +#endif + ax8817x_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, + AX_MCAST_FILTER_SIZE, data->multi_filter); + + rx_ctl |= AX_RX_CTL_AM; } - return skb; + + ax8817x_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); } -static void asix_status(struct usbnet *dev, struct urb *urb) +static int ax8817x_mdio_read(struct net_device *netdev, int phy_id, int loc) { - struct ax88172_int_data *event; - int link; + struct usbnet *dev = netdev_priv(netdev); + u16 *res; + u16 ret; - if (urb->actual_length < 8) - return; + res = kmalloc (2, GFP_ATOMIC); + if (!res) + return 0; - event = urb->transfer_buffer; - link = event->link & 0x01; - if (netif_carrier_ok(dev->net) != link) { - if (link) { - netif_carrier_on(dev->net); - usbnet_defer_kevent (dev, EVENT_LINK_RESET ); - } else - netif_carrier_off(dev->net); - netdev_dbg(dev->net, "Link Status is: %d\n", link); - } -} + ax8817x_write_cmd(dev, AX_CMD_SET_SW_MII, 0, 0, 0, NULL); + ax8817x_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, (__u16)loc, 2, res); + ax8817x_write_cmd(dev, AX_CMD_SET_HW_MII, 0, 0, 0, NULL); -static inline int asix_set_sw_mii(struct usbnet *dev) -{ - int ret; - ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL); - if (ret < 0) - netdev_err(dev->net, "Failed to enable software MII access\n"); - return ret; -} + ret = *res & 0xffff; + kfree (res); -static inline int asix_set_hw_mii(struct usbnet *dev) -{ - int ret; - ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL); - if (ret < 0) - netdev_err(dev->net, "Failed to enable hardware MII access\n"); return ret; } -static inline int asix_get_phy_addr(struct usbnet *dev) +static int +ax8817x_swmii_mdio_read(struct net_device *netdev, int phy_id, int loc) { - u8 buf[2]; - int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf); + struct usbnet *dev = netdev_priv(netdev); + u16 *res; + u16 ret; - netdev_dbg(dev->net, "asix_get_phy_addr()\n"); + res = kmalloc (2, GFP_ATOMIC); + if (!res) + return 0; - if (ret < 0) { - netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret); - goto out; - } - netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n", - *((__le16 *)buf)); - ret = buf[1]; + ax8817x_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, + (__u16)loc, 2, res); + + ret = *res & 0xffff; + kfree (res); -out: return ret; } -static int asix_sw_reset(struct usbnet *dev, u8 flags) +/* same as above, but converts resulting value to cpu byte order */ +static int ax8817x_mdio_read_le(struct net_device *netdev, int phy_id, int loc) { - int ret; - - ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL); - if (ret < 0) - netdev_err(dev->net, "Failed to send software reset: %02x\n", ret); + return le16_to_cpu(ax8817x_mdio_read(netdev,phy_id, loc)); +} - return ret; +static int +ax8817x_swmii_mdio_read_le(struct net_device *netdev, int phy_id, int loc) +{ + return le16_to_cpu(ax8817x_swmii_mdio_read(netdev,phy_id, loc)); } -static u16 asix_read_rx_ctl(struct usbnet *dev) +static void +ax8817x_mdio_write(struct net_device *netdev, int phy_id, int loc, int val) { - __le16 v; - int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v); + struct usbnet *dev = netdev_priv(netdev); + u16 *res; - if (ret < 0) { - netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret); - goto out; - } - ret = le16_to_cpu(v); -out: - return ret; + res = kmalloc (2, GFP_ATOMIC); + if (!res) + return; + *res = val; + + ax8817x_write_cmd(dev, AX_CMD_SET_SW_MII, 0, 0, 0, NULL); + ax8817x_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, + (__u16)loc, 2, res); + ax8817x_write_cmd(dev, AX_CMD_SET_HW_MII, 0, 0, 0, NULL); + + kfree (res); } -static int asix_write_rx_ctl(struct usbnet *dev, u16 mode) +static void ax8817x_swmii_mdio_write(struct net_device *netdev, + int phy_id, int loc, int val) { - int ret; + struct usbnet *dev = netdev_priv(netdev); + u16 *res; - netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode); - ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL); - if (ret < 0) - netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n", - mode, ret); + res = kmalloc (2, GFP_ATOMIC); + if (!res) + return; + *res = val; - return ret; + ax8817x_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, + (__u16)loc, 2, res); + + kfree (res); } -static u16 asix_read_medium_status(struct usbnet *dev) +static void +ax88772b_mdio_write(struct net_device *netdev, int phy_id, int loc, int val) { - __le16 v; - int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v); + struct usbnet *dev = netdev_priv(netdev); + u16 *res; - if (ret < 0) { - netdev_err(dev->net, "Error reading Medium Status register: %02x\n", - ret); - goto out; + res = kmalloc (2, GFP_ATOMIC); + if (!res) + return; + *res = val; + + ax8817x_write_cmd(dev, AX_CMD_SET_SW_MII, 0, 0, 0, NULL); + ax8817x_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, + (__u16)loc, 2, res); + + if (loc == MII_ADVERTISE) { + *res = cpu_to_le16(BMCR_ANENABLE | BMCR_ANRESTART); + ax8817x_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, + (__u16)MII_BMCR, 2, res); } - ret = le16_to_cpu(v); -out: - return ret; + + ax8817x_write_cmd(dev, AX_CMD_SET_HW_MII, 0, 0, 0, NULL); + + kfree (res); } -static int asix_write_medium_mode(struct usbnet *dev, u16 mode) +/* same as above, but converts new value to le16 byte order before writing */ +static void +ax8817x_mdio_write_le(struct net_device *netdev, int phy_id, int loc, int val) { - int ret; + ax8817x_mdio_write( netdev, phy_id, loc, cpu_to_le16(val) ); +} - netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode); - ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL); - if (ret < 0) - netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n", - mode, ret); +static void ax8817x_swmii_mdio_write_le(struct net_device *netdev, + int phy_id, int loc, int val) +{ + ax8817x_swmii_mdio_write( netdev, phy_id, loc, cpu_to_le16(val) ); +} - return ret; +static void +ax88772b_mdio_write_le(struct net_device *netdev, int phy_id, int loc, int val) +{ + ax88772b_mdio_write( netdev, phy_id, loc, cpu_to_le16(val) ); } -static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep) +static int ax88772_suspend (struct usb_interface *intf, +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10) + pm_message_t message) +#else + u32 message) +#endif { - int ret; + struct usbnet *dev = usb_get_intfdata(intf); + u16 *medium; - netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value); - ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL); - if (ret < 0) - netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n", - value, ret); + medium = kmalloc (2, GFP_ATOMIC); + if (!medium) + return axusbnet_suspend (intf, message); - if (sleep) - msleep(sleep); + ax8817x_read_cmd (dev, AX_CMD_READ_MEDIUM_MODE, 0, 0, 2, medium); + ax8817x_write_cmd (dev, AX_CMD_WRITE_MEDIUM_MODE, + (*medium & ~AX88772_MEDIUM_RX_ENABLE), 0, 0, NULL); - return ret; + kfree (medium); + return axusbnet_suspend (intf, message); } -/* - * AX88772 & AX88178 have a 16-bit RX_CTL value - */ -static void asix_set_multicast(struct net_device *net) +static int ax88772b_suspend (struct usb_interface *intf, +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10) + pm_message_t message) +#else + u32 message) +#endif { - struct usbnet *dev = netdev_priv(net); - struct asix_data *data = (struct asix_data *)&dev->data; - u16 rx_ctl = AX_DEFAULT_RX_CTL; - - if (net->flags & IFF_PROMISC) { - rx_ctl |= AX_RX_CTL_PRO; - } else if (net->flags & IFF_ALLMULTI || - netdev_mc_count(net) > AX_MAX_MCAST) { - rx_ctl |= AX_RX_CTL_AMALL; - } else if (netdev_mc_empty(net)) { - /* just broadcast and directed */ + struct usbnet *dev = usb_get_intfdata(intf); + struct ax88772b_data *ax772b_data = (struct ax88772b_data *)dev->priv; + u16 *tmp16; + u8 *opt; + + tmp16 = kmalloc (2, GFP_ATOMIC); + if (!tmp16) + return axusbnet_suspend (intf, message); + opt = (u8 *)tmp16; + + ax8817x_read_cmd (dev, AX_CMD_READ_MEDIUM_MODE, 0, 0, 2, tmp16); + ax8817x_write_cmd (dev, AX_CMD_WRITE_MEDIUM_MODE, + (*tmp16 & ~AX88772_MEDIUM_RX_ENABLE), 0, 0, NULL); + + ax8817x_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, opt); + if (!(*opt & AX_MONITOR_LINK) && !(*opt & AX_MONITOR_MAGIC)) { + ax8817x_write_cmd (dev, AX_CMD_SW_RESET, + AX_SWRESET_IPRL | AX_SWRESET_IPPD, 0, 0, NULL); } else { - /* We use the 20 byte dev->data - * for our 8 byte filter buffer - * to avoid allocating memory that - * is tricky to free later */ - struct netdev_hw_addr *ha; - u32 crc_bits; - memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); + if (ax772b_data->psc & AX_SWRESET_WOLLP) { + *tmp16 = ax8817x_mdio_read_le (dev->net, + dev->mii.phy_id, MII_BMCR); + ax8817x_mdio_write_le (dev->net, dev->mii.phy_id, + MII_BMCR, *tmp16 | BMCR_ANENABLE); - /* Build the multicast hash filter. */ - netdev_for_each_mc_addr(ha, net) { - crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; - data->multi_filter[crc_bits >> 3] |= - 1 << (crc_bits & 7); + ax8817x_write_cmd (dev, AX_CMD_SW_RESET, + AX_SWRESET_IPRL | ax772b_data->psc, 0, 0, NULL); } - asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, - AX_MCAST_FILTER_SIZE, data->multi_filter); - - rx_ctl |= AX_RX_CTL_AM; + if (ax772b_data->psc & + (AX_SWRESET_IPPSL_0 | AX_SWRESET_IPPSL_1)) { + *opt |= AX_MONITOR_LINK; + ax8817x_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE, + *opt, 0, 0, NULL); + } } - asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); + kfree (tmp16); + return axusbnet_suspend (intf, message); } -static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc) +static int ax88772_resume (struct usb_interface *intf) { - struct usbnet *dev = netdev_priv(netdev); - __le16 res; + struct usbnet *dev = usb_get_intfdata(intf); - mutex_lock(&dev->phy_mutex); - asix_set_sw_mii(dev); - asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, - (__u16)loc, 2, &res); - asix_set_hw_mii(dev); - mutex_unlock(&dev->phy_mutex); + netif_carrier_off (dev->net); - netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", - phy_id, loc, le16_to_cpu(res)); - - return le16_to_cpu(res); + return axusbnet_resume (intf); } -static void -asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val) +static int ax88772b_resume (struct usb_interface *intf) { - struct usbnet *dev = netdev_priv(netdev); - __le16 res = cpu_to_le16(val); + struct usbnet *dev = usb_get_intfdata(intf); + struct ax88772b_data *ax772b_data = (struct ax88772b_data *)dev->priv; - netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", - phy_id, loc, val); - mutex_lock(&dev->phy_mutex); - asix_set_sw_mii(dev); - asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res); - asix_set_hw_mii(dev); - mutex_unlock(&dev->phy_mutex); -} + if (ax772b_data->psc & AX_SWRESET_WOLLP) { + ax8817x_write_cmd (dev, AX_CMD_SW_RESET, + AX_SWRESET_IPRL | (ax772b_data->psc & 0x7FFF), + 0, 0, NULL); + } -/* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */ -static u32 asix_get_phyid(struct usbnet *dev) -{ - int phy_reg; - u32 phy_id; + if (ax772b_data->psc & (AX_SWRESET_IPPSL_0 | AX_SWRESET_IPPSL_1)) { + ax88772a_phy_powerup (dev); + } - phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); - if (phy_reg < 0) - return 0; + netif_carrier_off (dev->net); - phy_id = (phy_reg & 0xffff) << 16; + return axusbnet_resume (intf); +} - phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); - if (phy_reg < 0) - return 0; +static int ax88172_link_reset(struct usbnet *dev) +{ + u16 lpa; + u16 adv; + u16 res; + u8 mode; - phy_id |= (phy_reg & 0xffff); + mode = AX_MEDIUM_TX_ABORT_ALLOW | AX_MEDIUM_FLOW_CONTROL_EN; + lpa = ax8817x_mdio_read_le(dev->net, dev->mii.phy_id, MII_LPA); + adv = ax8817x_mdio_read_le(dev->net, dev->mii.phy_id, MII_ADVERTISE); + res = mii_nway_result(lpa|adv); + if (res & LPA_DUPLEX) + mode |= AX_MEDIUM_FULL_DUPLEX; + ax8817x_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL); - return phy_id; + return 0; } static void -asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) +ax8817x_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) { struct usbnet *dev = netdev_priv(net); - u8 opt; + u8 *opt; - if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) { - wolinfo->supported = 0; - wolinfo->wolopts = 0; + wolinfo->supported = 0; + wolinfo->wolopts = 0; + + opt = kmalloc (1, GFP_KERNEL); + if (!opt) return; - } + + if (ax8817x_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, opt) < 0) + return; + wolinfo->supported = WAKE_PHY | WAKE_MAGIC; - wolinfo->wolopts = 0; - if (opt & AX_MONITOR_MODE) { - if (opt & AX_MONITOR_LINK) - wolinfo->wolopts |= WAKE_PHY; - if (opt & AX_MONITOR_MAGIC) - wolinfo->wolopts |= WAKE_MAGIC; - } + + if (*opt & AX_MONITOR_LINK) + wolinfo->wolopts |= WAKE_PHY; + if (*opt & AX_MONITOR_MAGIC) + wolinfo->wolopts |= WAKE_MAGIC; + + kfree (opt); } static int -asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) +ax8817x_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo) { struct usbnet *dev = netdev_priv(net); - u8 opt = 0; + u8 *opt; + opt = kmalloc (1, GFP_KERNEL); + if (!opt) + return -ENOMEM; + + *opt = 0; if (wolinfo->wolopts & WAKE_PHY) - opt |= AX_MONITOR_LINK; + *opt |= AX_MONITOR_LINK; if (wolinfo->wolopts & WAKE_MAGIC) - opt |= AX_MONITOR_MAGIC; - if (opt != 0) - opt |= AX_MONITOR_MODE; + *opt |= AX_MONITOR_MAGIC; - if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE, - opt, 0, 0, NULL) < 0) - return -EINVAL; + ax8817x_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE, *opt, 0, 0, NULL); + kfree (opt); return 0; } -static int asix_get_eeprom_len(struct net_device *net) +static int ax8817x_get_eeprom_len(struct net_device *net) { - struct usbnet *dev = netdev_priv(net); - struct asix_data *data = (struct asix_data *)&dev->data; - - return data->eeprom_len; + return AX_EEPROM_LEN; } -static int asix_get_eeprom(struct net_device *net, +static int ax8817x_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom, u8 *data) { struct usbnet *dev = netdev_priv(net); - __le16 *ebuf = (__le16 *)data; + u16 *ebuf = (u16 *)data; int i; /* Crude hack to ensure that we don't overwrite memory @@ -729,722 +813,2635 @@ static int asix_get_eeprom(struct net_device *net, /* ax8817x returns 2 bytes from eeprom on read */ for (i=0; i < eeprom->len / 2; i++) { - if (asix_read_cmd(dev, AX_CMD_READ_EEPROM, + if (ax8817x_read_cmd(dev, AX_CMD_READ_EEPROM, eeprom->offset + i, 0, 2, &ebuf[i]) < 0) return -EINVAL; } return 0; } -static void asix_get_drvinfo (struct net_device *net, +static void ax8817x_get_drvinfo (struct net_device *net, struct ethtool_drvinfo *info) { - struct usbnet *dev = netdev_priv(net); - struct asix_data *data = (struct asix_data *)&dev->data; - /* Inherit standard device info */ - usbnet_get_drvinfo(net, info); - strncpy (info->driver, driver_name, sizeof info->driver); - strncpy (info->version, DRIVER_VERSION, sizeof info->version); - info->eedump_len = data->eeprom_len; + axusbnet_get_drvinfo(net, info); + info->eedump_len = 0x3e; } -static u32 asix_get_link(struct net_device *net) +static int ax8817x_get_settings(struct net_device *net, struct ethtool_cmd *cmd) { struct usbnet *dev = netdev_priv(net); + return mii_ethtool_gset(&dev->mii,cmd); +} - return mii_link_ok(&dev->mii); +static int ax8817x_set_settings(struct net_device *net, struct ethtool_cmd *cmd) +{ + struct usbnet *dev = netdev_priv(net); + return mii_ethtool_sset(&dev->mii,cmd); } -static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd) +/* We need to override some ethtool_ops so we require our + own structure so we don't interfere with other usbnet + devices that may be connected at the same time. */ +static struct ethtool_ops ax8817x_ethtool_ops = { + .get_drvinfo = ax8817x_get_drvinfo, + .get_link = ethtool_op_get_link, + .get_msglevel = axusbnet_get_msglevel, + .set_msglevel = axusbnet_set_msglevel, + .get_wol = ax8817x_get_wol, + .set_wol = ax8817x_set_wol, + .get_eeprom_len = ax8817x_get_eeprom_len, + .get_eeprom = ax8817x_get_eeprom, + .get_settings = ax8817x_get_settings, + .set_settings = ax8817x_set_settings, +}; + +static int ax8817x_ioctl (struct net_device *net, struct ifreq *rq, int cmd) { struct usbnet *dev = netdev_priv(net); return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); } -static int asix_set_mac_address(struct net_device *net, void *p) +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,29) +static const struct net_device_ops ax88x72_netdev_ops = { + .ndo_open = axusbnet_open, + .ndo_stop = axusbnet_stop, + .ndo_start_xmit = axusbnet_start_xmit, + .ndo_tx_timeout = axusbnet_tx_timeout, + .ndo_change_mtu = axusbnet_change_mtu, + .ndo_get_stats = axusbnet_get_stats, + .ndo_do_ioctl = ax8817x_ioctl, + .ndo_set_mac_address = ax8817x_set_mac_addr, + .ndo_validate_addr = eth_validate_addr, + .ndo_set_multicast_list = ax8817x_set_multicast, +}; +#endif + +static int ax8817x_bind(struct usbnet *dev, struct usb_interface *intf) { - struct usbnet *dev = netdev_priv(net); - struct asix_data *data = (struct asix_data *)&dev->data; - struct sockaddr *addr = p; + int ret = 0; + void *buf; + int i; + unsigned long gpio_bits = dev->driver_info->data; + struct ax8817x_data *data = (struct ax8817x_data *)&dev->data; - if (netif_running(net)) - return -EBUSY; - if (!is_valid_ether_addr(addr->sa_data)) - return -EADDRNOTAVAIL; + axusbnet_get_endpoints(dev,intf); - memcpy(net->dev_addr, addr->sa_data, ETH_ALEN); + buf = kmalloc(ETH_ALEN, GFP_KERNEL); + if(!buf) { + ret = -ENOMEM; + goto out1; + } - /* We use the 20 byte dev->data - * for our 6 byte mac buffer - * to avoid allocating memory that - * is tricky to free later */ - memcpy(data->mac_addr, addr->sa_data, ETH_ALEN); - asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN, - data->mac_addr); + /* Toggle the GPIOs in a manufacturer/model specific way */ + for (i = 2; i >= 0; i--) { + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_GPIOS, + (gpio_bits >> (i * 8)) & 0xff, 0, 0, + NULL)) < 0) + goto out2; + msleep(5); + } + + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, + 0x80, 0, 0, NULL)) < 0) { + deverr(dev, "send AX_CMD_WRITE_RX_CTL failed: %d", ret); + goto out2; + } + + /* Get the MAC address */ + memset(buf, 0, ETH_ALEN); + if ((ret = ax8817x_read_cmd(dev, AX_CMD_READ_NODE_ID, + 0, 0, 6, buf)) < 0) { + deverr(dev, "read AX_CMD_READ_NODE_ID failed: %d", ret); + goto out2; + } + memcpy(dev->net->dev_addr, buf, ETH_ALEN); + + /* Get the PHY id */ + if ((ret = ax8817x_read_cmd(dev, AX_CMD_READ_PHY_ID, + 0, 0, 2, buf)) < 0) { + deverr(dev, "error on read AX_CMD_READ_PHY_ID: %02x", ret); + goto out2; + } else if (ret < 2) { + /* this should always return 2 bytes */ + deverr(dev, "Read PHYID returned less than 2 bytes: ret=%02x", + ret); + ret = -EIO; + goto out2; + } + + /* Initialize MII structure */ + dev->mii.dev = dev->net; + dev->mii.mdio_read = ax8817x_mdio_read_le; + dev->mii.mdio_write = ax8817x_mdio_write_le; + dev->mii.phy_id_mask = 0x3f; + dev->mii.reg_num_mask = 0x1f; + dev->mii.phy_id = *((u8 *)buf + 1); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) + dev->net->do_ioctl = ax8817x_ioctl; + dev->net->set_multicast_list = ax8817x_set_multicast; + dev->net->set_mac_address = ax8817x_set_mac_addr; +#else + dev->net->netdev_ops = &ax88x72_netdev_ops; +#endif + + dev->net->ethtool_ops = &ax8817x_ethtool_ops; + + /* Register suspend and resume functions */ + data->suspend = axusbnet_suspend; + data->resume = axusbnet_resume; + + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE, + ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); + mii_nway_restart(&dev->mii); + + printk (version); return 0; +out2: + kfree(buf); +out1: + return ret; } -/* We need to override some ethtool_ops so we require our - own structure so we don't interfere with other usbnet - devices that may be connected at the same time. */ -static const struct ethtool_ops ax88172_ethtool_ops = { - .get_drvinfo = asix_get_drvinfo, - .get_link = asix_get_link, - .get_msglevel = usbnet_get_msglevel, - .set_msglevel = usbnet_set_msglevel, - .get_wol = asix_get_wol, - .set_wol = asix_set_wol, - .get_eeprom_len = asix_get_eeprom_len, - .get_eeprom = asix_get_eeprom, - .get_settings = usbnet_get_settings, - .set_settings = usbnet_set_settings, - .nway_reset = usbnet_nway_reset, +static struct ethtool_ops ax88772_ethtool_ops = { + .get_drvinfo = ax8817x_get_drvinfo, + .get_link = ethtool_op_get_link, + .get_msglevel = axusbnet_get_msglevel, + .set_msglevel = axusbnet_set_msglevel, + .get_wol = ax8817x_get_wol, + .set_wol = ax8817x_set_wol, + .get_eeprom_len = ax8817x_get_eeprom_len, + .get_eeprom = ax8817x_get_eeprom, + .get_settings = ax8817x_get_settings, + .set_settings = ax8817x_set_settings, }; -static void ax88172_set_multicast(struct net_device *net) +static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) { - struct usbnet *dev = netdev_priv(net); - struct asix_data *data = (struct asix_data *)&dev->data; - u8 rx_ctl = 0x8c; + int ret; + void *buf; + struct ax8817x_data *data = (struct ax8817x_data *)&dev->data; + struct ax88772_data *ax772_data = NULL; - if (net->flags & IFF_PROMISC) { - rx_ctl |= 0x01; - } else if (net->flags & IFF_ALLMULTI || - netdev_mc_count(net) > AX_MAX_MCAST) { - rx_ctl |= 0x02; - } else if (netdev_mc_empty(net)) { - /* just broadcast and directed */ - } else { - /* We use the 20 byte dev->data - * for our 8 byte filter buffer - * to avoid allocating memory that - * is tricky to free later */ - struct netdev_hw_addr *ha; - u32 crc_bits; + axusbnet_get_endpoints(dev,intf); - memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE); + buf = kmalloc(6, GFP_KERNEL); + if(!buf) { + deverr(dev, "Cannot allocate memory for buffer"); + ret = -ENOMEM; + goto out1; + } - /* Build the multicast hash filter. */ - netdev_for_each_mc_addr(ha, net) { - crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; - data->multi_filter[crc_bits >> 3] |= - 1 << (crc_bits & 7); + ax772_data = kmalloc (sizeof(*ax772_data), GFP_KERNEL); + if (!ax772_data) { + deverr(dev, "Cannot allocate memory for AX88772 data"); + kfree (buf); + return -ENOMEM; + } + memset (ax772_data, 0, sizeof(*ax772_data)); + dev->priv = ax772_data; + + ax772_data->ax_work = create_singlethread_workqueue ("ax88772"); + if (!ax772_data->ax_work) { + kfree (ax772_data); + kfree (buf); + return -ENOMEM; + } + + ax772_data->dev = dev; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) + INIT_WORK (&ax772_data->check_link, ax88772_link_reset, dev); +#else + INIT_WORK (&ax772_data->check_link, ax88772_link_reset); +#endif + + /* reload eeprom data */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_GPIOS, + 0x00B0, 0, 0, NULL)) < 0) + goto out2; + + msleep(5); + + /* Initialize MII structure */ + dev->mii.dev = dev->net; + dev->mii.mdio_read = ax8817x_mdio_read_le; + dev->mii.mdio_write = ax8817x_mdio_write_le; + dev->mii.phy_id_mask = 0xff; + dev->mii.reg_num_mask = 0xff; + + /* Get the PHY id */ + if ((ret = ax8817x_read_cmd(dev, AX_CMD_READ_PHY_ID, + 0, 0, 2, buf)) < 0) { + deverr(dev, "Error reading PHY ID: %02x", ret); + goto out2; + } else if (ret < 2) { + /* this should always return 2 bytes */ + deverr(dev, "Read PHYID returned less than 2 bytes: ret=%02x", + ret); + ret = -EIO; + goto out2; + } + dev->mii.phy_id = *((u8 *)buf + 1); + + if (dev->mii.phy_id == 0x10) + { + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_PHY_SELECT, + 0x0001, 0, 0, NULL)) < 0) { + deverr(dev, "Select PHY #1 failed: %d", ret); + goto out2; } - asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0, - AX_MCAST_FILTER_SIZE, data->multi_filter); + if ((ret = ax8817x_write_cmd (dev, AX_CMD_SW_RESET, + AX_SWRESET_IPPD, + 0, 0, NULL)) < 0) { + deverr(dev, "Failed to power down PHY: %d", ret); + goto out2; + } + + msleep(150); + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_CLEAR, + 0, 0, NULL)) < 0) { + deverr(dev, + "Failed to perform software reset: %d", ret); + goto out2; + } + + msleep(150); + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPRL | AX_SWRESET_PRL, + 0, 0, NULL)) < 0) { + deverr(dev, + "Failed to set PHY reset control: %d", ret); + goto out2; + } + } + else + { + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_PHY_SELECT, + 0x0000, 0, 0, NULL)) < 0) { + deverr(dev, "Select PHY #1 failed: %d", ret); + goto out2; + } + + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPPD | AX_SWRESET_PRL, + 0, 0, NULL)) < 0) { + deverr(dev, + "Failed to power down internal PHY: %d", ret); + goto out2; + } + } + + msleep(150); + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, + 0x0000, 0, 0, NULL)) < 0) { + deverr(dev, "Failed to reset RX_CTL: %d", ret); + goto out2; + } + + /* Get the MAC address */ + memset(buf, 0, ETH_ALEN); + if ((ret = ax8817x_read_cmd(dev, AX88772_CMD_READ_NODE_ID, + 0, 0, ETH_ALEN, buf)) < 0) { + deverr(dev, "Failed to read MAC address: %d", ret); + goto out2; + } + memcpy(dev->net->dev_addr, buf, ETH_ALEN); + + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SET_SW_MII, + 0, 0, 0, NULL)) < 0) { + deverr(dev, "Enabling software MII failed: %d", ret); + goto out2; + } + + if (dev->mii.phy_id == 0x10) + { + if ((ret = ax8817x_mdio_read_le(dev->net, + dev->mii.phy_id, 2)) != 0x003b) { + deverr(dev, "Read PHY register 2 must be 0x3b00: %d", + ret); + goto out2; + } + + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_PRL, + 0, 0, NULL)) < 0) { + deverr(dev, "Set external PHY reset pin level: %d", ret); + goto out2; + } + msleep(150); + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPRL | AX_SWRESET_PRL, + 0, 0, NULL)) < 0) { + deverr(dev, + "Set Internal/External PHY reset control: %d", + ret); + goto out2; + } + msleep(150); + } + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) + dev->net->do_ioctl = ax8817x_ioctl; + dev->net->set_multicast_list = ax8817x_set_multicast; + dev->net->set_mac_address = ax8817x_set_mac_addr; +#else + dev->net->netdev_ops = &ax88x72_netdev_ops; +#endif + + dev->net->ethtool_ops = &ax88772_ethtool_ops; + + /* Register suspend and resume functions */ + data->suspend = ax88772_suspend; + data->resume = ax88772_resume; - rx_ctl |= 0x10; + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE, + ADVERTISE_ALL | ADVERTISE_CSMA); + + mii_nway_restart(&dev->mii); + ax772_data->autoneg_start = jiffies; + ax772_data->Event = WAIT_AUTONEG_COMPLETE; + + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, + AX88772_MEDIUM_DEFAULT, 0, 0, NULL)) < 0) { + deverr(dev, "Write medium mode register: %d", ret); + goto out2; + } + + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_IPG0, + AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT << 8, + AX88772_IPG2_DEFAULT, 0, NULL)) < 0) { + deverr(dev, "Write IPG,IPG1,IPG2 failed: %d", ret); + goto out2; + } + if ((ret = + ax8817x_write_cmd(dev, AX_CMD_SET_HW_MII, 0, 0, 0, NULL)) < 0) { + deverr(dev, "Failed to set hardware MII: %02x", ret); + goto out2; + } + + /* Set RX_CTL to default values with 2k buffer, and enable cactus */ + if ((ret = + ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, 0x0088, 0, 0, + NULL)) < 0) { + deverr(dev, "Reset RX_CTL failed: %d", ret); + goto out2; + } + + /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ + if (dev->driver_info->flags & FLAG_FRAMING_AX) { + /* hard_mtu is still the default - the device does not support + jumbo eth frames */ + dev->rx_urb_size = 2048; } - asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL); + kfree (buf); + printk (version); + return 0; + +out2: + destroy_workqueue (ax772_data->ax_work); + kfree (ax772_data); + kfree(buf); +out1: + return ret; } -static int ax88172_link_reset(struct usbnet *dev) +static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf) { - u8 mode; - struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; + struct ax88772_data *ax772_data = (struct ax88772_data *)dev->priv; - mii_check_media(&dev->mii, 1, 1); - mii_ethtool_gset(&dev->mii, &ecmd); - mode = AX88172_MEDIUM_DEFAULT; + if (ax772_data) { - if (ecmd.duplex != DUPLEX_FULL) - mode |= ~AX88172_MEDIUM_FD; + flush_workqueue (ax772_data->ax_work); + destroy_workqueue (ax772_data->ax_work); - netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", - ethtool_cmd_speed(&ecmd), ecmd.duplex, mode); + /* stop MAC operation */ + ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, + AX_RX_CTL_STOP, 0, 0, NULL); - asix_write_medium_mode(dev, mode); + /* Power down PHY */ + ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPPD, 0, 0, NULL); - return 0; + kfree (ax772_data); + } } -static const struct net_device_ops ax88172_netdev_ops = { - .ndo_open = usbnet_open, - .ndo_stop = usbnet_stop, - .ndo_start_xmit = usbnet_start_xmit, - .ndo_tx_timeout = usbnet_tx_timeout, - .ndo_change_mtu = usbnet_change_mtu, - .ndo_set_mac_address = eth_mac_addr, - .ndo_validate_addr = eth_validate_addr, - .ndo_do_ioctl = asix_ioctl, - .ndo_set_multicast_list = ax88172_set_multicast, -}; +static int ax88772a_phy_powerup (struct usbnet *dev) +{ + int ret; + /* set the embedded Ethernet PHY in power-down state */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPPD | AX_SWRESET_IPRL, 0, 0, NULL)) < 0) { + deverr(dev, "Failed to power down PHY: %d", ret); + return ret; + } + + msleep(10); + + + /* set the embedded Ethernet PHY in power-up state */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPRL, 0, 0, NULL)) < 0) { + deverr(dev, "Failed to reset PHY: %d", ret); + return ret; + } + + msleep(600); + + /* set the embedded Ethernet PHY in reset state */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_CLEAR, 0, 0, NULL)) < 0) { + deverr(dev, "Failed to power up PHY: %d", ret); + return ret; + } -static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf) + /* set the embedded Ethernet PHY in power-up state */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPRL, 0, 0, NULL)) < 0) { + deverr(dev, "Failed to reset PHY: %d", ret); + return ret; + } + + return 0; +} + +static int ax88772a_bind(struct usbnet *dev, struct usb_interface *intf) { - int ret = 0; - u8 buf[ETH_ALEN]; - int i; - unsigned long gpio_bits = dev->driver_info->data; - struct asix_data *data = (struct asix_data *)&dev->data; + int ret = -EIO; + void *buf; + struct ax8817x_data *data = (struct ax8817x_data *)&dev->data; + struct ax88772a_data *ax772a_data = NULL; - data->eeprom_len = AX88172_EEPROM_LEN; + axusbnet_get_endpoints(dev,intf); - usbnet_get_endpoints(dev,intf); + buf = kmalloc(6, GFP_KERNEL); + if(!buf) { + deverr(dev, "Cannot allocate memory for buffer"); + ret = -ENOMEM; + goto out1; + } - /* Toggle the GPIOs in a manufacturer/model specific way */ - for (i = 2; i >= 0; i--) { - if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, - (gpio_bits >> (i * 8)) & 0xff, 0, 0, - NULL)) < 0) - goto out; - msleep(5); + ax772a_data = kmalloc (sizeof(*ax772a_data), GFP_KERNEL); + if (!ax772a_data) { + deverr(dev, "Cannot allocate memory for AX88772A data"); + kfree (buf); + return -ENOMEM; + } + memset (ax772a_data, 0, sizeof(*ax772a_data)); + dev->priv = ax772a_data; + + ax772a_data->ax_work = create_singlethread_workqueue ("ax88772a"); + if (!ax772a_data->ax_work) { + kfree (ax772a_data); + kfree (buf); + return -ENOMEM; } - if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0) - goto out; + ax772a_data->dev = dev; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) + INIT_WORK (&ax772a_data->check_link, ax88772a_link_reset, dev); +#else + INIT_WORK (&ax772a_data->check_link, ax88772a_link_reset); +#endif + + /* Get the EEPROM data*/ + if ((ret = ax8817x_read_cmd(dev, AX_CMD_READ_EEPROM, + 0x0017, 0, 2, (void *)&ax772a_data->EepromData)) < 0) { + deverr(dev, "read SROM address 17h failed: %d", ret); + goto out2; + } + le16_to_cpus (&ax772a_data->EepromData); + /* End of get EEPROM data */ + + /* reload eeprom data */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_GPIOS, + AXGPIOS_RSE, 0, 0, NULL)) < 0) + goto out2; + + msleep(5); + + /* Initialize MII structure */ + dev->mii.dev = dev->net; + dev->mii.mdio_read = ax8817x_mdio_read_le; + dev->mii.mdio_write = ax8817x_mdio_write_le; + dev->mii.phy_id_mask = 0xff; + dev->mii.reg_num_mask = 0xff; + + /* Get the PHY id */ + if ((ret = ax8817x_read_cmd(dev, AX_CMD_READ_PHY_ID, + 0, 0, 2, buf)) < 0) { + deverr(dev, "Error reading PHY ID: %02x", ret); + goto out2; + } else if (ret < 2) { + /* this should always return 2 bytes */ + deverr(dev, "Read PHYID returned less than 2 bytes: ret=%02x", + ret); + goto out2; + } + dev->mii.phy_id = *((u8 *)buf + 1); + + if(dev->mii.phy_id != 0x10) { + deverr(dev, "Got wrong PHY ID: %02x", dev->mii.phy_id); + goto out2; + } + + /* select the embedded 10/100 Ethernet PHY */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_PHY_SELECT, + AX_PHYSEL_SSEN | AX_PHYSEL_PSEL | AX_PHYSEL_SSMII, + 0, 0, NULL)) < 0) { + deverr(dev, "Select PHY #1 failed: %d", ret); + goto out2; + } + + if ((ret = ax88772a_phy_powerup (dev)) < 0) + goto out2; + + /* stop MAC operation */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, + AX_RX_CTL_STOP, 0, 0, NULL)) < 0) { + deverr(dev, "Reset RX_CTL failed: %d", ret); + goto out2; + } /* Get the MAC address */ - if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, + memset(buf, 0, ETH_ALEN); + if ((ret = ax8817x_read_cmd(dev, AX88772_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf)) < 0) { - dbg("read AX_CMD_READ_NODE_ID failed: %d", ret); - goto out; + deverr(dev, "Failed to read MAC address: %d", ret); + goto out2; } memcpy(dev->net->dev_addr, buf, ETH_ALEN); - /* Initialize MII structure */ - dev->mii.dev = dev->net; - dev->mii.mdio_read = asix_mdio_read; - dev->mii.mdio_write = asix_mdio_write; - dev->mii.phy_id_mask = 0x3f; - dev->mii.reg_num_mask = 0x1f; - dev->mii.phy_id = asix_get_phy_addr(dev); + /* make sure the driver can enable sw mii operation */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SET_SW_MII, + 0, 0, 0, NULL)) < 0) { + deverr(dev, "Enabling software MII failed: %d", ret); + goto out2; + } - dev->net->netdev_ops = &ax88172_netdev_ops; - dev->net->ethtool_ops = &ax88172_ethtool_ops; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) + dev->net->do_ioctl = ax8817x_ioctl; + dev->net->set_multicast_list = ax8817x_set_multicast; + dev->net->set_mac_address = ax8817x_set_mac_addr; +#else + dev->net->netdev_ops = &ax88x72_netdev_ops; +#endif + + dev->net->ethtool_ops = &ax88772_ethtool_ops; + + /* Register suspend and resume functions */ + data->suspend = ax88772_suspend; + data->resume = ax88772_resume; + + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE, + ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); - asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); - asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, - ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); mii_nway_restart(&dev->mii); + ax772a_data->autoneg_start = jiffies; + ax772a_data->Event = WAIT_AUTONEG_COMPLETE; - return 0; + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, + AX88772_MEDIUM_DEFAULT, 0, 0, NULL)) < 0) { + deverr(dev, "Write medium mode register: %d", ret); + goto out2; + } + + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_IPG0, + AX88772A_IPG0_DEFAULT | AX88772A_IPG1_DEFAULT << 8, + AX88772A_IPG2_DEFAULT, 0, NULL)) < 0) { + deverr(dev, "Write IPG,IPG1,IPG2 failed: %d", ret); + goto out2; + } + + /* Set RX_CTL to default values with 2k buffer, and enable cactus */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, + (AX_RX_CTL_START | AX_RX_CTL_AB), + 0, 0, NULL)) < 0) { + deverr(dev, "Reset RX_CTL failed: %d", ret); + goto out2; + } + + /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ + if (dev->driver_info->flags & FLAG_FRAMING_AX) { + /* hard_mtu is still the default - the device does not support + jumbo eth frames */ + dev->rx_urb_size = 2048; + } + + kfree (buf); -out: + printk (version); + + return ret; +out2: + destroy_workqueue (ax772a_data->ax_work); + kfree (ax772a_data); + kfree (buf); +out1: return ret; } -static const struct ethtool_ops ax88772_ethtool_ops = { - .get_drvinfo = asix_get_drvinfo, - .get_link = asix_get_link, - .get_msglevel = usbnet_get_msglevel, - .set_msglevel = usbnet_set_msglevel, - .get_wol = asix_get_wol, - .set_wol = asix_set_wol, - .get_eeprom_len = asix_get_eeprom_len, - .get_eeprom = asix_get_eeprom, - .get_settings = usbnet_get_settings, - .set_settings = usbnet_set_settings, - .nway_reset = usbnet_nway_reset, -}; - -static int ax88772_link_reset(struct usbnet *dev) +static void ax88772a_unbind(struct usbnet *dev, struct usb_interface *intf) { - u16 mode; - struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; + struct ax88772a_data *ax772a_data = (struct ax88772a_data *)dev->priv; + + if (ax772a_data) { - mii_check_media(&dev->mii, 1, 1); - mii_ethtool_gset(&dev->mii, &ecmd); - mode = AX88772_MEDIUM_DEFAULT; + flush_workqueue (ax772a_data->ax_work); + destroy_workqueue (ax772a_data->ax_work); - if (ethtool_cmd_speed(&ecmd) != SPEED_100) - mode &= ~AX_MEDIUM_PS; + /* stop MAC operation */ + ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, + AX_RX_CTL_STOP, 0, 0, NULL); - if (ecmd.duplex != DUPLEX_FULL) - mode &= ~AX_MEDIUM_FD; + /* Power down PHY */ + ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPPD, 0, 0, NULL); - netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", - ethtool_cmd_speed(&ecmd), ecmd.duplex, mode); + kfree (ax772a_data); + } +} + +static int ax88772b_set_csums(struct usbnet *dev) +{ + struct ax88772b_data *ax772b_data = (struct ax88772b_data *)dev->priv; + u16 checksum; + + if (ax772b_data->checksum & AX_RX_CHECKSUM) + checksum = AX_RXCOE_DEF_CSUM; + else + checksum = 0; - asix_write_medium_mode(dev, mode); + ax8817x_write_cmd (dev, AX_CMD_WRITE_RXCOE_CTL, + checksum, 0, 0, NULL); + + if (ax772b_data->checksum & AX_TX_CHECKSUM) + checksum = AX_TXCOE_DEF_CSUM; + else + checksum = 0; + + ax8817x_write_cmd (dev, AX_CMD_WRITE_TXCOE_CTL, + checksum, 0, 0, NULL); return 0; } -static const struct net_device_ops ax88772_netdev_ops = { - .ndo_open = usbnet_open, - .ndo_stop = usbnet_stop, - .ndo_start_xmit = usbnet_start_xmit, - .ndo_tx_timeout = usbnet_tx_timeout, - .ndo_change_mtu = usbnet_change_mtu, - .ndo_set_mac_address = asix_set_mac_address, - .ndo_validate_addr = eth_validate_addr, - .ndo_do_ioctl = asix_ioctl, - .ndo_set_multicast_list = asix_set_multicast, -}; +static u32 ax88772b_get_tx_csum(struct net_device *netdev) +{ + struct usbnet *dev = netdev_priv(netdev); + struct ax88772b_data *ax772b_data = (struct ax88772b_data *)dev->priv; -static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf) + return (ax772b_data->checksum & AX_TX_CHECKSUM); +} + +static u32 ax88772b_get_rx_csum(struct net_device *netdev) +{ + struct usbnet *dev = netdev_priv(netdev); + struct ax88772b_data *ax772b_data = (struct ax88772b_data *)dev->priv; + + return (ax772b_data->checksum & AX_RX_CHECKSUM); +} + +static int ax88772b_set_rx_csum(struct net_device *netdev, u32 val) +{ + struct usbnet *dev = netdev_priv(netdev); + struct ax88772b_data *ax772b_data = (struct ax88772b_data *)dev->priv; + + if (val) + ax772b_data->checksum |= AX_RX_CHECKSUM; + else + ax772b_data->checksum &= ~AX_RX_CHECKSUM; + + return ax88772b_set_csums(dev); +} + +static int ax88772b_set_tx_csum(struct net_device *netdev, u32 val) { - int ret, embd_phy; - u16 rx_ctl; - struct asix_data *data = (struct asix_data *)&dev->data; - u8 buf[ETH_ALEN]; - u32 phyid; + struct usbnet *dev = netdev_priv(netdev); + struct ax88772b_data *ax772b_data = (struct ax88772b_data *)dev->priv; - data->eeprom_len = AX88772_EEPROM_LEN; + if (val) + ax772b_data->checksum |= AX_TX_CHECKSUM; + else + ax772b_data->checksum &= ~AX_TX_CHECKSUM; + + ethtool_op_set_tx_csum(netdev, val); + + return ax88772b_set_csums(dev); +} - usbnet_get_endpoints(dev,intf); +static struct ethtool_ops ax88772b_ethtool_ops = { + .get_drvinfo = ax8817x_get_drvinfo, + .get_link = ethtool_op_get_link, + .get_msglevel = axusbnet_get_msglevel, + .set_msglevel = axusbnet_set_msglevel, + .get_wol = ax8817x_get_wol, + .set_wol = ax8817x_set_wol, + .get_eeprom_len = ax8817x_get_eeprom_len, + .get_eeprom = ax8817x_get_eeprom, + .get_settings = ax8817x_get_settings, + .set_settings = ax8817x_set_settings, + .set_tx_csum = ax88772b_set_tx_csum, + .get_tx_csum = ax88772b_get_tx_csum, + .get_rx_csum = ax88772b_get_rx_csum, + .set_rx_csum = ax88772b_set_rx_csum, +}; - if ((ret = asix_write_gpio(dev, - AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0) - goto out; +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,29) +static const struct net_device_ops ax88772b_netdev_ops = { + .ndo_open = axusbnet_open, + .ndo_stop = axusbnet_stop, + .ndo_start_xmit = axusbnet_start_xmit, + .ndo_tx_timeout = axusbnet_tx_timeout, + .ndo_change_mtu = axusbnet_change_mtu, + .ndo_do_ioctl = ax8817x_ioctl, + .ndo_get_stats = axusbnet_get_stats, + .ndo_set_mac_address = ax8817x_set_mac_addr, + .ndo_validate_addr = eth_validate_addr, + .ndo_set_multicast_list = ax88772b_set_multicast, +}; +#endif - /* 0x10 is the phy id of the embedded 10/100 ethernet phy */ - embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0); - if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, - embd_phy, 0, 0, NULL)) < 0) { - dbg("Select PHY #1 failed: %d", ret); - goto out; +static int ax88772b_bind(struct usbnet *dev, struct usb_interface *intf) +{ + int ret; + void *buf; + struct ax8817x_data *data = (struct ax8817x_data *)&dev->data; + struct ax88772b_data *ax772b_data; + u16 *tmp16; + u8 i; + u8 TempPhySelect; + bool InternalPhy; + + axusbnet_get_endpoints(dev,intf); + + buf = kmalloc (6, GFP_KERNEL); + if (!buf) { + deverr(dev, "Cannot allocate memory for buffer"); + return -ENOMEM; } + tmp16 = (u16 *)buf; - if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0) - goto out; + ax772b_data = kmalloc (sizeof(*ax772b_data), GFP_KERNEL); + if (!ax772b_data) { + deverr(dev, "Cannot allocate memory for AX88772B data"); + kfree (buf); + return -ENOMEM; + } + memset (ax772b_data, 0, sizeof(*ax772b_data)); + dev->priv = ax772b_data; + + ax772b_data->ax_work = create_singlethread_workqueue ("ax88772b"); + if (!ax772b_data->ax_work) { + kfree (buf); + kfree (ax772b_data); + return -ENOMEM; + } - msleep(150); - if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0) - goto out; + ax772b_data->dev = dev; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) + INIT_WORK (&ax772b_data->check_link, ax88772b_link_reset, dev); +#else + INIT_WORK (&ax772b_data->check_link, ax88772b_link_reset); +#endif + + if ((ret = ax8817x_read_cmd (dev, AX_CMD_SW_PHY_STATUS, 0, 0, 1, + &TempPhySelect)) < 0) { + deverr(dev, "read SW interface selection status register" + "failed: %d\n", ret); + goto err_out; + } - msleep(150); - if (embd_phy) { - if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0) - goto out; + TempPhySelect &= 0x0C; + + if (TempPhySelect == AX_PHYSEL_SSRMII) { + InternalPhy = false; + ax772b_data->OperationMode = OPERATION_MAC_MODE; + ax772b_data->PhySelect = 0x00; + } + else if (TempPhySelect == AX_PHYSEL_SSRRMII) { + InternalPhy = true; + ax772b_data->OperationMode = OPERATION_PHY_MODE; + ax772b_data->PhySelect = 0x00; + } + else if (TempPhySelect == AX_PHYSEL_SSMII) { + InternalPhy = true; + ax772b_data->OperationMode = OPERATION_MAC_MODE; + ax772b_data->PhySelect = 0x01; } else { - if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0) - goto out; + deverr(dev, "Unknown MII type\n"); + goto err_out; } - msleep(150); - rx_ctl = asix_read_rx_ctl(dev); - dbg("RX_CTL is 0x%04x after software reset", rx_ctl); - if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0) - goto out; + /* reload eeprom data */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_GPIOS, + AXGPIOS_RSE, 0, 0, NULL)) < 0) { + deverr(dev, "Failed to enable GPIO finction: %d", ret); + goto err_out; + } + msleep(5); - rx_ctl = asix_read_rx_ctl(dev); - dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl); + /* Get the EEPROM data*/ + if ((ret = ax8817x_read_cmd (dev, AX_CMD_READ_EEPROM, + 0x18, 0, 2, (void *)tmp16)) < 0) { + deverr(dev, "read SROM address 18h failed: %d", ret); + goto err_out; + } + le16_to_cpus(tmp16); + ax772b_data->psc = *tmp16 & 0xFF00; + /* End of get EEPROM data */ - /* Get the MAC address */ - if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, - 0, 0, ETH_ALEN, buf)) < 0) { - dbg("Failed to read MAC address: %d", ret); - goto out; + if (g_usr_mac) { + /* Get user set MAC address */ + memcpy(buf, g_mac_addr, ETH_ALEN); + } else { + /* Get the MAC address from EEPROM */ + memset(buf, 0, ETH_ALEN); + for (i = 0; i < (ETH_ALEN >> 1); i++) { + if ((ret = ax8817x_read_cmd (dev, AX_CMD_READ_EEPROM, + 0x04 + i, 0, 2, (buf + i * 2))) < 0) { + deverr(dev, "read SROM address 04h failed: %d", ret); + goto err_out; + } + } } memcpy(dev->net->dev_addr, buf, ETH_ALEN); + /* Set the MAC address */ + if ((ret = ax8817x_write_cmd (dev, AX88772_CMD_WRITE_NODE_ID, + 0, 0, ETH_ALEN, buf)) < 0) { + deverr(dev, "set MAC address failed: %d", ret); + goto err_out; + } + /* Initialize MII structure */ dev->mii.dev = dev->net; - dev->mii.mdio_read = asix_mdio_read; - dev->mii.mdio_write = asix_mdio_write; - dev->mii.phy_id_mask = 0x1f; - dev->mii.reg_num_mask = 0x1f; - dev->mii.phy_id = asix_get_phy_addr(dev); + dev->mii.mdio_read = ax8817x_mdio_read_le; + dev->mii.mdio_write = ax88772b_mdio_write_le; + dev->mii.phy_id_mask = 0xff; + dev->mii.reg_num_mask = 0xff; - phyid = asix_get_phyid(dev); - dbg("PHYID=0x%08x", phyid); + /* Get the PHY id */ + if ((ret = ax8817x_read_cmd(dev, AX_CMD_READ_PHY_ID, + 0, 0, 2, buf)) < 0) { + deverr(dev, "Error reading PHY ID: %02x", ret); + goto err_out; + } else if (ret < 2) { + /* this should always return 2 bytes */ + deverr(dev, "Read PHYID returned less than 2 bytes: ret=%02x", + ret); + ret = -EIO; + goto err_out; + } - if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0) - goto out; + if (InternalPhy) + dev->mii.phy_id = *((u8 *)buf + 1); + else + dev->mii.phy_id = *((u8 *)buf); - msleep(150); + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_PHY_SELECT, + ax772b_data->PhySelect, 0, 0, NULL)) < 0) { + deverr(dev, "Select PHY #1 failed: %d", ret); + goto err_out; + } - if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0) - goto out; +#if 0 + /* select the embedded 10/100 Ethernet PHY */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_PHY_SELECT, + AX_PHYSEL_SSEN | AX_PHYSEL_PSEL | AX_PHYSEL_SSMII + , 0, 0, NULL)) < 0) { + deverr(dev, "Select PHY #1 failed: %d", ret); + goto err_out; + } - msleep(150); + if(dev->mii.phy_id != 0x10) { + deverr(dev, "Got wrong PHY ID: %02x", dev->mii.phy_id); + ret = -EIO; + goto err_out; + } +#endif + if ((ret = ax88772a_phy_powerup (dev)) < 0) + goto err_out; + + /* stop MAC operation */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, + AX_RX_CTL_STOP, 0, 0, NULL)) < 0) { + deverr(dev, "Reset RX_CTL failed: %d", ret); + goto err_out; + } - dev->net->netdev_ops = &ax88772_netdev_ops; - dev->net->ethtool_ops = &ax88772_ethtool_ops; + /* make sure the driver can enable sw mii operation */ + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SET_SW_MII, + 0, 0, 0, NULL)) < 0) { + deverr(dev, "Enabling software MII failed: %d", ret); + goto err_out; + } + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) + dev->net->do_ioctl = ax8817x_ioctl; + dev->net->set_multicast_list = ax88772b_set_multicast; + dev->net->set_mac_address = ax8817x_set_mac_addr; +#else + dev->net->netdev_ops = &ax88772b_netdev_ops; +#endif + + dev->net->ethtool_ops = &ax88772b_ethtool_ops; + + /* Register suspend and resume functions */ + data->suspend = ax88772b_suspend; + data->resume = ax88772b_resume; + + if (ax772b_data->OperationMode == OPERATION_PHY_MODE) + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id + , MII_BMCR, 0x3900); + + if (dev->mii.phy_id != 0x10) + ax8817x_mdio_write_le(dev->net, 0x10, MII_BMCR, 0x3900); + + + if (dev->mii.phy_id == 0x10 && ax772b_data->OperationMode + != OPERATION_PHY_MODE) { + + *tmp16 = ax8817x_mdio_read_le(dev->net, dev->mii.phy_id, 0x12); + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, 0x12, + ((*tmp16 & 0xFF9F) | 0x0040)); + } + + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE, + ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); - asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); - asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, - ADVERTISE_ALL | ADVERTISE_CSMA); mii_nway_restart(&dev->mii); - if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0) - goto out; + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, + AX88772_MEDIUM_DEFAULT, 0, 0, NULL)) < 0) { + deverr(dev, "Failed to write medium mode: %d", ret); + goto err_out; + } - if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0, - AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT, - AX88772_IPG2_DEFAULT, 0, NULL)) < 0) { - dbg("Write IPG,IPG1,IPG2 failed: %d", ret); - goto out; + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_IPG0, + AX88772A_IPG0_DEFAULT | AX88772A_IPG1_DEFAULT << 8, + AX88772A_IPG2_DEFAULT, 0, NULL)) < 0) { + deverr(dev, "Failed to write interframe gap: %d", ret); + goto err_out; } - /* Set RX_CTL to default values with 2k buffer, and enable cactus */ - if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0) - goto out; + dev->net->features |= NETIF_F_IP_CSUM; +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22) + dev->net->features |= NETIF_F_IPV6_CSUM; +#endif - rx_ctl = asix_read_rx_ctl(dev); - dbg("RX_CTL is 0x%04x after all initializations", rx_ctl); + ax772b_data->checksum = AX_RX_CHECKSUM | AX_TX_CHECKSUM; + if ((ret = ax88772b_set_csums(dev)) < 0) { + deverr(dev, "Write RX_COE/TX_COE failed: %d", ret); + goto err_out; + } - rx_ctl = asix_read_medium_status(dev); - dbg("Medium Status is 0x%04x after all initializations", rx_ctl); + dev->rx_size = bsize & 0x07; + if (dev->udev->speed == USB_SPEED_HIGH) { - /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ - if (dev->driver_info->flags & FLAG_FRAMING_AX) { - /* hard_mtu is still the default - the device does not support - jumbo eth frames */ + if ((ret = ax8817x_write_cmd (dev, 0x2A, + AX88772B_BULKIN_SIZE[dev->rx_size].byte_cnt, + AX88772B_BULKIN_SIZE[dev->rx_size].threshold, + 0, NULL)) < 0) { + deverr(dev, "Reset RX_CTL failed: %d", ret); + goto err_out; + } + + dev->rx_urb_size = AX88772B_BULKIN_SIZE[dev->rx_size].size; + } else { + if ((ret = ax8817x_write_cmd (dev, 0x2A, + 0x8000, 0x8001, 0, NULL)) < 0) { + deverr(dev, "Reset RX_CTL failed: %d", ret); + goto err_out; + } dev->rx_urb_size = 2048; } - return 0; -out: + /* Configure RX header type */ + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_RX_CTL, + (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_HEADER_DEFAULT), + 0, 0, NULL)) < 0) { + deverr(dev, "Reset RX_CTL failed: %d", ret); + goto err_out; + } + + /* Overwrite power saving configuration from eeprom */ + if ((ret = ax8817x_write_cmd (dev, AX_CMD_SW_RESET, + AX_SWRESET_IPRL | (ax772b_data->psc & 0x7FFF), 0, 0, NULL)) < 0) { + deverr(dev, "Failed to configure PHY power saving: %d", ret); + goto err_out; + } + + if (ax772b_data->OperationMode == OPERATION_PHY_MODE) + netif_carrier_on(dev->net); + + kfree (buf); + printk (version); + + return ret; +err_out: + destroy_workqueue (ax772b_data->ax_work); + kfree (buf); + kfree (ax772b_data); return ret; } -static struct ethtool_ops ax88178_ethtool_ops = { - .get_drvinfo = asix_get_drvinfo, - .get_link = asix_get_link, - .get_msglevel = usbnet_get_msglevel, - .set_msglevel = usbnet_set_msglevel, - .get_wol = asix_get_wol, - .set_wol = asix_set_wol, - .get_eeprom_len = asix_get_eeprom_len, - .get_eeprom = asix_get_eeprom, - .get_settings = usbnet_get_settings, - .set_settings = usbnet_set_settings, - .nway_reset = usbnet_nway_reset, -}; +static void ax88772b_unbind(struct usbnet *dev, struct usb_interface *intf) +{ + struct ax88772b_data *ax772b_data = (struct ax88772b_data *)dev->priv; + + if (ax772b_data) { + + flush_workqueue (ax772b_data->ax_work); + destroy_workqueue (ax772b_data->ax_work); + + /* stop MAC operation */ + ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, + AX_RX_CTL_STOP, 0, 0, NULL); + + /* Power down PHY */ + ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPPD, 0, 0, NULL); + + kfree (ax772b_data); + } +} + +static int +ax88178_media_check (struct usbnet *dev, struct ax88178_data *ax178dataptr) +{ + int fullduplex; + u16 tempshort = 0; + u16 media; + u16 advertise, lpa, result, stat1000; + + advertise = ax8817x_mdio_read_le (dev->net, + dev->mii.phy_id, MII_ADVERTISE); + lpa = ax8817x_mdio_read_le (dev->net, dev->mii.phy_id, MII_LPA); + result = advertise & lpa; + + stat1000 = ax8817x_mdio_read_le (dev->net, + dev->mii.phy_id, MII_STAT1000); + + if ((ax178dataptr->PhyMode == PHY_MODE_MARVELL) && + (ax178dataptr->LedMode == 1)) { + tempshort = ax8817x_mdio_read_le (dev->net, + dev->mii.phy_id, MARVELL_MANUAL_LED) & 0xfc0f; + } + + fullduplex=1; + if (stat1000 & LPA_1000FULL) { + media = MEDIUM_GIGA_MODE | MEDIUM_FULL_DUPLEX_MODE | + MEDIUM_ENABLE_125MHZ | MEDIUM_ENABLE_RECEIVE; + if ((ax178dataptr->PhyMode == PHY_MODE_MARVELL) && + (ax178dataptr->LedMode == 1)) + tempshort|= 0x3e0; + } else if (result & LPA_100FULL) { + media = MEDIUM_FULL_DUPLEX_MODE | MEDIUM_ENABLE_RECEIVE | + MEDIUM_MII_100M_MODE; + if ((ax178dataptr->PhyMode == PHY_MODE_MARVELL) && + (ax178dataptr->LedMode == 1)) + tempshort|= 0x3b0; + } else if (result & LPA_100HALF) { + fullduplex = 0; + media = MEDIUM_ENABLE_RECEIVE | MEDIUM_MII_100M_MODE; + if ((ax178dataptr->PhyMode == PHY_MODE_MARVELL) && + (ax178dataptr->LedMode == 1)) + tempshort |= 0x3b0; + } else if (result & LPA_10FULL) { + media = MEDIUM_FULL_DUPLEX_MODE | MEDIUM_ENABLE_RECEIVE; + if ((ax178dataptr->PhyMode == PHY_MODE_MARVELL) && + (ax178dataptr->LedMode == 1)) + tempshort |= 0x2f0; + } else { + media = MEDIUM_ENABLE_RECEIVE; + fullduplex=0; + if ((ax178dataptr->PhyMode == PHY_MODE_MARVELL) && + (ax178dataptr->LedMode == 1)) + tempshort |= 0x02f0; + } + + if ((ax178dataptr->PhyMode == PHY_MODE_MARVELL) && + (ax178dataptr->LedMode == 1)) { + ax8817x_mdio_write_le (dev->net, + dev->mii.phy_id, MARVELL_MANUAL_LED, tempshort); + } + + media |= 0x0004; + if(ax178dataptr->UseRgmii) + media |= 0x0008; + if(fullduplex) { + media |= 0x0020; //ebable tx flow control as default; + media |= 0x0010; //ebable rx flow control as default; + } -static int marvell_phy_init(struct usbnet *dev) + return media; +} + +static void Vitess_8601_Init (struct usbnet *dev, int State) { - struct asix_data *data = (struct asix_data *)&dev->data; u16 reg; - netdev_dbg(dev->net, "marvell_phy_init()\n"); + switch (State) { + case 0: // tx, rx clock skew + ax8817x_swmii_mdio_write_le (dev->net, dev->mii.phy_id, 31, 1); + ax8817x_swmii_mdio_write_le (dev->net, dev->mii.phy_id, 28, 0); + ax8817x_swmii_mdio_write_le (dev->net, dev->mii.phy_id, 31, 0); + break; + + case 1: + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 31, 0x52B5); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 18, 0x009E); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 17, 0xDD39); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0x87AA); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0xA7B4); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 18, + ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 18)); + + reg = (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 17) & ~0x003f) | 0x003c; + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 17, reg); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0x87B4); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0xa794); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 18, + ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 18)); + + reg = (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 17) & ~0x003f) | 0x003e; + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 17, reg); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0x8794); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 18, 0x00f7); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 17, 0xbe36); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0x879e); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0xa7a0); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 18, + ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 18)); + + reg = (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 17) & ~0x003f) | 0x0034; + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 17, reg); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0x87a0); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 18, 0x003c); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 17, 0xf3cf); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0x87a2); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 18, 0x003c); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 17, 0xf3cf); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0x87a4); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 18, 0x003c); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 17, 0xd287); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0x87a6); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0xa7a8); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 18, + ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 18)); + + reg = (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 17) & ~0x0fff) | 0x0125; + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 17, reg); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0x87a8); + + // Enable Smart Pre-emphasis + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0xa7fa); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 18, + ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 18)); + + reg = (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 17) & ~0x0008) | 0x0008; + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 17, reg); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0x87fa); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 31, 0); + + break; + } +} + +static int +ax88178_phy_init (struct usbnet *dev, struct ax88178_data *ax178dataptr) +{ + int i; + u16 PhyAnar, PhyAuxCtrl, PhyCtrl, TempShort, PhyID1; + u16 PhyReg = 0; + + //Disable MII operation of AX88178 Hardware + ax8817x_write_cmd (dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL); + + + //Read SROM - MiiPhy Address (ID) + ax8817x_read_cmd (dev, AX_CMD_READ_PHY_ID, 0, 0, 2, &dev->mii.phy_id); + le32_to_cpus (&dev->mii.phy_id); + + /* Initialize MII structure */ + dev->mii.phy_id >>= 8; + dev->mii.phy_id &= PHY_ID_MASK; + dev->mii.dev = dev->net; + dev->mii.mdio_read = ax8817x_mdio_read_le; + dev->mii.mdio_write = ax8817x_mdio_write_le; + dev->mii.phy_id_mask = 0x3f; + dev->mii.reg_num_mask = 0x1f; +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,11) + dev->mii.supports_gmii = 1; +#endif + + if (ax178dataptr->PhyMode == PHY_MODE_MAC_TO_MAC_GMII) + { + ax178dataptr->UseRgmii = 0; + ax178dataptr->MediaLink = MEDIUM_GIGA_MODE | + MEDIUM_FULL_DUPLEX_MODE | + MEDIUM_ENABLE_125MHZ | + MEDIUM_ENABLE_RECEIVE | + MEDIUM_ENABLE_RX_FLOWCTRL | + MEDIUM_ENABLE_TX_FLOWCTRL; + + goto SkipPhySetting; + } + + // test read phy register 2 + if (!ax178dataptr->UseGpio0) { + i = 1000; + while (i--) { + PhyID1 = ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, GMII_PHY_OUI); + if ((PhyID1 == 0x000f) || (PhyID1 == 0x0141) || + (PhyID1 == 0x0282) || (PhyID1 == 0x004d) || + (PhyID1 == 0x0243) || (PhyID1 == 0x001C) || + (PhyID1 == 0x0007)) + break; + msleep(5); + } + if (i < 0) + return -EIO; + } + + ax178dataptr->UseRgmii = 0; + if (ax178dataptr->PhyMode == PHY_MODE_MARVELL) { + PhyReg = ax8817x_swmii_mdio_read_le(dev->net, + dev->mii.phy_id, 27); + if (!(PhyReg & 4)) { + ax178dataptr->UseRgmii = 1; + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 20, 0x82); + ax178dataptr->MediaLink |= MEDIUM_ENABLE_125MHZ; + } + } else if ((ax178dataptr->PhyMode == PHY_MODE_AGERE_V0) || + (ax178dataptr->PhyMode == PHY_MODE_AGERE_V0_GMII)) { + if (ax178dataptr->PhyMode == PHY_MODE_AGERE_V0) { + ax178dataptr->UseRgmii = 1; + ax178dataptr->MediaLink |= MEDIUM_ENABLE_125MHZ; + } + } else if (ax178dataptr->PhyMode == PHY_MODE_CICADA_V1) { + // not Cameo + if (!ax178dataptr->UseGpio0 || ax178dataptr->LedMode) { + ax178dataptr->UseRgmii = 1; + ax178dataptr->MediaLink |= MEDIUM_ENABLE_125MHZ; + } + + for (i = 0; i < (sizeof(CICADA_FAMILY_HWINIT) / + sizeof(CICADA_FAMILY_HWINIT[0])); i++) { + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, + CICADA_FAMILY_HWINIT[i].offset, + CICADA_FAMILY_HWINIT[i].value); + } + + } + else if (ax178dataptr->PhyMode == PHY_MODE_CICADA_V2) + { + // not Cameo + if (!ax178dataptr->UseGpio0 || ax178dataptr->LedMode) + { + ax178dataptr->UseRgmii = 1; + ax178dataptr->MediaLink |= MEDIUM_ENABLE_125MHZ; + } + + for (i = 0; i < (sizeof(CICADA_V2_HWINIT) / + sizeof(CICADA_V2_HWINIT[0])); i++) { + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, CICADA_V2_HWINIT[i].offset, + CICADA_V2_HWINIT[i].value); + } + } else if (ax178dataptr->PhyMode == PHY_MODE_CICADA_V2_ASIX) { + // not Cameo + if (!ax178dataptr->UseGpio0 || ax178dataptr->LedMode) + { + ax178dataptr->UseRgmii = 1; + ax178dataptr->MediaLink |= MEDIUM_ENABLE_125MHZ; + } + + for (i = 0; i < (sizeof(CICADA_V2_HWINIT) / + sizeof(CICADA_V2_HWINIT[0])); i++) { + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, CICADA_V2_HWINIT[i].offset, + CICADA_V2_HWINIT[i].value); + } + } else if (ax178dataptr->PhyMode == PHY_MODE_RTL8211CL) { + ax178dataptr->UseRgmii = 1; + ax178dataptr->MediaLink |= MEDIUM_ENABLE_125MHZ; + } else if (ax178dataptr->PhyMode == PHY_MODE_RTL8211BN) { + ax178dataptr->UseRgmii = 1; + ax178dataptr->MediaLink |= MEDIUM_ENABLE_125MHZ; + } else if (ax178dataptr->PhyMode == PHY_MODE_RTL8251CL) { + ax178dataptr->UseRgmii = 1; + ax178dataptr->MediaLink |= MEDIUM_ENABLE_125MHZ; + } else if (ax178dataptr->PhyMode == PHY_MODE_VSC8601) { + ax178dataptr->UseRgmii = 1; + ax178dataptr->MediaLink |= MEDIUM_ENABLE_125MHZ; +// Vitess_8601_Init (dev, 0); + } + + if (ax178dataptr->PhyMode != PHY_MODE_ATTANSIC_V0) { + // software reset + ax8817x_swmii_mdio_write_le ( + dev->net, dev->mii.phy_id, GMII_PHY_CONTROL, + ax8817x_swmii_mdio_read_le ( + dev->net, dev->mii.phy_id, GMII_PHY_CONTROL) + | GMII_CONTROL_RESET); + msleep (1); + } + + if ((ax178dataptr->PhyMode == PHY_MODE_AGERE_V0) || + (ax178dataptr->PhyMode == PHY_MODE_AGERE_V0_GMII)) { + if (ax178dataptr->PhyMode == PHY_MODE_AGERE_V0) + { + i = 1000; + while (i--) + { + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 21, 0x1001); + + PhyReg = ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 21); + if ((PhyReg & 0xf00f) == 0x1001) + break; + } + if (i < 0) + return -EIO; + } + + if (ax178dataptr->LedMode == 4) { + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 28, 0x7417); + } else if (ax178dataptr->LedMode == 9) { + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 28, 0x7a10); + } else if (ax178dataptr->LedMode == 10) { + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 28, 0x7a13); + } + + for (i = 0; i < (sizeof(AGERE_FAMILY_HWINIT) / + sizeof(AGERE_FAMILY_HWINIT[0])); i++) { + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, AGERE_FAMILY_HWINIT[i].offset, + AGERE_FAMILY_HWINIT[i].value); + } + } else if (ax178dataptr->PhyMode == PHY_MODE_RTL8211CL) { + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 0x1f, 0x0005); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 0x0c, 0); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 0x01, + (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 0x01) | 0x0080)); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 0x1f, 0); + + if (ax178dataptr->LedMode == 12) { + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 0x1f, 0x0002); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 0x1a, 0x00cb); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 0x1f, 0); + } + } else if (ax178dataptr->PhyMode == PHY_MODE_VSC8601) { + Vitess_8601_Init (dev, 1); + } + + // read phy register 0 + PhyCtrl = ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, GMII_PHY_CONTROL); + TempShort = PhyCtrl; + PhyCtrl &= ~(GMII_CONTROL_POWER_DOWN | GMII_CONTROL_ISOLATE); + if (PhyCtrl != TempShort) { + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, GMII_PHY_CONTROL, PhyCtrl); + } + + // led + if (ax178dataptr->PhyMode == PHY_MODE_MARVELL) { + if (ax178dataptr->LedMode == 1) { + + PhyReg = (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 24) & 0xf8ff) | (1 + 0x100); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 24, PhyReg); + PhyReg = ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 25) & 0xfc0f; + + } else if (ax178dataptr->LedMode == 2) { + + PhyReg = (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 24) & 0xf886) | + (1 + 0x10 + 0x300); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 24, PhyReg); + + } else if (ax178dataptr->LedMode == 5) { + + PhyReg = (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 24) & 0xf8be) | + (1 + 0x40 + 0x300); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 24, PhyReg); + + } else if (ax178dataptr->LedMode == 7) { + + PhyReg = (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 24) & 0xf8ff) | + (1 + 0x100); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 24, PhyReg); - reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS); - netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg); + } else if (ax178dataptr->LedMode == 8) { - asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL, - MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY); + PhyReg = (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 24) & 0xf8be) | + (1 + 0x40 + 0x100); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 24, PhyReg); - if (data->ledmode) { - reg = asix_mdio_read(dev->net, dev->mii.phy_id, - MII_MARVELL_LED_CTRL); - netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg); + } else if (ax178dataptr->LedMode == 11) { - reg &= 0xf8ff; - reg |= (1 + 0x0100); - asix_mdio_write(dev->net, dev->mii.phy_id, - MII_MARVELL_LED_CTRL, reg); + PhyReg = ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 24) & 0x4106; + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 24, PhyReg); + + } + } else if ((ax178dataptr->PhyMode == PHY_MODE_CICADA_V1) || + (ax178dataptr->PhyMode == PHY_MODE_CICADA_V2) || + (ax178dataptr->PhyMode == PHY_MODE_CICADA_V2_ASIX)) { + + if (ax178dataptr->LedMode == 3) { + + PhyReg = (ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 27) & 0xFCFF) | 0x0100; + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 27, PhyReg); + } - reg = asix_mdio_read(dev->net, dev->mii.phy_id, - MII_MARVELL_LED_CTRL); - netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg); - reg &= 0xfc0f; } + if (ax178dataptr->PhyMode == PHY_MODE_MARVELL) + { + if (ax178dataptr->LedMode == 1) + PhyReg |= 0x3f0; + } + + PhyAnar = 1 | (GMII_ANAR_PAUSE | GMII_ANAR_100TXFD | GMII_ANAR_100TX | + GMII_ANAR_10TFD | GMII_ANAR_10T | GMII_ANAR_ASYM_PAUSE); + + PhyAuxCtrl = GMII_1000_AUX_CTRL_FD_CAPABLE; + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, GMII_PHY_ANAR, PhyAnar); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, GMII_PHY_1000BT_CONTROL, PhyAuxCtrl); + + if (ax178dataptr->PhyMode == PHY_MODE_VSC8601) + { + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 31, 0x52B5); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0xA7F8); + + TempShort = ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 17) & (~0x0018); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 17, TempShort); + + TempShort = ax8817x_swmii_mdio_read_le (dev->net, + dev->mii.phy_id, 18); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 18, TempShort); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 16, 0x87F8); + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 31, 0); + } + + if (ax178dataptr->PhyMode == PHY_MODE_ATTANSIC_V0) { + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, GMII_PHY_CONTROL, 0x9000); + + } else { + PhyCtrl &= ~GMII_CONTROL_LOOPBACK; + PhyCtrl |= (GMII_CONTROL_ENABLE_AUTO | GMII_CONTROL_START_AUTO); + + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, GMII_PHY_CONTROL, PhyCtrl); + } + + if (ax178dataptr->PhyMode == PHY_MODE_MARVELL) { + if (ax178dataptr->LedMode == 1) + ax8817x_swmii_mdio_write_le (dev->net, + dev->mii.phy_id, 25, PhyReg); + } + +SkipPhySetting: + + ax8817x_write_cmd (dev, AX_CMD_WRITE_MEDIUM_MODE, + ax178dataptr->MediaLink, 0, 0, NULL); + + ax8817x_write_cmd (dev, AX_CMD_WRITE_IPG0, + AX88772_IPG0_DEFAULT | (AX88772_IPG1_DEFAULT << 8), + AX88772_IPG2_DEFAULT, 0, NULL); + + msleep (1); + + ax8817x_write_cmd (dev, AX_CMD_SET_HW_MII, 0, 0, 0, NULL); + return 0; } -static int marvell_led_status(struct usbnet *dev, u16 speed) +static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf) { - u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL); + int ret; + void *buf; + struct ax8817x_data *data = (struct ax8817x_data *)&dev->data; + struct ax88178_data *ax178dataptr = NULL; - netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg); + axusbnet_get_endpoints(dev,intf); - /* Clear out the center LED bits - 0x03F0 */ - reg &= 0xfc0f; + buf = kmalloc(6, GFP_KERNEL); + if(!buf) { + deverr(dev, "Cannot allocate memory for buffer"); + return -ENOMEM; + } - switch (speed) { - case SPEED_1000: - reg |= 0x03e0; - break; - case SPEED_100: - reg |= 0x03b0; - break; - default: - reg |= 0x02f0; + /* allocate 178 data */ + ax178dataptr = kmalloc (sizeof (*ax178dataptr), GFP_KERNEL); + if (!ax178dataptr) { + deverr(dev, "Cannot allocate memory for AX88178 data"); + ret = -ENOMEM; + goto error_out; + } + memset (ax178dataptr, 0, sizeof (struct ax88178_data)); + dev->priv = ax178dataptr; + /* end of allocate 178 data */ + + /* Get the EEPROM data*/ + if ((ret = ax8817x_read_cmd (dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, + (void *)(&ax178dataptr->EepromData))) < 0) { + deverr(dev, "read SROM address 17h failed: %d", ret); + goto error_out; } + le16_to_cpus (&ax178dataptr->EepromData); + /* End of get EEPROM data */ - netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg); - asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg); + if (ax178dataptr->EepromData == 0xffff) { + ax178dataptr->PhyMode = PHY_MODE_MARVELL; + ax178dataptr->LedMode = 0; + ax178dataptr->UseGpio0 = 1; //True + } else { + ax178dataptr->PhyMode = (u8)(ax178dataptr->EepromData & + EEPROMMASK); + ax178dataptr->LedMode = (u8)(ax178dataptr->EepromData >> 8); + if (ax178dataptr->LedMode == 6) // for buffalo new (use gpio2) + ax178dataptr->LedMode = 1; + else if (ax178dataptr->LedMode == 1) + ax178dataptr->BuffaloOld = 1; - return 0; + + if(ax178dataptr->EepromData & 0x80) { + ax178dataptr->UseGpio0=0; //MARVEL se and other + } else { + ax178dataptr->UseGpio0=1; //cameo + } + } + + if (ax178dataptr->UseGpio0) { + + if (ax178dataptr->PhyMode == PHY_MODE_MARVELL) { + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + AXGPIOS_GPO0EN | AXGPIOS_RSE, + 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + + msleep (25); + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + (AXGPIOS_GPO2 | AXGPIOS_GPO2EN | + AXGPIOS_GPO0EN), 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + + msleep (15); + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + AXGPIOS_GPO2EN | AXGPIOS_GPO0EN, + 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + + msleep (245); + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + (AXGPIOS_GPO2 | AXGPIOS_GPO2EN | + AXGPIOS_GPO0EN), 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + + } else { // vitesse + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + (AXGPIOS_RSE | AXGPIOS_GPO0EN | + AXGPIOS_GPO0), 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + + msleep (25); + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + (AXGPIOS_GPO0EN | AXGPIOS_GPO0 | + AXGPIOS_GPO2EN | AXGPIOS_GPO2), + 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + + msleep (25); + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + (AXGPIOS_GPO0EN | AXGPIOS_GPO0 | + AXGPIOS_GPO2EN), 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + + msleep (245); + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + (AXGPIOS_GPO0EN | AXGPIOS_GPO0 | + AXGPIOS_GPO2EN | AXGPIOS_GPO2), + 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + } + } else { // use gpio1 + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + (AXGPIOS_GPO1 |AXGPIOS_GPO1EN | AXGPIOS_RSE), + 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + + if (ax178dataptr->BuffaloOld) { + + msleep (350); + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + AXGPIOS_GPO1EN, 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + + msleep (350); + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + AXGPIOS_GPO1EN | AXGPIOS_GPO1, + 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + } + else + { + msleep (25); + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + (AXGPIOS_GPO1EN | AXGPIOS_GPO1 | + AXGPIOS_GPO2EN | AXGPIOS_GPO2), + 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + + msleep (25); + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + (AXGPIOS_GPO1EN | AXGPIOS_GPO1 | + AXGPIOS_GPO2EN), 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + + msleep (245); + + if ((ret = ax8817x_write_cmd (dev, AX_CMD_WRITE_GPIOS, + (AXGPIOS_GPO1EN | AXGPIOS_GPO1 | + AXGPIOS_GPO2EN | AXGPIOS_GPO2), + 0, 0, NULL)) < 0) { + deverr(dev, "write GPIO failed: %d", ret); + goto error_out; + } + } + } + + if ((ret = ax8817x_write_cmd(dev, + AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL)) < 0) { + deverr(dev, "Select PHY failed: %d", ret); + goto error_out; + } + + if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPPD | AX_SWRESET_PRL, 0, 0, NULL)) < 0) { + deverr(dev, "Issue sw reset failed: %d", ret); + goto error_out; + } + + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, + 0, 0, 0, NULL)) < 0) { + deverr(dev, "Issue rx ctrl failed: %d", ret); + goto error_out; + } + + /* Get the MAC address */ + memset(buf, 0, ETH_ALEN); + if ((ret = ax8817x_read_cmd (dev, AX88772_CMD_READ_NODE_ID, + 0, 0, ETH_ALEN, buf)) < 0) { + deverr(dev, "read AX_CMD_READ_NODE_ID failed: %d", ret); + goto error_out; + } + memcpy(dev->net->dev_addr, buf, ETH_ALEN); + /* End of get MAC address */ + + if ((ret = ax88178_phy_init (dev, ax178dataptr)) < 0) + goto error_out; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) + dev->net->do_ioctl = ax8817x_ioctl; + dev->net->set_multicast_list = ax8817x_set_multicast; + dev->net->set_mac_address = ax8817x_set_mac_addr; +#else + dev->net->netdev_ops = &ax88x72_netdev_ops; +#endif + dev->net->ethtool_ops = &ax8817x_ethtool_ops; + + /* Register suspend and resume functions */ + data->suspend = ax88772_suspend; + data->resume = ax88772_resume; + + if (dev->driver_info->flags & FLAG_FRAMING_AX) { + dev->rx_urb_size = 16384; + } + + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, + (AX_RX_CTL_MFB | AX_RX_CTL_START | AX_RX_CTL_AB), + 0, 0, NULL)) < 0) { + deverr(dev, "write RX ctrl reg failed: %d", ret); + goto error_out; + } + + kfree (buf); + printk (version); + return ret; + +error_out: + if (ax178dataptr) + kfree (ax178dataptr); + kfree (buf); + return ret; } -static int ax88178_link_reset(struct usbnet *dev) +static void ax88178_unbind(struct usbnet *dev, struct usb_interface *intf) { - u16 mode; - struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; - struct asix_data *data = (struct asix_data *)&dev->data; - u32 speed; + struct ax88178_data *ax178dataptr = (struct ax88178_data *)dev->priv; - netdev_dbg(dev->net, "ax88178_link_reset()\n"); + if (ax178dataptr) { - mii_check_media(&dev->mii, 1, 1); - mii_ethtool_gset(&dev->mii, &ecmd); - mode = AX88178_MEDIUM_DEFAULT; - speed = ethtool_cmd_speed(&ecmd); + /* stop MAC operation */ + ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, + AX_RX_CTL_STOP, 0, 0, NULL); - if (speed == SPEED_1000) - mode |= AX_MEDIUM_GM; - else if (speed == SPEED_100) - mode |= AX_MEDIUM_PS; - else - mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM); + kfree (ax178dataptr); + } +} - mode |= AX_MEDIUM_ENCK; +static int ax88772_rx_fixup(struct usbnet *dev, struct sk_buff *skb) +{ + u8 *head; + u32 header; + char *packet; + struct sk_buff *ax_skb; + u16 size; - if (ecmd.duplex == DUPLEX_FULL) - mode |= AX_MEDIUM_FD; - else - mode &= ~AX_MEDIUM_FD; + head = (u8 *) skb->data; + memcpy(&header, head, sizeof(header)); + le32_to_cpus(&header); + packet = head + sizeof(header); + + skb_pull(skb, 4); + + while (skb->len > 0) { + if ((short)(header & 0x0000ffff) != + ~((short)((header & 0xffff0000) >> 16))) { + deverr(dev, "header length data is error 0x%08x, %d\n", + header, skb->len); + } + /* get the packet length */ + size = (u16) (header & 0x0000ffff); - netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n", - speed, ecmd.duplex, mode); + if ((skb->len) - ((size + 1) & 0xfffe) == 0) { + + /* Make sure ip header is aligned on 32-bit boundary */ + if (!((unsigned long)skb->data & 0x02)) { + memmove (skb->data - 2, skb->data, size); + skb->data -= 2; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + skb->tail = skb->data + size; +#else + skb_set_tail_pointer (skb, size); +#endif + } + skb->truesize = size + sizeof(struct sk_buff); + return 2; + } + + if (size > ETH_FRAME_LEN) { + deverr(dev, "invalid rx length %d", size); + return 0; + } + ax_skb = skb_clone(skb, GFP_ATOMIC); + if (ax_skb) { - asix_write_medium_mode(dev, mode); + /* Make sure ip header is aligned on 32-bit boundary */ + if (!((unsigned long)packet & 0x02)) { + memmove (packet - 2, packet, size); + packet -= 2; + } + ax_skb->data = packet; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + ax_skb->tail = packet + size; +#else + skb_set_tail_pointer (ax_skb, size); +#endif + ax_skb->truesize = size + sizeof(struct sk_buff); + axusbnet_skb_return(dev, ax_skb); - if (data->phymode == PHY_MODE_MARVELL && data->ledmode) - marvell_led_status(dev, speed); + } else { + return 0; + } - return 0; + skb_pull(skb, (size + 1) & 0xfffe); + + if (skb->len == 0) + break; + + head = (u8 *) skb->data; + memcpy(&header, head, sizeof(header)); + le32_to_cpus(&header); + packet = head + sizeof(header); + skb_pull(skb, 4); + } + + if (skb->len < 0) { + deverr(dev, "invalid rx length %d", skb->len); + return 0; + } + return 1; } -static void ax88178_set_mfb(struct usbnet *dev) +static struct sk_buff *ax88772_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags) { - u16 mfb = AX_RX_CTL_MFB_16384; - u16 rxctl; - u16 medium; - int old_rx_urb_size = dev->rx_urb_size; + int padlen = ((skb->len + 4) % 512) ? 0 : 4; + u32 packet_len; + u32 padbytes = 0xffff0000; - if (dev->hard_mtu < 2048) { - dev->rx_urb_size = 2048; - mfb = AX_RX_CTL_MFB_2048; - } else if (dev->hard_mtu < 4096) { - dev->rx_urb_size = 4096; - mfb = AX_RX_CTL_MFB_4096; - } else if (dev->hard_mtu < 8192) { - dev->rx_urb_size = 8192; - mfb = AX_RX_CTL_MFB_8192; - } else if (dev->hard_mtu < 16384) { - dev->rx_urb_size = 16384; - mfb = AX_RX_CTL_MFB_16384; +#if (!AX_FORCE_BUFF_ALIGN) + int headroom = skb_headroom(skb); + int tailroom = skb_tailroom(skb); + + if ((!skb_cloned(skb)) + && ((headroom + tailroom) >= (4 + padlen))) { + if ((headroom < 4) || (tailroom < padlen)) { + skb->data = memmove(skb->head + 4, skb->data, skb->len); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + skb->tail = skb->data + skb->len; +#else + skb_set_tail_pointer (skb, skb->len); +#endif + } + } else +#endif + { + struct sk_buff *skb2; + skb2 = skb_copy_expand(skb, 4, padlen, flags); + dev_kfree_skb_any(skb); + skb = skb2; + if (!skb) + return NULL; } - rxctl = asix_read_rx_ctl(dev); - asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb); + skb_push(skb, 4); + packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4); + cpu_to_le32s(&packet_len); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + memcpy(skb->data, &packet_len, sizeof(packet_len)); +#else + skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len)); +#endif - medium = asix_read_medium_status(dev); - if (dev->net->mtu > 1500) - medium |= AX_MEDIUM_JFE; - else - medium &= ~AX_MEDIUM_JFE; - asix_write_medium_mode(dev, medium); + if ((skb->len % 512) == 0) { + cpu_to_le32s(&padbytes); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + memcpy(skb->tail, &padbytes, sizeof(padbytes)); +#else + memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes)); +#endif + skb_put(skb, sizeof(padbytes)); + } + return skb; +} - if (dev->rx_urb_size > old_rx_urb_size) - usbnet_unlink_rx_urbs(dev); +static void +ax88772b_rx_checksum (struct sk_buff *skb, struct ax88772b_rx_header *rx_hdr) +{ + skb->ip_summed = CHECKSUM_NONE; + + /* checksum error bit is set */ + if (rx_hdr->l3_csum_err || rx_hdr->l4_csum_err) { + return; + } + + /* It must be a TCP or UDP packet with a valid checksum */ + if ((rx_hdr->l4_type == AX_RXHDR_L4_TYPE_TCP) || + (rx_hdr->l4_type == AX_RXHDR_L4_TYPE_UDP)) { + skb->ip_summed = CHECKSUM_UNNECESSARY; + } } -static int ax88178_change_mtu(struct net_device *net, int new_mtu) +static int ax88772b_rx_fixup(struct usbnet *dev, struct sk_buff *skb) { - struct usbnet *dev = netdev_priv(net); - int ll_mtu = new_mtu + net->hard_header_len + 4; + struct ax88772b_rx_header rx_hdr; + struct sk_buff *ax_skb; + struct ax88772b_data *ax772b_data = (struct ax88772b_data *)dev->priv; - netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu); + while (skb->len > 0) { - if (new_mtu <= 0 || ll_mtu > 16384) - return -EINVAL; + le16_to_cpus((u16 *)skb->data); + le16_to_cpus(((u16 *)skb->data) + 1); - if ((ll_mtu % dev->maxpacket) == 0) - return -EDOM; + memcpy (&rx_hdr, skb->data, sizeof (struct ax88772b_rx_header)); - net->mtu = new_mtu; - dev->hard_mtu = net->mtu + net->hard_header_len; - ax88178_set_mfb(dev); + if ((short)rx_hdr.len != (~((short)rx_hdr.len_bar) & 0x7FF)) { + return 0; + } - return 0; -} + if (rx_hdr.len > (ETH_FRAME_LEN + 4)) { + deverr(dev, "invalid rx length %d", rx_hdr.len); + return 0; + } -static const struct net_device_ops ax88178_netdev_ops = { - .ndo_open = usbnet_open, - .ndo_stop = usbnet_stop, - .ndo_start_xmit = usbnet_start_xmit, - .ndo_tx_timeout = usbnet_tx_timeout, - .ndo_set_mac_address = asix_set_mac_address, - .ndo_validate_addr = eth_validate_addr, - .ndo_set_multicast_list = asix_set_multicast, - .ndo_do_ioctl = asix_ioctl, - .ndo_change_mtu = ax88178_change_mtu, -}; + if (skb->len - ((rx_hdr.len + + sizeof (struct ax88772b_rx_header) + 3) & + 0xfffc) == 0) { + skb_pull(skb, sizeof (struct ax88772b_rx_header)); + skb->len = rx_hdr.len; -static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf) -{ - struct asix_data *data = (struct asix_data *)&dev->data; - int ret; - u8 buf[ETH_ALEN]; - __le16 eeprom; - u8 status; - int gpio0 = 0; - u32 phyid; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + skb->tail = skb->data + rx_hdr.len; +#else + skb_set_tail_pointer(skb, rx_hdr.len); +#endif + skb->truesize = rx_hdr.len + sizeof(struct sk_buff); + + if (ax772b_data->checksum & AX_RX_CHECKSUM) + ax88772b_rx_checksum (skb, &rx_hdr); - usbnet_get_endpoints(dev,intf); + return 2; + } - asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status); - dbg("GPIO Status: 0x%04x", status); + ax_skb = skb_clone(skb, GFP_ATOMIC); + if (ax_skb) { + ax_skb->len = rx_hdr.len; + ax_skb->data = skb->data + + sizeof (struct ax88772b_rx_header); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + ax_skb->tail = ax_skb->data + rx_hdr.len; +#else + skb_set_tail_pointer(ax_skb, rx_hdr.len); +#endif + ax_skb->truesize = rx_hdr.len + sizeof(struct sk_buff); + + if (ax772b_data->checksum & AX_RX_CHECKSUM) { + ax88772b_rx_checksum (ax_skb, &rx_hdr); + } - asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL); - asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom); - asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL); + axusbnet_skb_return(dev, ax_skb); - dbg("EEPROM index 0x17 is 0x%04x", eeprom); + } else { + return 0; + } - if (eeprom == cpu_to_le16(0xffff)) { - data->phymode = PHY_MODE_MARVELL; - data->ledmode = 0; - gpio0 = 1; - } else { - data->phymode = le16_to_cpu(eeprom) & 7; - data->ledmode = le16_to_cpu(eeprom) >> 8; - gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1; + skb_pull(skb, ((rx_hdr.len + + sizeof (struct ax88772b_rx_header) + 3) + & 0xfffc)); } - dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode); - asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40); - if ((le16_to_cpu(eeprom) >> 8) != 1) { - asix_write_gpio(dev, 0x003c, 30); - asix_write_gpio(dev, 0x001c, 300); - asix_write_gpio(dev, 0x003c, 30); - } else { - dbg("gpio phymode == 1 path"); - asix_write_gpio(dev, AX_GPIO_GPO1EN, 30); - asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30); + if (skb->len < 0) { + deverr(dev, "invalid rx length %d", skb->len); + return 0; } + return 1; +} - asix_sw_reset(dev, 0); - msleep(150); +static struct sk_buff * +ax88772b_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags) +{ + int padlen = ((skb->len + 4) % 512) ? 0 : 4; + u32 packet_len; + u32 padbytes = 0xffff0000; - asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD); - msleep(150); +#if (!AX_FORCE_BUFF_ALIGN) + int headroom = skb_headroom(skb); + int tailroom = skb_tailroom(skb); - asix_write_rx_ctl(dev, 0); + if ((!skb_cloned(skb)) + && ((headroom + tailroom) >= (4 + padlen))) { + if ((headroom < 4) || (tailroom < padlen)) { + skb->data = memmove(skb->head + 4, skb->data, skb->len); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + skb->tail = skb->data + skb->len; +#else + skb_set_tail_pointer(skb, skb->len); +#endif + } + } else +#endif + { + struct sk_buff *skb2; + skb2 = skb_copy_expand(skb, 4, padlen, flags); + dev_kfree_skb_any(skb); + skb = skb2; + if (!skb) + return NULL; + } - /* Get the MAC address */ - if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, - 0, 0, ETH_ALEN, buf)) < 0) { - dbg("Failed to read MAC address: %d", ret); - goto out; + skb_push(skb, 4); + packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4); + + cpu_to_le32s (&packet_len); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + memcpy(skb->data, &packet_len, sizeof(packet_len)); +#else + skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len)); +#endif + + if ((skb->len % 512) == 0) { + cpu_to_le32s (&padbytes); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + memcpy(skb->tail, &padbytes, sizeof(padbytes)); +#else + memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes)); +#endif + skb_put(skb, sizeof(padbytes)); } - memcpy(dev->net->dev_addr, buf, ETH_ALEN); - /* Initialize MII structure */ - dev->mii.dev = dev->net; - dev->mii.mdio_read = asix_mdio_read; - dev->mii.mdio_write = asix_mdio_write; - dev->mii.phy_id_mask = 0x1f; - dev->mii.reg_num_mask = 0xff; - dev->mii.supports_gmii = 1; - dev->mii.phy_id = asix_get_phy_addr(dev); + return skb; +} - dev->net->netdev_ops = &ax88178_netdev_ops; - dev->net->ethtool_ops = &ax88178_ethtool_ops; +static const u8 ChkCntSel [6][3] = +{ + {12, 23, 31}, + {12, 31, 23}, + {23, 31, 12}, + {23, 12, 31}, + {31, 12, 23}, + {31, 23, 12} +}; - phyid = asix_get_phyid(dev); - dbg("PHYID=0x%08x", phyid); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void ax88772_link_reset (void *data) +{ + struct usbnet *dev = (struct usbnet *)data; + struct ax88772_data *ax772_data = (struct ax88772_data *)dev->priv; +#else +static void ax88772_link_reset (struct work_struct *work) +{ + struct ax88772_data *ax772_data = container_of (work, + struct ax88772_data, check_link); + struct usbnet *dev = ax772_data->dev; +#endif + + if (ax772_data->Event == AX_SET_RX_CFG) { + u16 bmcr; + u16 mode; + + ax772_data->Event = AX_NOP; + + mode = AX88772_MEDIUM_DEFAULT; + + bmcr = ax8817x_mdio_read_le(dev->net, + dev->mii.phy_id, MII_BMCR); + if (!(bmcr & BMCR_FULLDPLX)) + mode &= ~AX88772_MEDIUM_FULL_DUPLEX; + if (!(bmcr & BMCR_SPEED100)) + mode &= ~AX88772_MEDIUM_100MB; + + ax8817x_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, + mode, 0, 0, NULL); + return; + } + + switch (ax772_data->Event) { + case WAIT_AUTONEG_COMPLETE: + if (jiffies > (ax772_data->autoneg_start + 5 * HZ)) { + ax772_data->Event = PHY_POWER_DOWN; + ax772_data->TickToExpire = 23; + } + break; + case PHY_POWER_DOWN: + if (ax772_data->TickToExpire == 23) { + /* Set Phy Power Down */ + ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPPD, + 0, 0, NULL); + --ax772_data->TickToExpire; + } else if (--ax772_data->TickToExpire == 0) { + /* Set Phy Power Up */ + ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPRL, 0, 0, NULL); + ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPPD | AX_SWRESET_IPRL, 0, 0, NULL); + msleep(10); + ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPRL, 0, 0, NULL); + msleep(60); + ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_CLEAR, 0, 0, NULL); + ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPRL, 0, 0, NULL); + + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, + MII_ADVERTISE, + ADVERTISE_ALL | ADVERTISE_CSMA | + ADVERTISE_PAUSE_CAP); + mii_nway_restart(&dev->mii); + + ax772_data->Event = PHY_POWER_UP; + ax772_data->TickToExpire = 47; + } + break; + case PHY_POWER_UP: + if (--ax772_data->TickToExpire == 0) { + ax772_data->Event = PHY_POWER_DOWN; + ax772_data->TickToExpire = 23; + } + break; + default: + break; + } + return; +} - if (data->phymode == PHY_MODE_MARVELL) { - marvell_phy_init(dev); - msleep(60); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void ax88772a_link_reset (void *data) +{ + struct usbnet *dev = (struct usbnet *)data; + struct ax88772a_data *ax772a_data = (struct ax88772a_data *)dev->priv; +#else +static void ax88772a_link_reset (struct work_struct *work) +{ + struct ax88772a_data *ax772a_data = container_of (work, + struct ax88772a_data, check_link); + struct usbnet *dev = ax772a_data->dev; +#endif + int PowSave = (ax772a_data->EepromData >> 14); + u16 phy_reg; + + if (ax772a_data->Event == AX_SET_RX_CFG) { + u16 bmcr; + u16 mode; + + ax772a_data->Event = AX_NOP; + + mode = AX88772_MEDIUM_DEFAULT; + + bmcr = ax8817x_mdio_read_le(dev->net, + dev->mii.phy_id, MII_BMCR); + if (!(bmcr & BMCR_FULLDPLX)) + mode &= ~AX88772_MEDIUM_FULL_DUPLEX; + if (!(bmcr & BMCR_SPEED100)) + mode &= ~AX88772_MEDIUM_100MB; + + ax8817x_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, + mode, 0, 0, NULL); + return; } - asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, - BMCR_RESET | BMCR_ANENABLE); - asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, + switch (ax772a_data->Event) { + case WAIT_AUTONEG_COMPLETE: + if (jiffies > (ax772a_data->autoneg_start + 5 * HZ)) { + ax772a_data->Event = CHK_CABLE_EXIST; + ax772a_data->TickToExpire = 14; + } + break; + case CHK_CABLE_EXIST: + phy_reg = ax8817x_mdio_read_le(dev->net, dev->mii.phy_id, 0x12); + if ((phy_reg != 0x8012) && (phy_reg != 0x8013)) { + ax8817x_mdio_write_le(dev->net, + dev->mii.phy_id, 0x16, 0x4040); + mii_nway_restart(&dev->mii); + ax772a_data->Event = CHK_CABLE_STATUS; + ax772a_data->TickToExpire = 31; + } else if (--ax772a_data->TickToExpire == 0) { + mii_nway_restart(&dev->mii); + ax772a_data->Event = CHK_CABLE_EXIST_AGAIN; + if (PowSave == 0x03){ + ax772a_data->TickToExpire = 47; + } else if (PowSave == 0x01) { + ax772a_data->DlyIndex = (u8)(jiffies % 6); + ax772a_data->DlySel = 0; + ax772a_data->TickToExpire = + ChkCntSel[ax772a_data->DlyIndex][ax772a_data->DlySel]; + } + } + break; + case CHK_CABLE_EXIST_AGAIN: + /* if cable disconnected */ + phy_reg = ax8817x_mdio_read_le(dev->net, dev->mii.phy_id, 0x12); + if ((phy_reg != 0x8012) && (phy_reg != 0x8013)) { + mii_nway_restart(&dev->mii); + ax772a_data->Event = CHK_CABLE_STATUS; + ax772a_data->TickToExpire = 31; + } else if (--ax772a_data->TickToExpire == 0) { + /* Power down PHY */ + ax8817x_write_cmd(dev, AX_CMD_SW_RESET, + AX_SWRESET_IPPD, + 0, 0, NULL); + ax772a_data->Event = PHY_POWER_DOWN; + if (PowSave == 0x03){ + ax772a_data->TickToExpire = 23; + } else if (PowSave == 0x01) { + ax772a_data->TickToExpire = 31; + } + } + break; + case PHY_POWER_DOWN: + if (--ax772a_data->TickToExpire == 0) { + ax772a_data->Event = PHY_POWER_UP; + } + break; + case CHK_CABLE_STATUS: + if (--ax772a_data->TickToExpire == 0) { + ax8817x_mdio_write_le(dev->net, + dev->mii.phy_id, 0x16, 0x4040); + mii_nway_restart(&dev->mii); + ax772a_data->Event = CHK_CABLE_EXIST_AGAIN; + if (PowSave == 0x03){ + ax772a_data->TickToExpire = 47; + } else if (PowSave == 0x01) { + ax772a_data->DlyIndex = (u8)(jiffies % 6); + ax772a_data->DlySel = 0; + ax772a_data->TickToExpire = + ChkCntSel[ax772a_data->DlyIndex][ax772a_data->DlySel]; + } + } + break; + case PHY_POWER_UP: + + ax88772a_phy_powerup (dev); + + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE, ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); - asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, - ADVERTISE_1000FULL); - mii_nway_restart(&dev->mii); + mii_nway_restart(&dev->mii); + + ax772a_data->Event = CHK_CABLE_EXIST_AGAIN; + + if (PowSave == 0x03){ + ax772a_data->TickToExpire = 47; + + } else if (PowSave == 0x01) { + + if (++ax772a_data->DlySel >= 3) { + ax772a_data->DlyIndex = (u8)(jiffies % 6); + ax772a_data->DlySel = 0; + } + ax772a_data->TickToExpire = + ChkCntSel[ax772a_data->DlyIndex][ax772a_data->DlySel]; + } + break; + default: + break; + } - if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0) - goto out; + return; +} - if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0) - goto out; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void ax88772b_link_reset (void *data) +{ + struct usbnet *dev = (struct usbnet *)data; + struct ax88772b_data *ax772b_data = (struct ax88772b_data *)dev->priv; +#else +static void ax88772b_link_reset (struct work_struct *work) +{ + struct ax88772b_data *ax772b_data = container_of (work, + struct ax88772b_data, check_link); + struct usbnet *dev = ax772b_data->dev; +#endif + + switch (ax772b_data->Event) { + + case AX_SET_RX_CFG: + { + u16 bmcr = ax8817x_mdio_read_le(dev->net, + dev->mii.phy_id, MII_BMCR); + u16 mode = AX88772_MEDIUM_DEFAULT; + + if (!(bmcr & BMCR_FULLDPLX)) + mode &= ~AX88772_MEDIUM_FULL_DUPLEX; + if (!(bmcr & BMCR_SPEED100)) + mode &= ~AX88772_MEDIUM_100MB; + + ax8817x_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, + mode, 0, 0, NULL); + break; + } + case PHY_POWER_UP: + { + u16 tmp16; - /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */ - if (dev->driver_info->flags & FLAG_FRAMING_AX) { - /* hard_mtu is still the default - the device does not support - jumbo eth frames */ - dev->rx_urb_size = 2048; + ax88772a_phy_powerup (dev); + tmp16 = ax8817x_mdio_read_le(dev->net, dev->mii.phy_id, 0x12); + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, 0x12, + ((tmp16 & 0xFF9F) | 0x0040)); + + ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE, + ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP); + break; } + default: + break; + } + + ax772b_data->Event = AX_NOP; + + return; +} + +static int ax88178_set_media(struct usbnet *dev) +{ + int ret; + struct ax88178_data *ax178dataptr = (struct ax88178_data *)dev->priv; + int media; + + media = ax88178_media_check (dev, ax178dataptr); + if (media < 0) + return media; + + if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, + media, 0, 0, NULL)) < 0) { + deverr(dev, "write mode medium reg failed: %d", ret); + return ret; + } + return 0; +} -out: - return ret; +static int ax88178_link_reset(struct usbnet *dev) +{ + return ax88178_set_media (dev); +} + +static int ax_suspend (struct usb_interface *intf, +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10) + pm_message_t message) +#else + u32 message) +#endif +{ + struct usbnet *dev = usb_get_intfdata(intf); + struct ax8817x_data *data = (struct ax8817x_data *)&dev->data; + + return data->suspend (intf, message); } +static int ax_resume (struct usb_interface *intf) +{ + struct usbnet *dev = usb_get_intfdata(intf); + struct ax8817x_data *data = (struct ax8817x_data *)&dev->data; + + return data->resume (intf); +} + +static const struct driver_info ax88178_info = { + .description = "ASIX AX88178 USB 2.0 Ethernet", + .bind = ax88178_bind, + .unbind = ax88178_unbind, + .status = ax88178_status, + .link_reset = ax88178_link_reset, + .reset = ax88178_link_reset, + .flags = FLAG_ETHER | FLAG_FRAMING_AX, + .rx_fixup = ax88772_rx_fixup, + .tx_fixup = ax88772_tx_fixup, +}; + +static const struct driver_info belkin178_info = { + .description = "Belkin Gigabit USB 2.0 Network Adapter", + .bind = ax88178_bind, + .unbind = ax88178_unbind, + .status = ax8817x_status, + .link_reset = ax88178_link_reset, + .reset = ax88178_link_reset, + .flags = FLAG_ETHER | FLAG_FRAMING_AX, + .rx_fixup = ax88772_rx_fixup, + .tx_fixup = ax88772_tx_fixup, +}; + static const struct driver_info ax8817x_info = { .description = "ASIX AX8817x USB 2.0 Ethernet", - .bind = ax88172_bind, - .status = asix_status, + .bind = ax8817x_bind, + .status = ax8817x_status, .link_reset = ax88172_link_reset, .reset = ax88172_link_reset, - .flags = FLAG_ETHER | FLAG_LINK_INTR, - .data = 0x00130103, + .flags = FLAG_ETHER, }; static const struct driver_info dlink_dub_e100_info = { .description = "DLink DUB-E100 USB Ethernet", - .bind = ax88172_bind, - .status = asix_status, + .bind = ax8817x_bind, + .status = ax8817x_status, .link_reset = ax88172_link_reset, .reset = ax88172_link_reset, - .flags = FLAG_ETHER | FLAG_LINK_INTR, - .data = 0x009f9d9f, + .flags = FLAG_ETHER, }; static const struct driver_info netgear_fa120_info = { .description = "Netgear FA-120 USB Ethernet", - .bind = ax88172_bind, - .status = asix_status, + .bind = ax8817x_bind, + .status = ax8817x_status, .link_reset = ax88172_link_reset, .reset = ax88172_link_reset, - .flags = FLAG_ETHER | FLAG_LINK_INTR, - .data = 0x00130103, + .flags = FLAG_ETHER, }; static const struct driver_info hawking_uf200_info = { .description = "Hawking UF200 USB Ethernet", - .bind = ax88172_bind, - .status = asix_status, + .bind = ax8817x_bind, + .status = ax8817x_status, .link_reset = ax88172_link_reset, .reset = ax88172_link_reset, - .flags = FLAG_ETHER | FLAG_LINK_INTR, - .data = 0x001f1d1f, + .flags = FLAG_ETHER, }; static const struct driver_info ax88772_info = { .description = "ASIX AX88772 USB 2.0 Ethernet", .bind = ax88772_bind, - .status = asix_status, - .link_reset = ax88772_link_reset, - .reset = ax88772_link_reset, - .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR, - .rx_fixup = asix_rx_fixup, - .tx_fixup = asix_tx_fixup, + .unbind = ax88772_unbind, + .status = ax88772_status, + .flags = FLAG_ETHER | FLAG_FRAMING_AX, + .rx_fixup = ax88772_rx_fixup, + .tx_fixup = ax88772_tx_fixup, }; -static const struct driver_info ax88178_info = { - .description = "ASIX AX88178 USB 2.0 Ethernet", - .bind = ax88178_bind, - .status = asix_status, - .link_reset = ax88178_link_reset, - .reset = ax88178_link_reset, - .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR, - .rx_fixup = asix_rx_fixup, - .tx_fixup = asix_tx_fixup, +static const struct driver_info dlink_dub_e100b_info = { + .description = "D-Link DUB-E100 USB 2.0 Fast Ethernet Adapter", + .bind = ax88772_bind, + .unbind = ax88772_unbind, + .status = ax88772_status, + .flags = FLAG_ETHER | FLAG_FRAMING_AX, + .rx_fixup = ax88772_rx_fixup, + .tx_fixup = ax88772_tx_fixup, +}; + +static const struct driver_info ax88772a_info = { + .description = "ASIX AX88772A USB 2.0 Ethernet", + .bind = ax88772a_bind, + .unbind = ax88772a_unbind, + .status = ax88772a_status, + .flags = FLAG_ETHER | FLAG_FRAMING_AX, + .rx_fixup = ax88772_rx_fixup, + .tx_fixup = ax88772_tx_fixup, +}; + +static const struct driver_info ax88772b_info = { + .description = "ASIX AX88772B USB 2.0 Ethernet", + .bind = ax88772b_bind, + .unbind = ax88772b_unbind, + .status = ax88772b_status, + .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_HW_IP_ALIGNMENT, + .rx_fixup = ax88772b_rx_fixup, + .tx_fixup = ax88772b_tx_fixup, }; static const struct usb_device_id products [] = { { + // 88178 + USB_DEVICE (0x0b95, 0x1780), + .driver_info = (unsigned long) &ax88178_info, +}, { + // 88178 for billianton linksys + USB_DEVICE (0x077b, 0x2226), + .driver_info = (unsigned long) &ax88178_info, +}, { + // ABOCOM for linksys + USB_DEVICE (0x1737, 0x0039), + .driver_info = (unsigned long) &ax88178_info, +}, { + // ABOCOM for pci + USB_DEVICE (0x14ea, 0xab11), + .driver_info = (unsigned long) &ax88178_info, +}, { + // Belkin + USB_DEVICE (0x050d, 0x5055), + .driver_info = (unsigned long) &belkin178_info, +}, { // Linksys USB200M USB_DEVICE (0x077b, 0x2226), .driver_info = (unsigned long) &ax8817x_info, @@ -1457,6 +3454,14 @@ static const struct usb_device_id products [] = { USB_DEVICE (0x2001, 0x1a00), .driver_info = (unsigned long) &dlink_dub_e100_info, }, { + // DLink DUB-E100B + USB_DEVICE (0x2001, 0x3c05), + .driver_info = (unsigned long) &dlink_dub_e100b_info, +}, { + // DLink DUB-E100B + USB_DEVICE (0x07d1, 0x3c05), + .driver_info = (unsigned long) &dlink_dub_e100b_info, +}, { // Intellinet, ST Lab USB Ethernet USB_DEVICE (0x0b95, 0x1720), .driver_info = (unsigned long) &ax8817x_info, @@ -1465,9 +3470,9 @@ static const struct usb_device_id products [] = { USB_DEVICE (0x07b8, 0x420a), .driver_info = (unsigned long) &hawking_uf200_info, }, { - // Billionton Systems, USB2AR - USB_DEVICE (0x08dd, 0x90ff), - .driver_info = (unsigned long) &ax8817x_info, + // Billionton Systems, USB2AR + USB_DEVICE (0x08dd, 0x90ff), + .driver_info = (unsigned long) &ax8817x_info, }, { // ATEN UC210T USB_DEVICE (0x0557, 0x2009), @@ -1477,10 +3482,6 @@ static const struct usb_device_id products [] = { USB_DEVICE (0x0411, 0x003d), .driver_info = (unsigned long) &ax8817x_info, }, { - // Buffalo LUA-U2-GT 10/100/1000 - USB_DEVICE (0x0411, 0x006e), - .driver_info = (unsigned long) &ax88178_info, -}, { // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter" USB_DEVICE (0x6189, 0x182d), .driver_info = (unsigned long) &ax8817x_info, @@ -1497,86 +3498,53 @@ static const struct usb_device_id products [] = { USB_DEVICE (0x1631, 0x6200), .driver_info = (unsigned long) &ax8817x_info, }, { - // JVC MP-PRX1 Port Replicator - USB_DEVICE (0x04f1, 0x3008), - .driver_info = (unsigned long) &ax8817x_info, -}, { - // ASIX AX88772B 10/100 - USB_DEVICE (0x0b95, 0x772b), - .driver_info = (unsigned long) &ax88772_info, -}, { // ASIX AX88772 10/100 - USB_DEVICE (0x0b95, 0x7720), - .driver_info = (unsigned long) &ax88772_info, -}, { - // ASIX AX88178 10/100/1000 - USB_DEVICE (0x0b95, 0x1780), - .driver_info = (unsigned long) &ax88178_info, -}, { - // Logitec LAN-GTJ/U2A - USB_DEVICE (0x0789, 0x0160), - .driver_info = (unsigned long) &ax88178_info, -}, { - // Linksys USB200M Rev 2 - USB_DEVICE (0x13b1, 0x0018), - .driver_info = (unsigned long) &ax88772_info, -}, { - // 0Q0 cable ethernet - USB_DEVICE (0x1557, 0x7720), - .driver_info = (unsigned long) &ax88772_info, + USB_DEVICE (0x0b95, 0x7720), + .driver_info = (unsigned long) &ax88772_info, }, { - // DLink DUB-E100 H/W Ver B1 - USB_DEVICE (0x07d1, 0x3c05), - .driver_info = (unsigned long) &ax88772_info, -}, { - // DLink DUB-E100 H/W Ver B1 Alternate - USB_DEVICE (0x2001, 0x3c05), - .driver_info = (unsigned long) &ax88772_info, -}, { - // Linksys USB1000 - USB_DEVICE (0x1737, 0x0039), - .driver_info = (unsigned long) &ax88178_info, + // ASIX AX88772 10/100 + USB_DEVICE (0x125E, 0x180D), + .driver_info = (unsigned long) &ax88772_info, }, { - // IO-DATA ETG-US2 - USB_DEVICE (0x04bb, 0x0930), - .driver_info = (unsigned long) &ax88178_info, + // ASIX AX88772A 10/100 + USB_DEVICE (0x0b95, 0x772A), + .driver_info = (unsigned long) &ax88772a_info, }, { - // Belkin F5D5055 - USB_DEVICE(0x050d, 0x5055), - .driver_info = (unsigned long) &ax88178_info, + // ASIX AX88772A 10/100 + USB_DEVICE (0x0db0, 0xA877), + .driver_info = (unsigned long) &ax88772a_info, }, { - // Apple USB Ethernet Adapter - USB_DEVICE(0x05ac, 0x1402), - .driver_info = (unsigned long) &ax88772_info, + // ASIX AX88772A 10/100 + USB_DEVICE (0x0421, 0x772A), + .driver_info = (unsigned long) &ax88772a_info, }, { - // Cables-to-Go USB Ethernet Adapter - USB_DEVICE(0x0b95, 0x772a), - .driver_info = (unsigned long) &ax88772_info, + // Linksys 200M + USB_DEVICE (0x13B1, 0x0018), + .driver_info = (unsigned long) &ax88772a_info, }, { - // ABOCOM for pci - USB_DEVICE(0x14ea, 0xab11), - .driver_info = (unsigned long) &ax88178_info, + USB_DEVICE (0x05ac, 0x1402), + .driver_info = (unsigned long) &ax88772a_info, }, { - // ASIX 88772a - USB_DEVICE(0x0db0, 0xa877), - .driver_info = (unsigned long) &ax88772_info, + // ASIX AX88772B 10/100 + USB_DEVICE (0x0b95, 0x772B), + .driver_info = (unsigned long) &ax88772b_info, }, { - // Asus USB Ethernet Adapter - USB_DEVICE (0x0b95, 0x7e2b), - .driver_info = (unsigned long) &ax88772_info, + // ASIX AX88772B 10/100 + USB_DEVICE (0x0b95, 0x7E2B), + .driver_info = (unsigned long) &ax88772b_info, }, { }, // END }; MODULE_DEVICE_TABLE(usb, products); static struct usb_driver asix_driver = { +// .owner = THIS_MODULE, .name = "asix", .id_table = products, - .probe = usbnet_probe, - .suspend = usbnet_suspend, - .resume = usbnet_resume, - .disconnect = usbnet_disconnect, - .supports_autosuspend = 1, + .probe = axusbnet_probe, + .suspend = ax_suspend, + .resume = ax_resume, + .disconnect = axusbnet_disconnect, }; static int __init asix_init(void) diff --git a/drivers/net/usb/asix.h b/drivers/net/usb/asix.h new file mode 100755 index 000000000000..1067d079caf8 --- /dev/null +++ b/drivers/net/usb/asix.h @@ -0,0 +1,557 @@ +#ifndef __LINUX_USBNET_ASIX_H +#define __LINUX_USBNET_ASIX_H + +/* + * Turn on this flag if the implementation of your USB host controller + * cannot handle non-double word aligned buffer. + * When turn on this flag, driver will fixup egress packet aligned on double + * word boundary before deliver to USB host controller. And will Disable the + * function "skb_reserve (skb, NET_IP_ALIGN)" to retain the buffer aligned on + * double word alignment for ingress packets. + */ +#define AX_FORCE_BUFF_ALIGN 0 + +#define AX_MONITOR_MODE 0x01 +#define AX_MONITOR_LINK 0x02 +#define AX_MONITOR_MAGIC 0x04 +#define AX_MONITOR_HSFS 0x10 + +/* AX88172 Medium Status Register values */ +#define AX_MEDIUM_FULL_DUPLEX 0x02 +#define AX_MEDIUM_TX_ABORT_ALLOW 0x04 +#define AX_MEDIUM_FLOW_CONTROL_EN 0x10 +#define AX_MCAST_FILTER_SIZE 8 +#define AX_MAX_MCAST 64 + +#define AX_EEPROM_LEN 0x40 + +#define AX_SWRESET_CLEAR 0x00 +#define AX_SWRESET_RR 0x01 +#define AX_SWRESET_RT 0x02 +#define AX_SWRESET_PRTE 0x04 +#define AX_SWRESET_PRL 0x08 +#define AX_SWRESET_BZ 0x10 +#define AX_SWRESET_IPRL 0x20 +#define AX_SWRESET_IPPD 0x40 +#define AX_SWRESET_IPOSC 0x0080 +#define AX_SWRESET_IPPSL_0 0x0100 +#define AX_SWRESET_IPPSL_1 0x0200 +#define AX_SWRESET_IPCOPS 0x0400 +#define AX_SWRESET_IPCOPSC 0x0800 +#define AX_SWRESET_AUTODETACH 0x1000 +#define AX_SWRESET_WOLLP 0x8000 + +#define AX88772_IPG0_DEFAULT 0x15 +#define AX88772_IPG1_DEFAULT 0x0c +#define AX88772_IPG2_DEFAULT 0x0E + +#define AX88772A_IPG0_DEFAULT 0x15 +#define AX88772A_IPG1_DEFAULT 0x16 +#define AX88772A_IPG2_DEFAULT 0x1A + +#define AX88772_MEDIUM_FULL_DUPLEX 0x0002 +#define AX88772_MEDIUM_RESERVED 0x0004 +#define AX88772_MEDIUM_RX_FC_ENABLE 0x0010 +#define AX88772_MEDIUM_TX_FC_ENABLE 0x0020 +#define AX88772_MEDIUM_PAUSE_FORMAT 0x0080 +#define AX88772_MEDIUM_RX_ENABLE 0x0100 +#define AX88772_MEDIUM_100MB 0x0200 +#define AX88772_MEDIUM_DEFAULT \ + (AX88772_MEDIUM_FULL_DUPLEX | AX88772_MEDIUM_RX_FC_ENABLE | \ + AX88772_MEDIUM_TX_FC_ENABLE | AX88772_MEDIUM_100MB | \ + AX88772_MEDIUM_RESERVED | AX88772_MEDIUM_RX_ENABLE ) + +#define AX_CMD_SET_SW_MII 0x06 +#define AX_CMD_READ_MII_REG 0x07 +#define AX_CMD_WRITE_MII_REG 0x08 +#define AX_CMD_SET_HW_MII 0x0a +#define AX_CMD_READ_EEPROM 0x0b +#define AX_CMD_WRITE_EEPROM 0x0c +#define AX_CMD_WRITE_EEPROM_EN 0x0d +#define AX_CMD_WRITE_EEPROM_DIS 0x0e +#define AX_CMD_WRITE_RX_CTL 0x10 +#define AX_CMD_READ_IPG012 0x11 +#define AX_CMD_WRITE_IPG0 0x12 +#define AX_CMD_WRITE_IPG1 0x13 +#define AX_CMD_WRITE_IPG2 0x14 +#define AX_CMD_WRITE_MULTI_FILTER 0x16 +#define AX_CMD_READ_NODE_ID 0x17 +#define AX_CMD_READ_PHY_ID 0x19 +#define AX_CMD_READ_MEDIUM_MODE 0x1a +#define AX_CMD_WRITE_MEDIUM_MODE 0x1b +#define AX_CMD_READ_MONITOR_MODE 0x1c +#define AX_CMD_WRITE_MONITOR_MODE 0x1d +#define AX_CMD_WRITE_GPIOS 0x1f +#define AX_CMD_SW_RESET 0x20 +#define AX_CMD_SW_PHY_STATUS 0x21 +#define AX_CMD_SW_PHY_SELECT 0x22 + #define AX_PHYSEL_PSEL (1 << 0) + #define AX_PHYSEL_ASEL (1 << 1) + #define AX_PHYSEL_SSMII (0 << 2) + #define AX_PHYSEL_SSRMII (1 << 2) + #define AX_PHYSEL_SSRRMII (3 << 2) + #define AX_PHYSEL_SSEN (1 << 4) +#define AX88772_CMD_READ_NODE_ID 0x13 +#define AX88772_CMD_WRITE_NODE_ID 0x14 +#define AX_CMD_READ_RXCOE_CTL 0x2b +#define AX_CMD_WRITE_RXCOE_CTL 0x2c +#define AX_CMD_READ_TXCOE_CTL 0x2d +#define AX_CMD_WRITE_TXCOE_CTL 0x2e + +#define REG_LENGTH 2 +#define PHY_ID_MASK 0x1f + +#define AX_RXCOE_IPCE 0x0001 +#define AX_RXCOE_IPVE 0x0002 +#define AX_RXCOE_V6VE 0x0004 +#define AX_RXCOE_TCPE 0x0008 +#define AX_RXCOE_UDPE 0x0010 +#define AX_RXCOE_ICMP 0x0020 +#define AX_RXCOE_IGMP 0x0040 +#define AX_RXCOE_ICV6 0x0080 +#define AX_RXCOE_TCPV6 0x0100 +#define AX_RXCOE_UDPV6 0x0200 +#define AX_RXCOE_ICMV6 0x0400 +#define AX_RXCOE_IGMV6 0x0800 +#define AX_RXCOE_ICV6V6 0x1000 +#define AX_RXCOE_FOPC 0x8000 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22) +#define AX_RXCOE_DEF_CSUM (AX_RXCOE_IPCE | AX_RXCOE_IPVE | \ + AX_RXCOE_V6VE | AX_RXCOE_TCPE | \ + AX_RXCOE_UDPE | AX_RXCOE_ICV6 | \ + AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6) +#else +#define AX_RXCOE_DEF_CSUM (AX_RXCOE_IPCE | AX_RXCOE_IPVE | \ + AX_RXCOE_TCPE | AX_RXCOE_UDPE) +#endif + +#define AX_RXCOE_64TE 0x0100 +#define AX_RXCOE_PPPOE 0x0200 +#define AX_RXCOE_RPCE 0x8000 + +#define AX_TXCOE_IP 0x0001 +#define AX_TXCOE_TCP 0x0002 +#define AX_TXCOE_UDP 0x0004 +#define AX_TXCOE_ICMP 0x0008 +#define AX_TXCOE_IGMP 0x0010 +#define AX_TXCOE_ICV6 0x0020 + +#define AX_TXCOE_TCPV6 0x0100 +#define AX_TXCOE_UDPV6 0x0200 +#define AX_TXCOE_ICMV6 0x0400 +#define AX_TXCOE_IGMV6 0x0800 +#define AX_TXCOE_ICV6V6 0x1000 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22) +#define AX_TXCOE_DEF_CSUM (AX_TXCOE_TCP | AX_TXCOE_UDP | \ + AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6) +#else +#define AX_TXCOE_DEF_CSUM (AX_TXCOE_TCP | AX_TXCOE_UDP) +#endif + +#define AX_TXCOE_64TE 0x0001 +#define AX_TXCOE_PPPE 0x0002 + +#define AX88772B_MAX_BULKIN_2K 0 +#define AX88772B_MAX_BULKIN_4K 1 +#define AX88772B_MAX_BULKIN_6K 2 +#define AX88772B_MAX_BULKIN_8K 3 +#define AX88772B_MAX_BULKIN_16K 4 +#define AX88772B_MAX_BULKIN_20K 5 +#define AX88772B_MAX_BULKIN_24K 6 +#define AX88772B_MAX_BULKIN_32K 7 +struct {unsigned short size, byte_cnt,threshold;} AX88772B_BULKIN_SIZE[] = +{ + /* 2k */ + {2048, 0x8000, 0x8001}, + /* 4k */ + {4096, 0x8100, 0x8147}, + /* 6k */ + {6144, 0x8200, 0x81EB}, + /* 8k */ + {8192, 0x8300, 0x83D7}, + /* 16 */ + {16384, 0x8400, 0x851E}, + /* 20k */ + {20480, 0x8500, 0x8666}, + /* 24k */ + {24576, 0x8600, 0x87AE}, + /* 32k */ + {32768, 0x8700, 0x8A3D}, +}; + + +#define AX_RX_CTL_RH1M 0x0100 /* Enable RX-Header mode 0 */ +#define AX_RX_CTL_RH2M 0x0200 /* Enable IP header in receive buffer aligned on 32-bit aligment */ +#define AX_RX_CTL_RH3M 0x0400 /* checksum value in rx header 3 */ +#define AX_RX_HEADER_DEFAULT (AX_RX_CTL_RH1M | AX_RX_CTL_RH2M) + +#define AX_RX_CTL_MFB 0x0300 /* Maximum Frame size 16384bytes */ +#define AX_RX_CTL_START 0x0080 /* Ethernet MAC start */ +#define AX_RX_CTL_AP 0x0020 /* Accept physcial address from Multicast array */ +#define AX_RX_CTL_AM 0x0010 +#define AX_RX_CTL_AB 0x0008 /* Accetp Brocadcast frames*/ +#define AX_RX_CTL_SEP 0x0004 /* Save error packets */ +#define AX_RX_CTL_AMALL 0x0002 /* Accetp all multicast frames */ +#define AX_RX_CTL_PRO 0x0001 /* Promiscuous Mode */ +#define AX_RX_CTL_STOP 0x0000 /* Stop MAC */ + +#define AX_MONITOR_MODE 0x01 +#define AX_MONITOR_LINK 0x02 +#define AX_MONITOR_MAGIC 0x04 +#define AX_MONITOR_HSFS 0x10 + +#define AX_MCAST_FILTER_SIZE 8 +#define AX_MAX_MCAST 64 +#define AX_INTERRUPT_BUFSIZE 8 + +#define AX_EEPROM_LEN 0x40 +#define AX_EEPROM_MAGIC 0xdeadbeef +#define EEPROMMASK 0x7f + +/* GPIO REGISTER */ +#define AXGPIOS_GPO0EN 0X01 // 1 << 0 +#define AXGPIOS_GPO0 0X02 // 1 << 1 +#define AXGPIOS_GPO1EN 0X04 // 1 << 2 +#define AXGPIOS_GPO1 0X08 // 1 << 3 +#define AXGPIOS_GPO2EN 0X10 // 1 << 4 +#define AXGPIOS_GPO2 0X20 // 1 << 5 +#define AXGPIOS_RSE 0X80 // 1 << 7 + +/* TX-header format */ +#define AX_TX_HDR_CPHI 0x4000 +#define AX_TX_HDR_DICF 0x8000 + +// GMII register definitions +#define GMII_PHY_CONTROL 0x00 // control reg +#define GMII_PHY_STATUS 0x01 // status reg +#define GMII_PHY_OUI 0x02 // most of the OUI bits +#define GMII_PHY_MODEL 0x03 // model/rev bits, and rest of OUI +#define GMII_PHY_ANAR 0x04 // AN advertisement reg +#define GMII_PHY_ANLPAR 0x05 // AN Link Partner +#define GMII_PHY_ANER 0x06 // AN expansion reg +#define GMII_PHY_1000BT_CONTROL 0x09 // control reg for 1000BT +#define GMII_PHY_1000BT_STATUS 0x0A // status reg for 1000BT + +// Bit definitions: GMII Control +#define GMII_CONTROL_RESET 0x8000 // reset bit in control reg +#define GMII_CONTROL_LOOPBACK 0x4000 // loopback bit in control reg +#define GMII_CONTROL_10MB 0x0000 // 10 Mbit +#define GMII_CONTROL_100MB 0x2000 // 100Mbit +#define GMII_CONTROL_1000MB 0x0040 // 1000Mbit +#define GMII_CONTROL_SPEED_BITS 0x2040 // speed bit mask +#define GMII_CONTROL_ENABLE_AUTO 0x1000 // autonegotiate enable +#define GMII_CONTROL_POWER_DOWN 0x0800 +#define GMII_CONTROL_ISOLATE 0x0400 // islolate bit +#define GMII_CONTROL_START_AUTO 0x0200 // restart autonegotiate +#define GMII_CONTROL_FULL_DUPLEX 0x0100 + +// Bit definitions: GMII Status +#define GMII_STATUS_100MB_MASK 0xE000 // any of these indicate 100 Mbit +#define GMII_STATUS_10MB_MASK 0x1800 // either of these indicate 10 Mbit +#define GMII_STATUS_AUTO_DONE 0x0020 // auto negotiation complete +#define GMII_STATUS_AUTO 0x0008 // auto negotiation is available +#define GMII_STATUS_LINK_UP 0x0004 // link status bit +#define GMII_STATUS_EXTENDED 0x0001 // extended regs exist +#define GMII_STATUS_100T4 0x8000 // capable of 100BT4 +#define GMII_STATUS_100TXFD 0x4000 // capable of 100BTX full duplex +#define GMII_STATUS_100TX 0x2000 // capable of 100BTX +#define GMII_STATUS_10TFD 0x1000 // capable of 10BT full duplex +#define GMII_STATUS_10T 0x0800 // capable of 10BT + +// Bit definitions: Auto-Negotiation Advertisement +#define GMII_ANAR_ASYM_PAUSE 0x0800 // support asymetric pause +#define GMII_ANAR_PAUSE 0x0400 // support pause packets +#define GMII_ANAR_100T4 0x0200 // support 100BT4 +#define GMII_ANAR_100TXFD 0x0100 // support 100BTX full duplex +#define GMII_ANAR_100TX 0x0080 // support 100BTX half duplex +#define GMII_ANAR_10TFD 0x0040 // support 10BT full duplex +#define GMII_ANAR_10T 0x0020 // support 10BT half duplex +#define GMII_SELECTOR_FIELD 0x001F // selector field. + +// Bit definitions: Auto-Negotiation Link Partner Ability +#define GMII_ANLPAR_100T4 0x0200 // support 100BT4 +#define GMII_ANLPAR_100TXFD 0x0100 // support 100BTX full duplex +#define GMII_ANLPAR_100TX 0x0080 // support 100BTX half duplex +#define GMII_ANLPAR_10TFD 0x0040 // support 10BT full duplex +#define GMII_ANLPAR_10T 0x0020 // support 10BT half duplex +#define GMII_ANLPAR_PAUSE 0x0400 // support pause packets +#define GMII_ANLPAR_ASYM_PAUSE 0x0800 // support asymetric pause +#define GMII_ANLPAR_ACK 0x4000 // means LCB was successfully rx'd +#define GMII_SELECTOR_8023 0x0001; + +// Bit definitions: 1000BaseT AUX Control +#define GMII_1000_AUX_CTRL_MASTER_SLAVE 0x1000 +#define GMII_1000_AUX_CTRL_FD_CAPABLE 0x0200 // full duplex capable +#define GMII_1000_AUX_CTRL_HD_CAPABLE 0x0100 // half duplex capable + +// Bit definitions: 1000BaseT AUX Status +#define GMII_1000_AUX_STATUS_FD_CAPABLE 0x0800 // full duplex capable +#define GMII_1000_AUX_STATUS_HD_CAPABLE 0x0400 // half duplex capable + +// Cicada MII Registers +#define GMII_AUX_CTRL_STATUS 0x1C +#define GMII_AUX_ANEG_CPLT 0x8000 +#define GMII_AUX_FDX 0x0020 +#define GMII_AUX_SPEED_1000 0x0010 +#define GMII_AUX_SPEED_100 0x0008 + +#ifndef ADVERTISE_PAUSE_CAP +#define ADVERTISE_PAUSE_CAP 0x0400 +#endif + +#ifndef MII_STAT1000 +#define MII_STAT1000 0x000A +#endif + +#ifndef LPA_1000FULL +#define LPA_1000FULL 0x0800 +#endif + +// medium mode register +#define MEDIUM_GIGA_MODE 0x0001 +#define MEDIUM_FULL_DUPLEX_MODE 0x0002 +#define MEDIUM_TX_ABORT_MODE 0x0004 +#define MEDIUM_ENABLE_125MHZ 0x0008 +#define MEDIUM_ENABLE_RX_FLOWCTRL 0x0010 +#define MEDIUM_ENABLE_TX_FLOWCTRL 0x0020 +#define MEDIUM_ENABLE_JUMBO_FRAME 0x0040 +#define MEDIUM_CHECK_PAUSE_FRAME_MODE 0x0080 +#define MEDIUM_ENABLE_RECEIVE 0x0100 +#define MEDIUM_MII_100M_MODE 0x0200 +#define MEDIUM_ENABLE_JAM_PATTERN 0x0400 +#define MEDIUM_ENABLE_STOP_BACKPRESSURE 0x0800 +#define MEDIUM_ENABLE_SUPPER_MAC_SUPPORT 0x1000 + +/* PHY mode */ +#define PHY_MODE_MARVELL 0 +#define PHY_MODE_CICADA_FAMILY 1 +#define PHY_MODE_CICADA_V1 1 +#define PHY_MODE_AGERE_FAMILY 2 +#define PHY_MODE_AGERE_V0 2 +#define PHY_MODE_CICADA_V2 5 +#define PHY_MODE_AGERE_V0_GMII 6 +#define PHY_MODE_CICADA_V2_ASIX 9 +#define PHY_MODE_VSC8601 10 +#define PHY_MODE_RTL8211CL 12 +#define PHY_MODE_RTL8211BN 13 +#define PHY_MODE_RTL8251CL 14 +#define PHY_MODE_ATTANSIC_V0 0x40 +#define PHY_MODE_ATTANSIC_FAMILY 0x40 +#define PHY_MODE_MAC_TO_MAC_GMII 0x7C + +/* */ +#define LED_MODE_MARVELL 0 +#define LED_MODE_CAMEO 1 + +#define MARVELL_LED_CTRL 0x18 +#define MARVELL_MANUAL_LED 0x19 + +#define PHY_IDENTIFIER 0x0002 +#define PHY_AGERE_IDENTIFIER 0x0282 +#define PHY_CICADA_IDENTIFIER 0x000f +#define PHY_MARVELL_IDENTIFIER 0x0141 + +#define PHY_MARVELL_STATUS 0x001b +#define MARVELL_STATUS_HWCFG 0x0004 /* SGMII without clock */ + +#define PHY_MARVELL_CTRL 0x0014 +#define MARVELL_CTRL_RXDELAY 0x0080 +#define MARVELL_CTRL_TXDELAY 0x0002 + +#define PHY_CICADA_EXTPAGE 0x001f +#define CICADA_EXTPAGE_EN 0x0001 +#define CICADA_EXTPAGE_DIS 0x0000 + + +struct {unsigned short value, offset; } CICADA_FAMILY_HWINIT[] = +{ + {0x0001, 0x001f}, {0x1c25, 0x0017}, {0x2a30, 0x001f}, {0x234c, 0x0010}, + {0x2a30, 0x001f}, {0x0212, 0x0008}, {0x52b5, 0x001f}, {0xa7fa, 0x0000}, + {0x0012, 0x0002}, {0x3002, 0x0001}, {0x87fa, 0x0000}, {0x52b5, 0x001f}, + {0xafac, 0x0000}, {0x000d, 0x0002}, {0x001c, 0x0001}, {0x8fac, 0x0000}, + {0x2a30, 0x001f}, {0x0012, 0x0008}, {0x2a30, 0x001f}, {0x0400, 0x0014}, + {0x2a30, 0x001f}, {0x0212, 0x0008}, {0x52b5, 0x001f}, {0xa760, 0x0000}, + {0x0000, 0x0002}, {0xfaff, 0x0001}, {0x8760, 0x0000}, {0x52b5, 0x001f}, + {0xa760, 0x0000}, {0x0000, 0x0002}, {0xfaff, 0x0001}, {0x8760, 0x0000}, + {0x52b5, 0x001f}, {0xafae, 0x0000}, {0x0004, 0x0002}, {0x0671, 0x0001}, + {0x8fae, 0x0000}, {0x2a30, 0x001f}, {0x0012, 0x0008}, {0x0000, 0x001f}, +}; + +struct {unsigned short value, offset; } CICADA_V2_HWINIT[] = +{ + {0x2a30, 0x001f}, {0x0212, 0x0008}, {0x52b5, 0x001f}, {0x000f, 0x0002}, + {0x472a, 0x0001}, {0x8fa4, 0x0000}, {0x2a30, 0x001f}, {0x0212, 0x0008}, + {0x0000, 0x001f}, +}; + +struct {unsigned short value, offset; } CICADA_V2_ASIX_HWINIT[] = +{ + {0x2a30, 0x001f}, {0x0212, 0x0008}, {0x52b5, 0x001f}, {0x0012, 0x0002}, + {0x3002, 0x0001}, {0x87fa, 0x0000}, {0x52b5, 0x001f}, {0x000f, 0x0002}, + {0x472a, 0x0001}, {0x8fa4, 0x0000}, {0x2a30, 0x001f}, {0x0212, 0x0008}, + {0x0000, 0x001f}, +}; + +struct {unsigned short value, offset; } AGERE_FAMILY_HWINIT[] = +{ + {0x0800, 0x0000}, {0x0007, 0x0012}, {0x8805, 0x0010}, {0xb03e, 0x0011}, + {0x8808, 0x0010}, {0xe110, 0x0011}, {0x8806, 0x0010}, {0xb03e, 0x0011}, + {0x8807, 0x0010}, {0xff00, 0x0011}, {0x880e, 0x0010}, {0xb4d3, 0x0011}, + {0x880f, 0x0010}, {0xb4d3, 0x0011}, {0x8810, 0x0010}, {0xb4d3, 0x0011}, + {0x8817, 0x0010}, {0x1c00, 0x0011}, {0x300d, 0x0010}, {0x0001, 0x0011}, + {0x0002, 0x0012}, +}; + +struct ax88178_data { + u16 EepromData; + u16 MediaLink; + int UseGpio0; + int UseRgmii; + u8 PhyMode; + u8 LedMode; + u8 BuffaloOld; +}; + +enum watchdog_state { + AX_NOP = 0, + CHK_LINK, /* Routine A */ + CHK_CABLE_EXIST, /* Called by A */ + CHK_CABLE_EXIST_AGAIN, /* Routine B */ + PHY_POWER_UP, /* Called by B */ + PHY_POWER_UP_BH, + PHY_POWER_DOWN, + CHK_CABLE_STATUS, /* Routine C */ + WAIT_AUTONEG_COMPLETE, + AX_SET_RX_CFG, +}; + +struct ax88772b_data { + struct usbnet *dev; + struct workqueue_struct *ax_work; + struct work_struct check_link; + unsigned long time_to_chk; + u16 psc; + u8 pw_enabled; + u8 Event; + u8 checksum; + u8 PhySelect:1; + u8 OperationMode:1; + +}; + +// define for MAC or PHY mode +#define OPERATION_MAC_MODE 0 +#define OPERATION_PHY_MODE 1 + +struct ax88772a_data { + struct usbnet *dev; + struct workqueue_struct *ax_work; + struct work_struct check_link; + unsigned long autoneg_start; +#define AX88772B_WATCHDOG (6 * HZ) + u8 Event; + u8 TickToExpire; + u8 DlyIndex; + u8 DlySel; + u16 EepromData; +}; + +struct ax88772_data { + struct usbnet *dev; + struct workqueue_struct *ax_work; + struct work_struct check_link; + unsigned long autoneg_start; + u8 Event; + u8 TickToExpire; +}; + +#define AX_RX_CHECKSUM 1 +#define AX_TX_CHECKSUM 2 + +/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */ +struct ax8817x_data { + u8 multi_filter[AX_MCAST_FILTER_SIZE]; + int (*resume) (struct usb_interface *intf); + int (*suspend) (struct usb_interface *intf, +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10) + pm_message_t message); +#else + u32 message); +#endif +}; + +struct ax88172_int_data { + u16 res1; +#define AX_INT_PPLS_LINK (1 << 0) +#define AX_INT_SPLS_LINK (1 << 1) +#define AX_INT_CABOFF_UNPLUG (1 << 7) + u8 link; + u16 res2; + u8 status; + u16 res3; +} __attribute__ ((packed)); + +#define AX_RXHDR_L4_ERR (1 << 8) +#define AX_RXHDR_L3_ERR (1 << 9) + +#define AX_RXHDR_L4_TYPE_UDP 1 +#define AX_RXHDR_L4_TYPE_ICMP 2 +#define AX_RXHDR_L4_TYPE_IGMP 3 +#define AX_RXHDR_L4_TYPE_TCP 4 +#define AX_RXHDR_L4_TYPE_TCMPV6 5 +#define AX_RXHDR_L4_TYPE_MASK 7 + +#define AX_RXHDR_L3_TYPE_IP 1 +#define AX_RXHDR_L3_TYPE_IPV6 2 + +struct ax88772b_rx_header { +#if defined(__LITTLE_ENDIAN_BITFIELD) + u16 len:11, + res1:1, + crc:1, + mii:1, + runt:1, + mc_bc:1; + + u16 len_bar:11, + res2:5; + + u8 vlan_ind:3, + vlan_tag_striped:1, + pri:3, + res3:1; + + u8 l4_csum_err:1, + l3_csum_err:1, + l4_type:3, + l3_type:2, + ce:1; +#elif defined (__BIG_ENDIAN_BITFIELD) + u16 mc_bc:1, + runt:1, + mii:1, + crc:1, + res1:1, + len:11; + + u16 res2:5, + len_bar:11; + + u8 res3:1, + pri:3, + vlan_tag_striped:1, + vlan_ind:3; + + u8 ce:1, + l3_type:2, + l4_type:3, + l3_csum_err:1, + l4_csum_err:1; +#else +#error "Please fix <asm/byteorder.h>" +#endif + +} __attribute__ ((packed)); + +#endif /* __LINUX_USBNET_ASIX_H */ + diff --git a/drivers/net/usb/axusbnet.c b/drivers/net/usb/axusbnet.c new file mode 100755 index 000000000000..00393d38a379 --- /dev/null +++ b/drivers/net/usb/axusbnet.c @@ -0,0 +1,1374 @@ +/* + * USB Network driver infrastructure + * Copyright (C) 2000-2005 by David Brownell + * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +/* + * This is a generic "USB networking" framework that works with several + * kinds of full and high speed networking devices: host-to-host cables, + * smart usb peripherals, and actual Ethernet adapters. + * + * These devices usually differ in terms of control protocols (if they + * even have one!) and sometimes they define new framing to wrap or batch + * Ethernet packets. Otherwise, they talk to USB pretty much the same, + * so interface (un)binding, endpoint I/O queues, fault handling, and other + * issues can usefully be addressed by this framework. + */ + +#define DEBUG // error path messages, extra info +// #define VERBOSE // more; success messages + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/netdevice.h> +#include <linux/etherdevice.h> +#include <linux/ctype.h> +#include <linux/ethtool.h> +#include <linux/workqueue.h> +#include <linux/mii.h> +#include <linux/usb.h> +/*#include <linux/usb/usbnet.h>*/ + +#include "asix.h" +#include "axusbnet.h" + +#define DRIVER_VERSION "22-Aug-2005" + +static void axusbnet_unlink_rx_urbs(struct usbnet *); + +extern void +ax8817x_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index, + u16 size, void *data); + +/*-------------------------------------------------------------------------*/ + +/* + * Nineteen USB 1.1 max size bulk transactions per frame (ms), max. + * Several dozen bytes of IPv4 data can fit in two such transactions. + * One maximum size Ethernet packet takes twenty four of them. + * For high speed, each frame comfortably fits almost 36 max size + * Ethernet packets (so queues should be bigger). + * + * REVISIT qlens should be members of 'struct usbnet'; the goal is to + * let the USB host controller be busy for 5msec or more before an irq + * is required, under load. Jumbograms change the equation. + */ +#define RX_MAX_QUEUE_MEMORY (60 * 1518) +#define RX_QLEN(dev) (((dev)->udev->speed == USB_SPEED_HIGH) ? \ + (RX_MAX_QUEUE_MEMORY/(dev)->rx_urb_size) : 4) +#define TX_QLEN(dev) (((dev)->udev->speed == USB_SPEED_HIGH) ? \ + (RX_MAX_QUEUE_MEMORY/(dev)->hard_mtu) : 4) + +// reawaken network queue this soon after stopping; else watchdog barks +//#define TX_TIMEOUT_JIFFIES (5*HZ) +#define TX_TIMEOUT_JIFFIES (30*HZ) + +// throttle rx/tx briefly after some faults, so khubd might disconnect() +// us (it polls at HZ/4 usually) before we report too many false errors. +#define THROTTLE_JIFFIES (HZ/8) + +// between wakeups +#define UNLINK_TIMEOUT_MS 3 + +/*-------------------------------------------------------------------------*/ + +static const char driver_name [] = "axusbnet"; + +/* use ethtool to change the level for any given device */ +static int msg_level = -1; +module_param (msg_level, int, 0); +MODULE_PARM_DESC (msg_level, "Override default message level"); + +/*-------------------------------------------------------------------------*/ + +/* handles CDC Ethernet and many other network "bulk data" interfaces */ +static +int axusbnet_get_endpoints(struct usbnet *dev, struct usb_interface *intf) +{ + int tmp; + struct usb_host_interface *alt = NULL; + struct usb_host_endpoint *in = NULL, *out = NULL; + struct usb_host_endpoint *status = NULL; + + for (tmp = 0; tmp < intf->num_altsetting; tmp++) { + unsigned ep; + + in = out = status = NULL; + alt = intf->altsetting + tmp; + + /* take the first altsetting with in-bulk + out-bulk; + * remember any status endpoint, just in case; + * ignore other endpoints and altsetttings. + */ + for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) { + struct usb_host_endpoint *e; + int intr = 0; + + e = alt->endpoint + ep; + switch (e->desc.bmAttributes) { + case USB_ENDPOINT_XFER_INT: + if (!(e->desc.bEndpointAddress & USB_DIR_IN)) + continue; + intr = 1; + /* FALLTHROUGH */ + case USB_ENDPOINT_XFER_BULK: + break; + default: + continue; + } + if (e->desc.bEndpointAddress & USB_DIR_IN) { + if (!intr && !in) + in = e; + else if (intr && !status) + status = e; + } else { + if (!out) + out = e; + } + } + if (in && out) + break; + } + if (!alt || !in || !out) + return -EINVAL; + + if (alt->desc.bAlternateSetting != 0 + || !(dev->driver_info->flags & FLAG_NO_SETINT)) { + tmp = usb_set_interface (dev->udev, alt->desc.bInterfaceNumber, + alt->desc.bAlternateSetting); + if (tmp < 0) + return tmp; + } + + dev->in = usb_rcvbulkpipe (dev->udev, + in->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK); + dev->out = usb_sndbulkpipe (dev->udev, + out->desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK); + dev->status = status; + return 0; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +static void intr_complete (struct urb *urb, struct pt_regs *regs); +#else +static void intr_complete (struct urb *urb); +#endif + +static int init_status (struct usbnet *dev, struct usb_interface *intf) +{ + char *buf = NULL; + unsigned pipe = 0; + unsigned maxp; + unsigned period; + + if (!dev->driver_info->status) + return 0; + + pipe = usb_rcvintpipe (dev->udev, + dev->status->desc.bEndpointAddress + & USB_ENDPOINT_NUMBER_MASK); + maxp = usb_maxpacket (dev->udev, pipe, 0); + + /* avoid 1 msec chatter: min 8 msec poll rate */ + period = max ((int) dev->status->desc.bInterval, + (dev->udev->speed == USB_SPEED_HIGH) ? 7 : 3); + + buf = kmalloc (maxp, GFP_KERNEL); + if (buf) { + dev->interrupt = usb_alloc_urb (0, GFP_KERNEL); + if (!dev->interrupt) { + kfree (buf); + return -ENOMEM; + } else { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14) + dev->interrupt->transfer_flags |= URB_ASYNC_UNLINK; +#endif + usb_fill_int_urb(dev->interrupt, dev->udev, pipe, + buf, maxp, intr_complete, dev, period); + devdbg(dev, + "status ep%din, %d bytes period %d", + usb_pipeendpoint(pipe), maxp, period); + } + } + return 0; +} + +/* Passes this packet up the stack, updating its accounting. + * Some link protocols batch packets, so their rx_fixup paths + * can return clones as well as just modify the original skb. + */ +static +void axusbnet_skb_return (struct usbnet *dev, struct sk_buff *skb) +{ + int status; + + skb->dev = dev->net; + skb->protocol = eth_type_trans (skb, dev->net); + dev->stats.rx_packets++; + dev->stats.rx_bytes += skb->len; + + if (netif_msg_rx_status (dev)) + devdbg (dev, "< rx, len %zu, type 0x%x", + skb->len + sizeof (struct ethhdr), skb->protocol); + memset (skb->cb, 0, sizeof (struct skb_data)); + status = netif_rx (skb); + if (status != NET_RX_SUCCESS && netif_msg_rx_err (dev)) + devdbg (dev, "netif_rx status %d", status); +} + +/*------------------------------------------------------------------------- + * + * Network Device Driver (peer link to "Host Device", from USB host) + * + *-------------------------------------------------------------------------*/ + +static +int axusbnet_change_mtu (struct net_device *net, int new_mtu) +{ + struct usbnet *dev = netdev_priv(net); + int ll_mtu = new_mtu + net->hard_header_len; + int old_hard_mtu = dev->hard_mtu; + int old_rx_urb_size = dev->rx_urb_size; + + if (new_mtu <= 0) + return -EINVAL; + // no second zero-length packet read wanted after mtu-sized packets + if ((ll_mtu % dev->maxpacket) == 0) + return -EDOM; + net->mtu = new_mtu; + + dev->hard_mtu = net->mtu + net->hard_header_len; + if (dev->rx_urb_size == old_hard_mtu) { + dev->rx_urb_size = dev->hard_mtu; + if (dev->rx_urb_size > old_rx_urb_size) + axusbnet_unlink_rx_urbs(dev); + } + + return 0; +} + +static struct net_device_stats *axusbnet_get_stats (struct net_device *net) +{ + struct usbnet *dev = netdev_priv (net); + return &dev->stats; +} + +/*-------------------------------------------------------------------------*/ + +/* some LK 2.4 HCDs oopsed if we freed or resubmitted urbs from + * completion callbacks. 2.5 should have fixed those bugs... + */ + +static void +defer_bh(struct usbnet *dev, struct sk_buff *skb, struct sk_buff_head *list) +{ + unsigned long flags; + + spin_lock_irqsave(&list->lock, flags); + __skb_unlink(skb, list); + spin_unlock(&list->lock); + spin_lock(&dev->done.lock); + __skb_queue_tail(&dev->done, skb); + if (dev->done.qlen == 1) + tasklet_schedule(&dev->bh); + spin_unlock_irqrestore(&dev->done.lock, flags); +} + +/* some work can't be done in tasklets, so we use keventd + * + * NOTE: annoying asymmetry: if it's active, schedule_work() fails, + * but tasklet_schedule() doesn't. hope the failure is rare. + */ +static +void axusbnet_defer_kevent (struct usbnet *dev, int work) +{ + set_bit (work, &dev->flags); + if (!schedule_work (&dev->kevent)) + deverr (dev, "kevent %d may have been dropped", work); + else + devdbg (dev, "kevent %d scheduled", work); +} + +/*-------------------------------------------------------------------------*/ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +static void rx_complete (struct urb *urb, struct pt_regs *regs); +#else +static void rx_complete (struct urb *urb); +#endif + +static void rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags) +{ + struct sk_buff *skb; + struct skb_data *entry; + int retval = 0; + unsigned long lockflags; + size_t size = dev->rx_urb_size; + struct driver_info *info = dev->driver_info; + u8 align; + +#if (AX_FORCE_BUFF_ALIGN) + align = 0; +#else + if (!(info->flags & FLAG_HW_IP_ALIGNMENT)) + align = NET_IP_ALIGN; + else + align = 0; +#endif + + if ((skb = alloc_skb (size + align, flags)) == NULL) { + + if (netif_msg_rx_err (dev)) + devdbg (dev, "no rx skb"); + + if((dev->rx_urb_size > 2048) && dev->rx_size) { + dev->rx_size--; + dev->rx_urb_size = AX88772B_BULKIN_SIZE[dev->rx_size].size; + + ax8817x_write_cmd_async (dev, 0x2A, + AX88772B_BULKIN_SIZE[dev->rx_size].byte_cnt, + AX88772B_BULKIN_SIZE[dev->rx_size].threshold, + 0, NULL); + } + + if (!(dev->flags & EVENT_RX_MEMORY)) + axusbnet_defer_kevent (dev, EVENT_RX_MEMORY); + usb_free_urb (urb); + return; + } + + if (align) + skb_reserve (skb, NET_IP_ALIGN); + + entry = (struct skb_data *) skb->cb; + entry->urb = urb; + entry->dev = dev; + entry->state = rx_start; + entry->length = 0; + + usb_fill_bulk_urb (urb, dev->udev, dev->in, + skb->data, size, rx_complete, skb); + + spin_lock_irqsave (&dev->rxq.lock, lockflags); + + if (netif_running (dev->net) + && netif_device_present (dev->net) + && !test_bit (EVENT_RX_HALT, &dev->flags)) { + switch (retval = usb_submit_urb (urb, GFP_ATOMIC)) { + case -EPIPE: + axusbnet_defer_kevent (dev, EVENT_RX_HALT); + break; + case -ENOMEM: + axusbnet_defer_kevent (dev, EVENT_RX_MEMORY); + break; + case -ENODEV: + if (netif_msg_ifdown (dev)) + devdbg (dev, "device gone"); + netif_device_detach (dev->net); + break; + default: + if (netif_msg_rx_err (dev)) + devdbg (dev, "rx submit, %d", retval); + tasklet_schedule (&dev->bh); + break; + case 0: + __skb_queue_tail (&dev->rxq, skb); + } + } else { + if (netif_msg_ifdown (dev)) + devdbg (dev, "rx: stopped"); + retval = -ENOLINK; + } + spin_unlock_irqrestore (&dev->rxq.lock, lockflags); + if (retval) { + dev_kfree_skb_any (skb); + usb_free_urb (urb); + } +} + + +/*-------------------------------------------------------------------------*/ + +static inline void rx_process (struct usbnet *dev, struct sk_buff *skb) +{ + if (dev->driver_info->rx_fixup + && !dev->driver_info->rx_fixup (dev, skb)) + goto error; + // else network stack removes extra byte if we forced a short packet + + if (skb->len) + axusbnet_skb_return (dev, skb); + else { + if (netif_msg_rx_err (dev)) + devdbg (dev, "drop"); +error: + dev->stats.rx_errors++; + skb_queue_tail (&dev->done, skb); + } +} + +/*-------------------------------------------------------------------------*/ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +static void rx_complete (struct urb *urb, struct pt_regs *regs) +#else +static void rx_complete (struct urb *urb) +#endif +{ + struct sk_buff *skb = (struct sk_buff *) urb->context; + struct skb_data *entry = (struct skb_data *) skb->cb; + struct usbnet *dev = entry->dev; + int urb_status = urb->status; + + skb_put (skb, urb->actual_length); + entry->state = rx_done; + entry->urb = NULL; + + switch (urb_status) { + /* success */ + case 0: + if (skb->len < dev->net->hard_header_len) { + entry->state = rx_cleanup; + dev->stats.rx_errors++; + dev->stats.rx_length_errors++; + if (netif_msg_rx_err (dev)) + devdbg (dev, "rx length %d", skb->len); + } + break; + + /* stalls need manual reset. this is rare ... except that + * when going through USB 2.0 TTs, unplug appears this way. + * we avoid the highspeed version of the ETIMEDOUT/EILSEQ + * storm, recovering as needed. + */ + case -EPIPE: + dev->stats.rx_errors++; + axusbnet_defer_kevent (dev, EVENT_RX_HALT); + // FALLTHROUGH + + /* software-driven interface shutdown */ + case -ECONNRESET: /* async unlink */ + case -ESHUTDOWN: /* hardware gone */ + if (netif_msg_ifdown (dev)) + devdbg (dev, "rx shutdown, code %d", urb_status); + goto block; + + /* we get controller i/o faults during khubd disconnect() delays. + * throttle down resubmits, to avoid log floods; just temporarily, + * so we still recover when the fault isn't a khubd delay. + */ + case -EPROTO: + case -ETIME: + case -EILSEQ: + dev->stats.rx_errors++; + if (!timer_pending (&dev->delay)) { + mod_timer (&dev->delay, jiffies + THROTTLE_JIFFIES); + if (netif_msg_link (dev)) + devdbg (dev, "rx throttle %d", urb_status); + } +block: + entry->state = rx_cleanup; + entry->urb = urb; + urb = NULL; + break; + + /* data overrun ... flush fifo? */ + case -EOVERFLOW: + dev->stats.rx_over_errors++; + // FALLTHROUGH + + default: + entry->state = rx_cleanup; + dev->stats.rx_errors++; + if (netif_msg_rx_err (dev)) + devdbg (dev, "rx status %d", urb_status); + break; + } + + defer_bh(dev, skb, &dev->rxq); + + if (urb) { + if (netif_running (dev->net) + && !test_bit (EVENT_RX_HALT, &dev->flags)) { + rx_submit (dev, urb, GFP_ATOMIC); + return; + } + usb_free_urb (urb); + } + if (netif_msg_rx_err (dev)) + devdbg (dev, "no read resubmitted"); +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +static void intr_complete (struct urb *urb, struct pt_regs *regs) +#else +static void intr_complete (struct urb *urb) +#endif +{ + struct usbnet *dev = urb->context; + int status = urb->status; + + switch (status) { + /* success */ + case 0: + dev->driver_info->status(dev, urb); + break; + + /* software-driven interface shutdown */ + case -ENOENT: /* urb killed */ + case -ESHUTDOWN: /* hardware gone */ + if (netif_msg_ifdown (dev)) + devdbg (dev, "intr shutdown, code %d", status); + return; + + /* NOTE: not throttling like RX/TX, since this endpoint + * already polls infrequently + */ + default: + devdbg (dev, "intr status %d", status); + break; + } + + if (!netif_running (dev->net)) + return; + + memset(urb->transfer_buffer, 0, urb->transfer_buffer_length); + status = usb_submit_urb (urb, GFP_ATOMIC); + if (status != 0 && netif_msg_timer (dev)) + deverr(dev, "intr resubmit --> %d", status); +} + +/*-------------------------------------------------------------------------*/ + +// unlink pending rx/tx; completion handlers do all other cleanup + +static int unlink_urbs (struct usbnet *dev, struct sk_buff_head *q) +{ + unsigned long flags; + struct sk_buff *skb, *skbnext; + int count = 0; + + spin_lock_irqsave (&q->lock, flags); + skb_queue_walk_safe(q, skb, skbnext) { + struct skb_data *entry; + struct urb *urb; + int retval; + + entry = (struct skb_data *) skb->cb; + urb = entry->urb; + + // during some PM-driven resume scenarios, + // these (async) unlinks complete immediately + retval = usb_unlink_urb (urb); + if (retval != -EINPROGRESS && retval != 0) + devdbg (dev, "unlink urb err, %d", retval); + else + count++; + } + spin_unlock_irqrestore (&q->lock, flags); + return count; +} + +// Flush all pending rx urbs +// minidrivers may need to do this when the MTU changes + +static +void axusbnet_unlink_rx_urbs(struct usbnet *dev) +{ + if (netif_running(dev->net)) { + (void) unlink_urbs (dev, &dev->rxq); + tasklet_schedule(&dev->bh); + } +} + +/*-------------------------------------------------------------------------*/ + +// precondition: never called in_interrupt + +static +int axusbnet_stop (struct net_device *net) +{ + struct usbnet *dev = netdev_priv(net); + struct driver_info *info = dev->driver_info; + int temp; + int retval; +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18) + DECLARE_WAIT_QUEUE_HEAD_ONSTACK (unlink_wakeup); +#else + DECLARE_WAIT_QUEUE_HEAD (unlink_wakeup); +#endif + DECLARE_WAITQUEUE (wait, current); + + netif_stop_queue (net); + + if (netif_msg_ifdown (dev)) + devinfo (dev, "stop stats: rx/tx %ld/%ld, errs %ld/%ld", + dev->stats.rx_packets, dev->stats.tx_packets, + dev->stats.rx_errors, dev->stats.tx_errors + ); + + /* allow minidriver to stop correctly (wireless devices to turn off + * radio etc) */ + if (info->stop) { + retval = info->stop(dev); + if (retval < 0 && netif_msg_ifdown(dev)) + devinfo(dev, + "stop fail (%d) usbnet usb-%s-%s, %s", + retval, + dev->udev->bus->bus_name, dev->udev->devpath, + info->description); + } + + if (!(info->flags & FLAG_AVOID_UNLINK_URBS)) { + /* ensure there are no more active urbs */ + add_wait_queue(&unlink_wakeup, &wait); + dev->wait = &unlink_wakeup; + temp = unlink_urbs(dev, &dev->txq) + + unlink_urbs(dev, &dev->rxq); + + /* maybe wait for deletions to finish. */ + while (!skb_queue_empty(&dev->rxq) + && !skb_queue_empty(&dev->txq) + && !skb_queue_empty(&dev->done)) { + msleep(UNLINK_TIMEOUT_MS); + if (netif_msg_ifdown(dev)) + devdbg(dev, "waited for %d urb completions", + temp); + } + dev->wait = NULL; + remove_wait_queue(&unlink_wakeup, &wait); + } + + usb_kill_urb(dev->interrupt); + + /* deferred work (task, timer, softirq) must also stop. + * can't flush_scheduled_work() until we drop rtnl (later), + * else workers could deadlock; so make workers a NOP. + */ + dev->flags = 0; + del_timer_sync (&dev->delay); + tasklet_kill (&dev->bh); + + return 0; +} + +/*-------------------------------------------------------------------------*/ + +// posts reads, and enables write queuing + +// precondition: never called in_interrupt + +static +int axusbnet_open (struct net_device *net) +{ + struct usbnet *dev = netdev_priv(net); + int retval = 0; + struct driver_info *info = dev->driver_info; + + // put into "known safe" state + if (info->reset && (retval = info->reset (dev)) < 0) { + if (netif_msg_ifup (dev)) + devinfo (dev, + "open reset fail (%d) usbnet usb-%s-%s, %s", + retval, + dev->udev->bus->bus_name, dev->udev->devpath, + info->description); + goto done; + } + + // insist peer be connected + if (info->check_connect && (retval = info->check_connect (dev)) < 0) { + if (netif_msg_ifup (dev)) + devdbg (dev, "can't open; %d", retval); + goto done; + } + + /* start any status interrupt transfer */ + if (dev->interrupt) { + retval = usb_submit_urb (dev->interrupt, GFP_KERNEL); + if (retval < 0) { + if (netif_msg_ifup (dev)) + deverr (dev, "intr submit %d", retval); + goto done; + } + } + + netif_start_queue (net); + if (netif_msg_ifup (dev)) { + char *framing; + + if (dev->driver_info->flags & FLAG_FRAMING_NC) + framing = "NetChip"; + else if (dev->driver_info->flags & FLAG_FRAMING_GL) + framing = "GeneSys"; + else if (dev->driver_info->flags & FLAG_FRAMING_Z) + framing = "Zaurus"; + else if (dev->driver_info->flags & FLAG_FRAMING_RN) + framing = "RNDIS"; + else if (dev->driver_info->flags & FLAG_FRAMING_AX) + framing = "ASIX"; + else + framing = "simple"; + + devinfo (dev, "open: enable queueing " + "(rx %d, tx %d) mtu %d %s framing", + (int)RX_QLEN (dev), (int)TX_QLEN (dev), dev->net->mtu, + framing); + } + + // delay posting reads until we're fully open + tasklet_schedule (&dev->bh); + return retval; +done: + return retval; +} + +/*-------------------------------------------------------------------------*/ + +/* ethtool methods; minidrivers may need to add some more, but + * they'll probably want to use this base set. + */ + +static +int axusbnet_get_settings (struct net_device *net, struct ethtool_cmd *cmd) +{ + struct usbnet *dev = netdev_priv(net); + + if (!dev->mii.mdio_read) + return -EOPNOTSUPP; + + return mii_ethtool_gset(&dev->mii, cmd); +} + +static +int axusbnet_set_settings (struct net_device *net, struct ethtool_cmd *cmd) +{ + struct usbnet *dev = netdev_priv(net); + int retval; + + if (!dev->mii.mdio_write) + return -EOPNOTSUPP; + + retval = mii_ethtool_sset(&dev->mii, cmd); + + /* link speed/duplex might have changed */ + if (dev->driver_info->link_reset) + dev->driver_info->link_reset(dev); + + return retval; + +} + +static +u32 axusbnet_get_link (struct net_device *net) +{ + struct usbnet *dev = netdev_priv(net); + + /* If a check_connect is defined, return its result */ + if (dev->driver_info->check_connect) + return dev->driver_info->check_connect (dev) == 0; + + /* if the device has mii operations, use those */ + if (dev->mii.mdio_read) + return mii_link_ok(&dev->mii); + + /* Otherwise, dtrt for drivers calling netif_carrier_{on,off} */ + return ethtool_op_get_link(net); +} + +static +int axusbnet_nway_reset(struct net_device *net) +{ + struct usbnet *dev = netdev_priv(net); + + if (!dev->mii.mdio_write) + return -EOPNOTSUPP; + + return mii_nway_restart(&dev->mii); +} + +static +void axusbnet_get_drvinfo (struct net_device *net, struct ethtool_drvinfo *info) +{ + struct usbnet *dev = netdev_priv(net); + + strncpy (info->driver, dev->driver_name, sizeof info->driver); + strncpy (info->version, DRIVER_VERSION, sizeof info->version); + strncpy (info->fw_version, dev->driver_info->description, + sizeof info->fw_version); + usb_make_path (dev->udev, info->bus_info, sizeof info->bus_info); +} + +static +u32 axusbnet_get_msglevel (struct net_device *net) +{ + struct usbnet *dev = netdev_priv(net); + + return dev->msg_enable; +} + +static +void axusbnet_set_msglevel (struct net_device *net, u32 level) +{ + struct usbnet *dev = netdev_priv(net); + + dev->msg_enable = level; +} + +/* drivers may override default ethtool_ops in their bind() routine */ +static struct ethtool_ops axusbnet_ethtool_ops = { + .get_settings = axusbnet_get_settings, + .set_settings = axusbnet_set_settings, + .get_link = axusbnet_get_link, + .nway_reset = axusbnet_nway_reset, + .get_drvinfo = axusbnet_get_drvinfo, + .get_msglevel = axusbnet_get_msglevel, + .set_msglevel = axusbnet_set_msglevel, +}; + +/*-------------------------------------------------------------------------*/ + +/* work that cannot be done in interrupt context uses keventd. + * + * NOTE: with 2.5 we could do more of this using completion callbacks, + * especially now that control transfers can be queued. + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void kevent (void *data) +{ + struct usbnet *dev = (struct usbnet *)data; +#else +static void kevent (struct work_struct *work) +{ + struct usbnet *dev = + container_of(work, struct usbnet, kevent); +#endif + int status; + + /* usb_clear_halt() needs a thread context */ + if (test_bit (EVENT_TX_HALT, &dev->flags)) { + + unlink_urbs (dev, &dev->txq); + status = usb_clear_halt (dev->udev, dev->out); + if (status < 0 + && status != -EPIPE + && status != -ESHUTDOWN) { + if (netif_msg_tx_err (dev)) + deverr (dev, "can't clear tx halt, status %d", + status); + } else { + clear_bit (EVENT_TX_HALT, &dev->flags); + if (status != -ESHUTDOWN) + netif_wake_queue (dev->net); + } + } + if (test_bit (EVENT_RX_HALT, &dev->flags)) { + + unlink_urbs (dev, &dev->rxq); + status = usb_clear_halt (dev->udev, dev->in); + if (status < 0 + && status != -EPIPE + && status != -ESHUTDOWN) { + if (netif_msg_rx_err (dev)) + deverr (dev, "can't clear rx halt, status %d", + status); + } else { + clear_bit (EVENT_RX_HALT, &dev->flags); + tasklet_schedule (&dev->bh); + } + } + + /* tasklet could resubmit itself forever if memory is tight */ + if (test_bit (EVENT_RX_MEMORY, &dev->flags)) { + struct urb *urb = NULL; + + if (netif_running (dev->net)) + urb = usb_alloc_urb (0, GFP_KERNEL); + else + clear_bit (EVENT_RX_MEMORY, &dev->flags); + if (urb != NULL) { + clear_bit (EVENT_RX_MEMORY, &dev->flags); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14) + urb->transfer_flags |= URB_ASYNC_UNLINK; +#endif + rx_submit (dev, urb, GFP_KERNEL); + tasklet_schedule (&dev->bh); + } + } + + if (test_bit (EVENT_LINK_RESET, &dev->flags)) { + struct driver_info *info = dev->driver_info; + int retval = 0; + + clear_bit (EVENT_LINK_RESET, &dev->flags); + if(info->link_reset && (retval = info->link_reset(dev)) < 0) { + devinfo(dev, "link reset failed (%d) usbnet usb-%s-%s, %s", + retval, + dev->udev->bus->bus_name, dev->udev->devpath, + info->description); + } + } + + if (dev->flags) + devdbg (dev, "kevent done, flags = 0x%lx", + dev->flags); +} + +/*-------------------------------------------------------------------------*/ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +static void tx_complete (struct urb *urb, struct pt_regs *regs) +#else +static void tx_complete (struct urb *urb) +#endif +{ + struct sk_buff *skb = (struct sk_buff *) urb->context; + struct skb_data *entry = (struct skb_data *) skb->cb; + struct usbnet *dev = entry->dev; + + if (urb->status == 0) { + dev->stats.tx_packets++; + dev->stats.tx_bytes += entry->length; + } else { + dev->stats.tx_errors++; + + switch (urb->status) { + case -EPIPE: + axusbnet_defer_kevent (dev, EVENT_TX_HALT); + break; + + /* software-driven interface shutdown */ + case -ECONNRESET: // async unlink + case -ESHUTDOWN: // hardware gone + break; + + // like rx, tx gets controller i/o faults during khubd delays + // and so it uses the same throttling mechanism. + case -EPROTO: + case -ETIME: + case -EILSEQ: + if (!timer_pending (&dev->delay)) { + mod_timer (&dev->delay, + jiffies + THROTTLE_JIFFIES); + if (netif_msg_link (dev)) + devdbg (dev, "tx throttle %d", + urb->status); + } + netif_stop_queue (dev->net); + break; + default: + if (netif_msg_tx_err (dev)) + devdbg (dev, "tx err %d", entry->urb->status); + break; + } + } + + urb->dev = NULL; + entry->state = tx_done; + defer_bh(dev, skb, &dev->txq); +} + +/*-------------------------------------------------------------------------*/ + +static +void axusbnet_tx_timeout (struct net_device *net) +{ + struct usbnet *dev = netdev_priv(net); + + unlink_urbs (dev, &dev->txq); + tasklet_schedule (&dev->bh); + + // FIXME: device recovery -- reset? +} + +/*-------------------------------------------------------------------------*/ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32) +static int +#else +static netdev_tx_t +#endif +axusbnet_start_xmit (struct sk_buff *skb, + struct net_device *net) +{ + struct usbnet *dev = netdev_priv(net); + int length; + struct urb *urb = NULL; + struct skb_data *entry; + struct driver_info *info = dev->driver_info; + unsigned long flags; + int retval; + + // some devices want funky USB-level framing, for + // win32 driver (usually) and/or hardware quirks + if (info->tx_fixup) { + skb = info->tx_fixup (dev, skb, GFP_ATOMIC); + if (!skb) { + if (netif_msg_tx_err (dev)) + devdbg (dev, "can't tx_fixup skb"); + goto drop; + } + } + length = skb->len; + + if (!(urb = usb_alloc_urb (0, GFP_ATOMIC))) { + if (netif_msg_tx_err (dev)) + devdbg (dev, "no urb"); + goto drop; + } + + entry = (struct skb_data *) skb->cb; + entry->urb = urb; + entry->dev = dev; + entry->state = tx_start; + entry->length = length; + + usb_fill_bulk_urb (urb, dev->udev, dev->out, + skb->data, skb->len, tx_complete, skb); + + /* don't assume the hardware handles USB_ZERO_PACKET + * NOTE: strictly conforming cdc-ether devices should expect + * the ZLP here, but ignore the one-byte packet. + */ + if (!(info->flags & FLAG_SEND_ZLP) && (length % dev->maxpacket) == 0) { + urb->transfer_buffer_length++; + if (skb_tailroom(skb)) { + skb->data[skb->len] = 0; + __skb_put(skb, 1); + } + } + + spin_lock_irqsave (&dev->txq.lock, flags); + + switch ((retval = usb_submit_urb (urb, GFP_ATOMIC))) { + case -EPIPE: + netif_stop_queue (net); + axusbnet_defer_kevent (dev, EVENT_TX_HALT); + break; + default: + if (netif_msg_tx_err (dev)) + devdbg (dev, "tx: submit urb err %d", retval); + break; + case 0: + net->trans_start = jiffies; + __skb_queue_tail (&dev->txq, skb); + if (dev->txq.qlen >= TX_QLEN (dev)) + netif_stop_queue (net); + } + spin_unlock_irqrestore (&dev->txq.lock, flags); + + if (retval) { + if (netif_msg_tx_err (dev)) + devdbg (dev, "drop, code %d", retval); +drop: + dev->stats.tx_dropped++; + if (skb) + dev_kfree_skb_any (skb); + usb_free_urb (urb); + } else if (netif_msg_tx_queued (dev)) { + devdbg (dev, "> tx, len %d, type 0x%x", + length, skb->protocol); + } + return NETDEV_TX_OK; +} + +/*-------------------------------------------------------------------------*/ + +// tasklet (work deferred from completions, in_irq) or timer + +static void axusbnet_bh (unsigned long param) +{ + struct usbnet *dev = (struct usbnet *) param; + struct sk_buff *skb; + struct skb_data *entry; + + while ((skb = skb_dequeue (&dev->done))) { + entry = (struct skb_data *) skb->cb; + switch (entry->state) { + case rx_done: + entry->state = rx_cleanup; + rx_process (dev, skb); + continue; + case tx_done: + case rx_cleanup: + usb_free_urb (entry->urb); + dev_kfree_skb (skb); + continue; + default: + devdbg (dev, "bogus skb state %d", entry->state); + } + } + + // waiting for all pending urbs to complete? + if (dev->wait) { + if ((dev->txq.qlen + dev->rxq.qlen + dev->done.qlen) == 0) { + wake_up (dev->wait); + } + + // or are we maybe short a few urbs? + } else if (netif_running (dev->net) + && netif_device_present (dev->net) + && !timer_pending (&dev->delay) + && !test_bit (EVENT_RX_HALT, &dev->flags)) { + int temp = dev->rxq.qlen; + int qlen = RX_QLEN (dev); + + if (temp < qlen) { + struct urb *urb; + int i; + + // don't refill the queue all at once + for (i = 0; i < 10 && dev->rxq.qlen < qlen; i++) { + urb = usb_alloc_urb (0, GFP_ATOMIC); + if (urb != NULL) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14) + urb->transfer_flags |= URB_ASYNC_UNLINK; +#endif + rx_submit (dev, urb, GFP_ATOMIC); + } + } + if (temp != dev->rxq.qlen && netif_msg_link (dev)) + devdbg (dev, "rxqlen %d --> %d", + temp, dev->rxq.qlen); + if (dev->rxq.qlen < qlen) + tasklet_schedule (&dev->bh); + } + if (dev->txq.qlen < TX_QLEN (dev)) + netif_wake_queue (dev->net); + } +} + + +/*------------------------------------------------------------------------- + * + * USB Device Driver support + * + *-------------------------------------------------------------------------*/ + +// precondition: never called in_interrupt + +static +void axusbnet_disconnect (struct usb_interface *intf) +{ + struct usbnet *dev; + struct usb_device *xdev; + struct net_device *net; + + dev = usb_get_intfdata(intf); + usb_set_intfdata(intf, NULL); + if (!dev) + return; + + xdev = interface_to_usbdev (intf); + + if (netif_msg_probe (dev)) + devinfo (dev, "unregister '%s' usb-%s-%s, %s", + intf->dev.driver->name, + xdev->bus->bus_name, xdev->devpath, + dev->driver_info->description); + + net = dev->net; + unregister_netdev (net); + + /* we don't hold rtnl here ... */ + flush_scheduled_work (); + + if (dev->driver_info->unbind) + dev->driver_info->unbind (dev, intf); + + free_netdev(net); + usb_put_dev (xdev); +} + +/*-------------------------------------------------------------------------*/ + +// precondition: never called in_interrupt + +static int +axusbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod) +{ + struct usbnet *dev; + struct net_device *net; + struct usb_host_interface *interface; + struct driver_info *info; + struct usb_device *xdev; + int status; + const char *name; + + name = udev->dev.driver->name; + info = (struct driver_info *) prod->driver_info; + if (!info) { + printk (KERN_ERR "blacklisted by %s\n", name); + return -ENODEV; + } + xdev = interface_to_usbdev (udev); + interface = udev->cur_altsetting; + + usb_get_dev (xdev); + + status = -ENOMEM; + + // set up our own records + net = alloc_etherdev(sizeof(*dev)); + if (!net) { + dbg ("can't kmalloc dev"); + goto out; + } + + dev = netdev_priv(net); + dev->udev = xdev; + dev->intf = udev; + dev->driver_info = info; + dev->driver_name = name; + dev->msg_enable = netif_msg_init (msg_level, NETIF_MSG_DRV + | NETIF_MSG_PROBE | NETIF_MSG_LINK); + skb_queue_head_init (&dev->rxq); + skb_queue_head_init (&dev->txq); + skb_queue_head_init (&dev->done); + dev->bh.func = axusbnet_bh; + dev->bh.data = (unsigned long) dev; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) + INIT_WORK (&dev->kevent, kevent, dev); +#else + INIT_WORK (&dev->kevent, kevent); +#endif + + dev->delay.function = axusbnet_bh; + dev->delay.data = (unsigned long) dev; + init_timer (&dev->delay); +// mutex_init (&dev->phy_mutex); + + dev->net = net; + + /* rx and tx sides can use different message sizes; + * bind() should set rx_urb_size in that case. + */ + dev->hard_mtu = net->mtu + net->hard_header_len; + +#if 0 +// dma_supported() is deeply broken on almost all architectures + // possible with some EHCI controllers + if (dma_supported (&udev->dev, DMA_BIT_MASK(64))) + net->features |= NETIF_F_HIGHDMA; +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) + net->open = axusbnet_open, + net->stop = axusbnet_stop, + net->hard_start_xmit = axusbnet_start_xmit, + net->tx_timeout = axusbnet_tx_timeout, + net->get_stats = axusbnet_get_stats; +#endif + + net->watchdog_timeo = TX_TIMEOUT_JIFFIES; + net->ethtool_ops = &axusbnet_ethtool_ops; + + // allow device-specific bind/init procedures + // NOTE net->name still not usable ... + status = info->bind (dev, udev); + if (status < 0) { + deverr(dev, "Binding device failed: %d", status); + goto out1; + } + + /* maybe the remote can't receive an Ethernet MTU */ + if (net->mtu > (dev->hard_mtu - net->hard_header_len)) + net->mtu = dev->hard_mtu - net->hard_header_len; + + status = init_status (dev, udev); + if (status < 0) + goto out3; + + if (!dev->rx_urb_size) + dev->rx_urb_size = dev->hard_mtu; + dev->maxpacket = usb_maxpacket (dev->udev, dev->out, 1); + + SET_NETDEV_DEV(net, &udev->dev); + status = register_netdev (net); + if (status) { + deverr(dev, "net device registration failed: %d", status); + goto out3; + } + + if (netif_msg_probe (dev)) + devinfo (dev, "register '%s' at usb-%s-%s, %s, %pM", + udev->dev.driver->name, + xdev->bus->bus_name, xdev->devpath, + dev->driver_info->description, + net->dev_addr); + + // ok, it's ready to go. + usb_set_intfdata (udev, dev); + + // start as if the link is up + netif_device_attach (net); + + return 0; + +out3: + if (info->unbind) + info->unbind (dev, udev); +out1: + free_netdev(net); +out: + usb_put_dev(xdev); + return status; +} + +/*-------------------------------------------------------------------------*/ + +/* + * suspend the whole driver as soon as the first interface is suspended + * resume only when the last interface is resumed + */ + +static int axusbnet_suspend (struct usb_interface *intf, +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10) +pm_message_t message) +#else +u32 message) +#endif +{ + struct usbnet *dev = usb_get_intfdata(intf); + + if (!dev->suspend_count++) { + /* + * accelerate emptying of the rx and queues, to avoid + * having everything error out. + */ + netif_device_detach (dev->net); + (void) unlink_urbs (dev, &dev->rxq); + (void) unlink_urbs (dev, &dev->txq); + /* + * reattach so runtime management can use and + * wake the device + */ + netif_device_attach (dev->net); + } + return 0; +} + +static int +axusbnet_resume (struct usb_interface *intf) +{ + struct usbnet *dev = usb_get_intfdata(intf); + + if (!--dev->suspend_count) + tasklet_schedule (&dev->bh); + + return 0; +} + diff --git a/drivers/net/usb/axusbnet.h b/drivers/net/usb/axusbnet.h new file mode 100755 index 000000000000..d492de3b80e1 --- /dev/null +++ b/drivers/net/usb/axusbnet.h @@ -0,0 +1,208 @@ +/* + * USB Networking Link Interface + * + * Copyright (C) 2000-2005 by David Brownell <dbrownell@users.sourceforge.net> + * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __LINUX_USB_USBNET_H +#define __LINUX_USB_USBNET_H + +#ifndef gfp_t +#define gfp_t int +#endif + +/* interface from usbnet core to each USB networking link we handle */ +struct usbnet { + /* housekeeping */ + struct usb_device *udev; + struct usb_interface *intf; + struct driver_info *driver_info; + const char *driver_name; + void *driver_priv; + wait_queue_head_t *wait; +// struct mutex phy_mutex; + unsigned char suspend_count; + + /* i/o info: pipes etc */ + unsigned in, out; + struct usb_host_endpoint *status; + unsigned maxpacket; + struct timer_list delay; + + /* protocol/interface state */ + struct net_device *net; + struct net_device_stats stats; + int msg_enable; + unsigned long data [5]; + u32 xid; + u32 hard_mtu; /* count any extra framing */ + size_t rx_urb_size; /* size for rx urbs */ + struct mii_if_info mii; + + /* various kinds of pending driver work */ + struct sk_buff_head rxq; + struct sk_buff_head txq; + struct sk_buff_head done; + struct sk_buff_head rxq_pause; + struct urb *interrupt; + struct tasklet_struct bh; + + struct work_struct kevent; + unsigned long flags; +# define EVENT_TX_HALT 0 +# define EVENT_RX_HALT 1 +# define EVENT_RX_MEMORY 2 +# define EVENT_STS_SPLIT 3 +# define EVENT_LINK_RESET 4 +# define EVENT_RX_PAUSED 5 + + void *priv; /* point to minidriver private data */ + unsigned char rx_size; +}; + +static inline struct usb_driver *driver_of(struct usb_interface *intf) +{ + return to_usb_driver(intf->dev.driver); +} + +/* interface from the device/framing level "minidriver" to core */ +struct driver_info { + char *description; + + int flags; +/* framing is CDC Ethernet, not writing ZLPs (hw issues), or optionally: */ +#define FLAG_FRAMING_NC 0x0001 /* guard against device dropouts */ +#define FLAG_FRAMING_GL 0x0002 /* genelink batches packets */ +#define FLAG_FRAMING_Z 0x0004 /* zaurus adds a trailer */ +#define FLAG_FRAMING_RN 0x0008 /* RNDIS batches, plus huge header */ + +#define FLAG_NO_SETINT 0x0010 /* device can't set_interface() */ +#define FLAG_ETHER 0x0020 /* maybe use "eth%d" names */ + +#define FLAG_FRAMING_AX 0x0040 /* AX88772/178 packets */ +#define FLAG_WLAN 0x0080 /* use "wlan%d" names */ +#define FLAG_AVOID_UNLINK_URBS 0x0100 /* don't unlink urbs at usbnet_stop() */ +#define FLAG_SEND_ZLP 0x0200 /* hw requires ZLPs are sent */ +#define FLAG_HW_IP_ALIGNMENT 0x0400 /* AX88772B support hardware IP alignment */ + + + /* init device ... can sleep, or cause probe() failure */ + int (*bind)(struct usbnet *, struct usb_interface *); + + /* cleanup device ... can sleep, but can't fail */ + void (*unbind)(struct usbnet *, struct usb_interface *); + + /* reset device ... can sleep */ + int (*reset)(struct usbnet *); + + /* stop device ... can sleep */ + int (*stop)(struct usbnet *); + + /* see if peer is connected ... can sleep */ + int (*check_connect)(struct usbnet *); + + /* for status polling */ + void (*status)(struct usbnet *, struct urb *); + + /* link reset handling, called from defer_kevent */ + int (*link_reset)(struct usbnet *); + + /* fixup rx packet (strip framing) */ + int (*rx_fixup)(struct usbnet *dev, struct sk_buff *skb); + + /* fixup tx packet (add framing) */ + struct sk_buff *(*tx_fixup)(struct usbnet *dev, + struct sk_buff *skb, gfp_t flags); + + /* early initialization code, can sleep. This is for minidrivers + * having 'subminidrivers' that need to do extra initialization + * right after minidriver have initialized hardware. */ + int (*early_init)(struct usbnet *dev); + + /* called by minidriver when receiving indication */ + void (*indication)(struct usbnet *dev, void *ind, int indlen); + + /* for new devices, use the descriptor-reading code instead */ + int in; /* rx endpoint */ + int out; /* tx endpoint */ + + unsigned long data; /* Misc driver specific data */ +}; + +/* Drivers that reuse some of the standard USB CDC infrastructure + * (notably, using multiple interfaces according to the CDC + * union descriptor) get some helper code. + */ +struct cdc_state { + struct usb_cdc_header_desc *header; + struct usb_cdc_union_desc *u; + struct usb_cdc_ether_desc *ether; + struct usb_interface *control; + struct usb_interface *data; +}; + +/* CDC and RNDIS support the same host-chosen packet filters for IN transfers */ +#define DEFAULT_FILTER (USB_CDC_PACKET_TYPE_BROADCAST \ + |USB_CDC_PACKET_TYPE_ALL_MULTICAST \ + |USB_CDC_PACKET_TYPE_PROMISCUOUS \ + |USB_CDC_PACKET_TYPE_DIRECTED) + + +/* we record the state for each of our queued skbs */ +enum skb_state { + illegal = 0, + tx_start, tx_done, + rx_start, rx_done, rx_cleanup +}; + +struct skb_data { /* skb->cb is one of these */ + struct urb *urb; + struct usbnet *dev; + enum skb_state state; + size_t length; +}; + +#ifndef skb_queue_walk_safe +#define skb_queue_walk_safe(queue, skb, tmp) \ + for (skb = (queue)->next, tmp = skb->next; \ + skb != (struct sk_buff *)(queue); \ + skb = tmp, tmp = skb->next) +#endif + +/* messaging support includes the interface name, so it must not be + * used before it has one ... notably, in minidriver bind() calls. + */ +#ifdef DEBUG +#define devdbg(usbnet, fmt, arg...) \ + printk("%s: " fmt "\n" , (usbnet)->net->name , ## arg) +#else +#define devdbg(usbnet, fmt, arg...) \ + ({ if (0) printk("%s: " fmt "\n" , (usbnet)->net->name , \ + ## arg); 0; }) +#endif + +#define deverr(usbnet, fmt, arg...) \ + printk(KERN_ERR "%s: " fmt "\n" , (usbnet)->net->name , ## arg) +#define devwarn(usbnet, fmt, arg...) \ + printk(KERN_WARNING "%s: " fmt "\n" , (usbnet)->net->name , ## arg) + +#define devinfo(usbnet, fmt, arg...) \ + printk(KERN_INFO "%s: " fmt "\n" , (usbnet)->net->name , ## arg); \ + + +#endif /* __LINUX_USB_USBNET_H */ diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index d3cb8e6ff099..c3b94771d451 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -319,6 +319,11 @@ config REGULATOR_TPS6586X help This driver supports TPS6586X voltage regulator chips. +config REGULATOR_TPS658623 + depends on REGULATOR_TPS6586X + default n + bool "Use voltage tables suitable for TPS658623." + config REGULATOR_TPS6524X tristate "TI TPS6524X Power regulators" depends on SPI diff --git a/drivers/regulator/tps6586x-regulator.c b/drivers/regulator/tps6586x-regulator.c index 9ab8f3fb68ef..acef70550c7e 100644 --- a/drivers/regulator/tps6586x-regulator.c +++ b/drivers/regulator/tps6586x-regulator.c @@ -229,12 +229,14 @@ static int tps6586x_ldo4_voltages[] = { 2300, 2325, 2350, 2375, 2400, 2425, 2450, 2475, }; +#ifndef CONFIG_REGULATOR_TPS658623 static int tps6586x_sm2_voltages[] = { 3000, 3050, 3100, 3150, 3200, 3250, 3300, 3350, 3400, 3450, 3500, 3550, 3600, 3650, 3700, 3750, 3800, 3850, 3900, 3950, 4000, 4050, 4100, 4150, 4200, 4250, 4300, 4350, 4400, 4450, 4500, 4550, }; +#endif /* !CONFIG_REGULATOR_TPS658623 */ static int tps6586x_dvm_voltages[] = { 725, 750, 775, 800, 825, 850, 875, 900, @@ -292,11 +294,16 @@ static struct tps6586x_regulator tps6586x_regulator[] = { TPS6586X_LDO(LDO_8, ldo, SUPPLYV2, 5, 3, ENC, 6, END, 6, 15000), TPS6586X_LDO(LDO_9, ldo, SUPPLYV6, 3, 3, ENE, 7, ENE, 7, 3000), TPS6586X_LDO(LDO_RTC, ldo, SUPPLYV4, 3, 3, V4, 7, V4, 7, 0), +#ifndef CONFIG_REGULATOR_TPS658623 TPS6586X_LDO(SM_2, sm2, SUPPLYV2, 0, 5, ENC, 7, END, 7, 0), +#endif TPS6586X_DVM(LDO_2, dvm, LDO2BV1, 0, 5, ENA, 3, ENB, 3, VCC2, 6, 3000), TPS6586X_DVM(SM_0, dvm, SM0V1, 0, 5, ENA, 1, ENB, 1, VCC1, 2, 4000), TPS6586X_DVM(SM_1, dvm, SM1V1, 0, 5, ENA, 0, ENB, 0, VCC1, 0, 4000), +#ifdef CONFIG_REGULATOR_TPS658623 + TPS6586X_DVM(SM_2, ldo4, SUPPLYV2, 0, 5, ENC, 3, END, 3, VCC1, 6, 15000), +#endif TPS6586X_DVM(LDO_4, ldo4, LDO4V1, 0, 5, ENC, 3, END, 3, VCC1, 6, 15000), }; diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index d494001b1226..fcdcb5d5c995 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -170,6 +170,16 @@ extern int __gpio_cansleep(unsigned gpio); extern int __gpio_to_irq(unsigned gpio); +#define GPIOF_DIR_OUT (0 << 0) +#define GPIOF_DIR_IN (1 << 0) + +#define GPIOF_INIT_LOW (0 << 1) +#define GPIOF_INIT_HIGH (1 << 1) + +#define GPIOF_IN (GPIOF_DIR_IN) +#define GPIOF_OUT_INIT_LOW (GPIOF_DIR_OUT | GPIOF_INIT_LOW) +#define GPIOF_OUT_INIT_HIGH (GPIOF_DIR_OUT | GPIOF_INIT_HIGH) + /** * struct gpio - a structure describing a GPIO with configuration * @gpio: the GPIO number diff --git a/sound/soc/tegra/Kconfig b/sound/soc/tegra/Kconfig index 2a8b4f1cef64..40717a6f2ee3 100644 --- a/sound/soc/tegra/Kconfig +++ b/sound/soc/tegra/Kconfig @@ -4,6 +4,16 @@ config SND_SOC_TEGRA help Say Y or M here if you want support for SoC audio on Tegra. +config SND_SOC_TEGRA20_AC97 + tristate "Tegra 20 AC97 driver" + select AC97_BUS + select SND_AC97_CODEC + select SND_SOC_AC97_BUS + help + Say Y or M if you want to add support for codecs attached to the + Tegra AC97 interface. You will also need to select the individual + machine drivers to support below. + config SND_SOC_TEGRA20_DAS tristate "Tegra 20 Digital Audio Switch driver" depends on SND_SOC_TEGRA && ARCH_TEGRA_2x_SOC @@ -76,6 +86,17 @@ config SND_SOC_TEGRA_WM8903 boards using the WM8093 codec. Currently, the supported boards are Harmony, Ventana, Seaboard, Kaen, and Aebl. +config SND_SOC_TEGRA_COLIBRI_T20 + tristate "SoC Audio support for Colibri T20 module" + depends on SND_SOC_TEGRA && MACH_COLIBRI_T20 + select SND_SOC_SPDIF + select SND_SOC_TEGRA20_AC97 + select SND_SOC_TEGRA20_SPDIF + select SND_SOC_WM9712 + help + Say Y or M here if you want to add support for SoC audio on the + Toradex Colibri T20 module. + config SND_SOC_TEGRA_TRIMSLICE tristate "SoC Audio support for TrimSlice board" depends on SND_SOC_TEGRA && MACH_TRIMSLICE && I2C diff --git a/sound/soc/tegra/Makefile b/sound/soc/tegra/Makefile index 9c4346aa265c..274421b483de 100644 --- a/sound/soc/tegra/Makefile +++ b/sound/soc/tegra/Makefile @@ -6,6 +6,7 @@ snd-soc-tegra-tdm-pcm-objs := tegra_tdm_pcm.o snd-soc-tegra20-spdif-objs := tegra20_spdif.o snd-soc-tegra-utils-objs += tegra_asoc_utils.o snd-soc-tegra20-das-objs := tegra20_das.o +snd-soc-tegra20-ac97-objs := tegra20_ac97.o snd-soc-tegra20-i2s-objs := tegra20_i2s.o snd-soc-tegra30-ahub-objs := tegra30_ahub.o snd-soc-tegra30-i2s-objs := tegra30_i2s.o @@ -16,6 +17,7 @@ obj-$(CONFIG_SND_SOC_TEGRA) += snd-soc-tegra-pcm.o obj-$(CONFIG_SND_SOC_TEGRA) += snd-soc-tegra-utils.o obj-$(CONFIG_SND_SOC_TEGRA) += snd-soc-tegra-tdm-pcm.o obj-$(CONFIG_SND_SOC_TEGRA20_DAS) += snd-soc-tegra20-das.o +obj-$(CONFIG_SND_SOC_TEGRA20_AC97) += snd-soc-tegra20-ac97.o obj-$(CONFIG_SND_SOC_TEGRA20_I2S) += snd-soc-tegra20-i2s.o obj-$(CONFIG_SND_SOC_TEGRA30_AHUB) += snd-soc-tegra30-ahub.o obj-$(CONFIG_SND_SOC_TEGRA30_DAM) += snd-soc-tegra30-dam.o @@ -25,6 +27,7 @@ obj-$(CONFIG_SND_SOC_TEGRA30_SPDIF) += snd-soc-tegra30-spdif.o # Tegra machine Support snd-soc-tegra-wm8903-objs := tegra_wm8903.o +snd-soc-tegra-colibri_t20-objs := colibri_t20.o snd-soc-tegra-trimslice-objs := trimslice.o snd-soc-tegra-wm8753-objs := tegra_wm8753.o snd-soc-tegra-max98088-objs := tegra_max98088.o @@ -34,6 +37,7 @@ snd-soc-tegra-max98095-objs := tegra_max98095.o snd-soc-tegra-p1852-objs := tegra_p1852.o obj-$(CONFIG_SND_SOC_TEGRA_WM8903) += snd-soc-tegra-wm8903.o +obj-$(CONFIG_SND_SOC_TEGRA_COLIBRI_T20) += snd-soc-tegra-colibri_t20.o obj-$(CONFIG_SND_SOC_TEGRA_TRIMSLICE) += snd-soc-tegra-trimslice.o obj-$(CONFIG_SND_SOC_TEGRA_WM8753) += snd-soc-tegra-wm8753.o obj-$(CONFIG_SND_SOC_TEGRA_MAX98088) += snd-soc-tegra-max98088.o diff --git a/sound/soc/tegra/colibri_t20.c b/sound/soc/tegra/colibri_t20.c new file mode 100644 index 000000000000..b07f814e4731 --- /dev/null +++ b/sound/soc/tegra/colibri_t20.c @@ -0,0 +1,391 @@ +/* + * SoC audio driver for Toradex Colibri T20 + * + * Copyright (C) 2012 Toradex Inc. + * + * 2010-11-19: Marcel Ziswiler <marcel.ziswiler@noser.com> + * initial version (note: WM9715L is fully WM9712 compatible) + * + * Copied from tosa.c: + * Copyright 2005 Wolfson Microelectronics PLC. + * Copyright 2005 Openedhand Ltd. + * + * Authors: Liam Girdwood <lrg@slimlogic.co.uk> + * Richard Purdie <richard@openedhand.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include <asm/mach-types.h> + +#include <linux/clk.h> +#include <linux/device.h> +#include <linux/gpio.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/slab.h> + +#include <mach/audio.h> + +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/soc.h> /* order crucial */ +#include <sound/soc-dapm.h> + +#include "../codecs/wm9712.h" +#include "tegra_asoc_utils.h" +#include "tegra_pcm.h" +#include "tegra20_ac97.h" + +#define DRV_NAME "colibri_t20-snd-wm9715l" + +struct colibri_t20_wm9715l { + struct tegra_asoc_utils_data util_data; +}; + +static int colibri_t20_wm9715l_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->codec_dai; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct snd_soc_codec *codec = rtd->codec; + struct snd_soc_card *card = codec->card; + struct colibri_t20_wm9715l *machine = snd_soc_card_get_drvdata(card); + int srate, mclk; + int err; + + srate = params_rate(params); + + /* AC97 clock is really fixed */ + mclk = 24576000; + + err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk); + if (err < 0) { + if (!(machine->util_data.set_mclk % mclk)) + mclk = machine->util_data.set_mclk; + else { + dev_err(card->dev, "Can't configure clocks\n"); + return err; + } + } + + tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1); + +//DAS AC97 DAC to DAP switching already done at probe + + return 0; +} + +static int tegra_spdif_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_card *card = rtd->card; + struct colibri_t20_wm9715l *machine = snd_soc_card_get_drvdata(card); + int srate, mclk, min_mclk; + int err; + + srate = params_rate(params); + switch (srate) { + case 11025: + case 22050: + case 44100: + case 88200: + mclk = 11289600; + break; + case 8000: + case 16000: + case 32000: + case 48000: + case 64000: + case 96000: + mclk = 12288000; + break; + default: + return -EINVAL; + } + min_mclk = 128 * srate; + + err = tegra_asoc_utils_set_rate(&machine->util_data, srate, mclk); + if (err < 0) { + if (!(machine->util_data.set_mclk % min_mclk)) + mclk = machine->util_data.set_mclk; + else { + dev_err(card->dev, "Can't configure clocks\n"); + return err; + } + } + + tegra_asoc_utils_lock_clk_rate(&machine->util_data, 1); + + return 0; +} + +static int tegra_hw_free(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct colibri_t20_wm9715l *machine = snd_soc_card_get_drvdata(rtd->card); + + tegra_asoc_utils_lock_clk_rate(&machine->util_data, 0); + + return 0; +} + +static struct snd_soc_ops colibri_t20_wm9715l_ops = { + .hw_params = colibri_t20_wm9715l_hw_params, + .hw_free = tegra_hw_free, +}; + +static struct snd_soc_ops tegra_spdif_ops = { + .hw_params = tegra_spdif_hw_params, + .hw_free = tegra_hw_free, +}; + +static const struct snd_soc_dapm_widget colibri_t20_wm9715l_dapm_widgets[] = { + SND_SOC_DAPM_HP("HEADPHONE", NULL), + SND_SOC_DAPM_LINE("LINEIN", NULL), + SND_SOC_DAPM_MIC("MIC_IN", NULL), +}; + +/* Currently supported audio map */ +static const struct snd_soc_dapm_route colibri_t20_wm9715l_audio_map[] = { + /* Colibri SODIMM pin 1 (MIC_IN) + Colibri Evaluation Board: Audio jack X26 bottom pink + Iris: Audio header X9 pin 2 + Orchid: Audio jack X11 bottom pink MIC in */ + { "MIC_IN", NULL, "MIC1" }, + + /* Colibri SODIMM pin 5 & 7 (LINEIN_L/R) + Colibri Evaluation Board: Audio jack X26 top blue + Iris: Audio header X9 pin 4 & 3 + MECS Tellurium: Audio jack X11 pin 1 & 2 + Orchid: Audio jack X11 top blue line in */ + { "LINEIN", NULL, "LINEINL" }, + { "LINEIN", NULL, "LINEINR" }, + + /* Colibri SODIMM pin 15 & 17 (HEADPHONE_L/R) + Colibri Evaluation Board: Audio jack X26 middle green + Iris: Audio jack X8 + MECS Tellurium: Audio jack X11 pin 4 & 5 (HEADPHONE_LF/RF) + Orchid: Audio jack X11 middle green line out + Protea: Audio jack X53 line out */ + { "HEADPHONE", NULL, "LOUT2" }, + { "HEADPHONE", NULL, "ROUT2" }, +}; + +static int colibri_t20_wm9715l_init(struct snd_soc_pcm_runtime *rtd) +{ + int err; + struct snd_soc_codec *codec = rtd->codec; + struct snd_soc_dapm_context *dapm = &codec->dapm; + + pr_info("%s()\n", __func__); + +//GPIOs + + /* add Colibri T20 specific widgets */ + err = snd_soc_dapm_new_controls(dapm, colibri_t20_wm9715l_dapm_widgets, + ARRAY_SIZE(colibri_t20_wm9715l_dapm_widgets)); + if (err) + return err; + + /* set up Colibri T20 specific audio path audio_map */ + err = snd_soc_dapm_add_routes(dapm, colibri_t20_wm9715l_audio_map, ARRAY_SIZE(colibri_t20_wm9715l_audio_map)); + if (err) + return err; + +//jack detection + + /* connected pins */ + snd_soc_dapm_enable_pin(dapm, "HPOUTL"); + snd_soc_dapm_enable_pin(dapm, "HPOUTR"); + snd_soc_dapm_enable_pin(dapm, "LINEINL"); + snd_soc_dapm_enable_pin(dapm, "LINEINR"); + snd_soc_dapm_enable_pin(dapm, "MIC1"); + + /* not connected pins */ + snd_soc_dapm_nc_pin(dapm, "LOUT2"); + snd_soc_dapm_nc_pin(dapm, "MIC2"); + snd_soc_dapm_nc_pin(dapm, "MONOOUT"); + snd_soc_dapm_nc_pin(dapm, "OUT3"); + snd_soc_dapm_nc_pin(dapm, "PCBEEP"); + snd_soc_dapm_nc_pin(dapm, "PHONE"); + snd_soc_dapm_nc_pin(dapm, "ROUT2"); + + err = snd_soc_dapm_sync(dapm); + if (err) + return err; + + return 0; +} + +static struct snd_soc_dai_link colibri_t20_wm9715l_dai[] = { + { + .name = "AC97", +// .name = "AC97 HiFi", + .stream_name = "AC97 HiFi", + .cpu_dai_name = "tegra20-ac97-pcm", + .codec_dai_name = "wm9712-hifi", + .platform_name = "tegra-pcm-audio", + .codec_name = "wm9712-codec", + .init = colibri_t20_wm9715l_init, + .ops = &colibri_t20_wm9715l_ops, + }, +//order + { + .name = "SPDIF", + .stream_name = "SPDIF PCM", + .codec_name = "spdif-dit.0", + .platform_name = "tegra-pcm-audio", + .cpu_dai_name = "tegra20-spdif", + .codec_dai_name = "dit-hifi", + .ops = &tegra_spdif_ops, + }, +#if 0 + { + .name = "AC97 Aux", + .stream_name = "AC97 Aux", + .cpu_dai_name = "tegra20-ac97-modem", + .codec_dai_name = "wm9712-aux", + .platform_name = "tegra-pcm-audio", + .codec_name = "wm9712-codec", + }, +#endif +}; + +//power management + +static struct snd_soc_card snd_soc_colibri_t20_wm9715l = { + .name = "colibri_t20-wm9715l", + .dai_link = colibri_t20_wm9715l_dai, + .num_links = ARRAY_SIZE(colibri_t20_wm9715l_dai), +// .suspend_post = colibri_t20_wm9715l_suspend_post, +// .resume_pre = colibri_t20_wm9715l_resume_pre, +}; + +// +static struct platform_device *colibri_t20_snd_wm9715l_device; +// + +static __devinit int colibri_t20_wm9715l_driver_probe(struct platform_device *pdev) +{ + struct snd_soc_card *card = &snd_soc_colibri_t20_wm9715l; + struct colibri_t20_wm9715l *machine; + int ret; + + pr_info("%s()\n", __func__); + + if (!machine_is_colibri_t20()) + return -ENODEV; + +//make sure tegra20-ac97 is properly loaded to avoid subsequent crash + + machine = kzalloc(sizeof(struct colibri_t20_wm9715l), GFP_KERNEL); + if (!machine) { + dev_err(&pdev->dev, "Can't allocate colibri_t20_wm9715l struct\n"); + return -ENOMEM; + } + + ret = tegra_asoc_utils_init(&machine->util_data, &pdev->dev, card); + if (ret) + goto err_free_machine; + +//regulator handling + +//switch handling + + card->dev = &pdev->dev; + platform_set_drvdata(pdev, card); + snd_soc_card_set_drvdata(card, machine); + + /* explicitly instanciate AC97 codec */ + + colibri_t20_snd_wm9715l_device = platform_device_alloc("wm9712-codec", -1); + if (!colibri_t20_snd_wm9715l_device) { + dev_err(&pdev->dev, "platform_device_alloc of wm9712-codec failed (%d)\n", + ret); + goto err_fini_utils; + } + + ret = platform_device_add(colibri_t20_snd_wm9715l_device); + if (ret) { + dev_err(&pdev->dev, "platform_device_add of wm9712-codec failed (%d)\n", + ret); + goto err_fini_utils; + } + + ret = snd_soc_register_card(card); + if (ret) { + dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", + ret); + goto err_fini_utils; + } + + if (!card->instantiated) { + ret = -ENODEV; + dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", + ret); + goto err_unregister_card; + } + + return 0; + +err_unregister_card: + snd_soc_unregister_card(card); +err_fini_utils: + tegra_asoc_utils_fini(&machine->util_data); +err_free_machine: + kfree(machine); + return ret; +} + +static int __devexit colibri_t20_wm9715l_driver_remove(struct platform_device *pdev) +{ + struct snd_soc_card *card = platform_get_drvdata(pdev); + struct colibri_t20_wm9715l *machine = snd_soc_card_get_drvdata(card); + + snd_soc_unregister_card(card); + +//how to revert? +// platform_device_alloc("wm9712-codec"); + + tegra_asoc_utils_fini(&machine->util_data); + + kfree(machine); + + return 0; +} + +static struct platform_driver colibri_t20_wm9715l_driver = { + .driver = { + .name = DRV_NAME, + .owner = THIS_MODULE, +// .pm = &snd_soc_pm_ops, + }, + .probe = colibri_t20_wm9715l_driver_probe, + .remove = __devexit_p(colibri_t20_wm9715l_driver_remove), +}; + +static int __init colibri_t20_wm9715l_modinit(void) +{ + return platform_driver_register(&colibri_t20_wm9715l_driver); +} + +static void __exit colibri_t20_wm9715l_modexit(void) +{ + platform_driver_unregister(&colibri_t20_wm9715l_driver); +} + +module_init(colibri_t20_wm9715l_modinit); +module_exit(colibri_t20_wm9715l_modexit); + +/* Module information */ +MODULE_AUTHOR("Marcel Ziswiler <marcel.ziswiler@toradex.com>"); +MODULE_DESCRIPTION("ALSA SoC WM9715L on Toradex Colibri T20"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/sound/soc/tegra/tegra20_ac97.c b/sound/soc/tegra/tegra20_ac97.c new file mode 100644 index 000000000000..2682ff9fb391 --- /dev/null +++ b/sound/soc/tegra/tegra20_ac97.c @@ -0,0 +1,654 @@ +/* + * sound/soc/tegra/tegra20_ac97.c + * + * Copyright (C) 2012 Toradex, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/slab.h> + +#include <mach/ac97.h> +#include <mach/audio.h> +#include <mach/dma.h> +#include <mach/gpio.h> +#include <mach/iomap.h> + +#include <sound/ac97_codec.h> +#include <sound/core.h> +#include <sound/initval.h> +#include <sound/pcm_params.h> +#include <sound/pcm.h> +#include <sound/soc.h> + +#include "../../../arch/arm/mach-tegra/gpio-names.h" +#include "tegra_pcm.h" +#include "tegra20_ac97.h" +#include "tegra20_das.h" + +#define DRV_NAME "tegra20-ac97" + +//required? +static DEFINE_MUTEX(car_mutex); + +#define check_ifc(n, ...) if ((n) > TEGRA_DAI_AC97_MODEM) { \ + pr_err("%s: invalid AC97 interface %d\n", __func__, (n)); \ + return __VA_ARGS__; \ +} + +/* required due to AC97 codec drivers not adhering to proper platform driver + model */ +static struct tegra20_ac97 *ac97; + +static int tegra20_ac97_set_fmt(struct snd_soc_dai *dai, + unsigned int fmt) +{ +pr_info("%s %u fmt=%d", __func__, __LINE__, fmt); + return 0; +} + +phys_addr_t ac97_get_fifo_phy_base(struct tegra20_ac97 *ac97, int ifc, int fifo) +{ + check_ifc(ifc, 0); + + if (ifc == TEGRA_DAI_AC97_PCM) + return (phys_addr_t)ac97->phys + (fifo ? AC_AC_FIFO_IN1_0 : AC_AC_FIFO_OUT1_0); + else + return (phys_addr_t)ac97->phys + (fifo ? AC_AC_FIFO_IN2_0 : AC_AC_FIFO_OUT2_0); +} + +static int tegra20_ac97_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct tegra20_ac97 *ac97 = snd_soc_dai_get_drvdata(dai); + + pr_info("%s(): dai->id=%d, %s\n", __func__, dai->id, (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)?"play":"rec"); + +//TODO: adaptable sample size + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + ac97->playback_dma_data.addr = + ac97_get_fifo_phy_base(ac97, dai->id, AC97_FIFO_TX); + ac97->playback_dma_data.wrap = 4; + ac97->playback_dma_data.width = 32; + } else { + ac97->capture_dma_data.addr = + ac97_get_fifo_phy_base(ac97, dai->id, AC97_FIFO_RX); + ac97->capture_dma_data.wrap = 4; + ac97->capture_dma_data.width = 32; + } + + return 0; +} + +int ac97_fifo_set_attention_level(struct tegra20_ac97 *ac97, int ifc, int fifo, unsigned level) +{ + u32 val; + + pr_info("%s()\n", __func__); + + check_ifc(ifc, -EINVAL); + + if (ifc == TEGRA_DAI_AC97_PCM) + val = readl(ac97->regs + AC_AC_FIFO1_SCR_0); + else + val = readl(ac97->regs + AC_AC_FIFO2_SCR_0); + + if (fifo) { + val &= ~(AC_AC_FIFOx_SCR_REC_FIFOx_FULL_EN | + AC_AC_FIFOx_SCR_REC_FIFOx_3QRT_FULL_EN | + AC_AC_FIFOx_SCR_REC_FIFOx_QRT_FULL_EN | + AC_AC_FIFOx_SCR_REC_FIFOx_NOT_MT_EN); + switch (level) { + case AC97_FIFO_ATN_LVL_NONE: + break; + case AC97_FIFO_ATN_LVL_FULL: + val |= AC_AC_FIFOx_SCR_REC_FIFOx_FULL_EN; + break; + case AC97_FIFO_ATN_LVL_3QUART: + val |= AC_AC_FIFOx_SCR_REC_FIFOx_3QRT_FULL_EN; + break; + case AC97_FIFO_ATN_LVL_QUART: + val |= AC_AC_FIFOx_SCR_REC_FIFOx_QRT_FULL_EN; + break; + case AC97_FIFO_ATN_LVL_EMPTY: + val |= AC_AC_FIFOx_SCR_REC_FIFOx_NOT_MT_EN; + break; + default: + pr_err("%s: invalid FIFO level selector %d\n", __func__, + level); + return -EINVAL; + } + } + else { + val &= ~(AC_AC_FIFOx_SCR_PB_FIFOx_NOT_FULL_EN | + AC_AC_FIFOx_SCR_PB_FIFOx_QRT_MT_EN | + AC_AC_FIFOx_SCR_PB_FIFOx_3QRT_MT_EN | + AC_AC_FIFOx_SCR_PB_FIFOx_MT_EN); + switch (level) { + case AC97_FIFO_ATN_LVL_NONE: + break; + case AC97_FIFO_ATN_LVL_FULL: + val |= AC_AC_FIFOx_SCR_PB_FIFOx_NOT_FULL_EN; + break; + case AC97_FIFO_ATN_LVL_3QUART: + val |= AC_AC_FIFOx_SCR_PB_FIFOx_3QRT_MT_EN; + break; + case AC97_FIFO_ATN_LVL_QUART: + val |= AC_AC_FIFOx_SCR_PB_FIFOx_QRT_MT_EN; + break; + case AC97_FIFO_ATN_LVL_EMPTY: + val |= AC_AC_FIFOx_SCR_PB_FIFOx_MT_EN; + break; + default: + pr_err("%s: invalid FIFO level selector %d\n", __func__, + level); + return -EINVAL; + } + } + + if (ifc == TEGRA_DAI_AC97_PCM) + writel(val, ac97->regs + AC_AC_FIFO1_SCR_0); + else + writel(val, ac97->regs + AC_AC_FIFO2_SCR_0); + + return 0; +} + +void ac97_slot_enable(struct tegra20_ac97 *ac97, int ifc, int fifo, int on) +{ + pr_info("%s()\n", __func__); + + check_ifc(ifc); + + if (!fifo) { + u32 val; + + val = readl(ac97->regs + AC_AC_CTRL_0); + + if (ifc == TEGRA_DAI_AC97_PCM) + if (on) { +#ifndef TEGRA_AC97_32BIT_PLAYBACK + /* Enable packed mode for now */ + val |= AC_AC_CTRL_STM_EN; +#endif + val |= AC_AC_CTRL_PCM_DAC_EN; + } else + val &= ~AC_AC_CTRL_PCM_DAC_EN; + else + if (on) { +#ifndef TEGRA_AC97_32BIT_PLAYBACK + /* Enable packed mode for now */ + val |= AC_AC_CTRL_STM2_EN; +#endif + val |= AC_AC_CTRL_LINE1_DAC_EN; + } else + val &= ~AC_AC_CTRL_LINE1_DAC_EN; + + writel(val, ac97->regs + AC_AC_CTRL_0); + } +} + +/* playback */ +static inline void tegra20_ac97_start_playback(struct snd_soc_dai *cpu_dai) +{ + struct tegra20_ac97 *ac97 = snd_soc_dai_get_drvdata(cpu_dai); + + pr_info("%s()\n", __func__); + + ac97_fifo_set_attention_level(ac97, cpu_dai->id, AC97_FIFO_TX, + /* Only FIFO level proven stable for video playback */ +#ifdef TEGRA_AC97_32BIT_PLAYBACK + AC97_FIFO_ATN_LVL_QUART); +#else + AC97_FIFO_ATN_LVL_EMPTY); +#endif + ac97_slot_enable(ac97, cpu_dai->id, AC97_FIFO_TX, 1); +} + +static inline void tegra20_ac97_stop_playback(struct snd_soc_dai *cpu_dai) +{ + struct tegra20_ac97 *ac97 = snd_soc_dai_get_drvdata(cpu_dai); + int delay_cnt = 10; /* 1ms max wait for fifo to drain */ + + pr_info("%s()\n", __func__); + + ac97_fifo_set_attention_level(ac97, cpu_dai->id, AC97_FIFO_TX, + AC97_FIFO_ATN_LVL_NONE); + +//something wrong? + while (!(readl(ac97->regs + AC_AC_CTRL_0) & + AC_AC_FIFOx_SCR_PB_FIFOx_UNDERRUN_INT_STA) && + delay_cnt) + { + udelay(100); + delay_cnt--; + } + + ac97_slot_enable(ac97, cpu_dai->id, AC97_FIFO_TX, 0); +} + +/* recording */ +static inline void tegra20_ac97_start_capture(struct snd_soc_dai *cpu_dai) +{ + struct tegra20_ac97 *ac97 = snd_soc_dai_get_drvdata(cpu_dai); +//check slot validity in received tag information + ac97_fifo_set_attention_level(ac97, cpu_dai->id, AC97_FIFO_RX, + AC97_FIFO_ATN_LVL_FULL); +} + +static inline void tegra20_ac97_stop_capture(struct snd_soc_dai *cpu_dai) +{ + struct tegra20_ac97 *ac97 = snd_soc_dai_get_drvdata(cpu_dai); + ac97_fifo_set_attention_level(ac97, cpu_dai->id, AC97_FIFO_RX, + AC97_FIFO_ATN_LVL_NONE); + +//wait? +} + +static int tegra20_ac97_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + int ret = 0; + + pr_info("%s()\n", __func__); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + tegra20_ac97_start_playback(dai); + else + tegra20_ac97_start_capture(dai); + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + tegra20_ac97_stop_playback(dai); + else + tegra20_ac97_stop_capture(dai); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static void tegra20_ac97_reset(struct snd_ac97 *ac97) +{ + int gpio_status; + + pr_info("%s()\n", __func__); + + /* do wolfson hard reset */ +#define GPIO_AC97_nRESET TEGRA_GPIO_PV0 + gpio_status = gpio_request(GPIO_AC97_nRESET, "WOLFSON_RESET"); + if (gpio_status < 0) { + pr_info("WOLFSON_RESET request GPIO FAILED\n"); + WARN_ON(1); + } + tegra_gpio_enable(GPIO_AC97_nRESET); + gpio_status = gpio_direction_output(GPIO_AC97_nRESET, 0); + if (gpio_status < 0) { + pr_info("WOLFSON_RESET request GPIO DIRECTION FAILED\n"); + WARN_ON(1); + } + udelay(2); + gpio_set_value(GPIO_AC97_nRESET, 1); + udelay(2); +} + +static void tegra20_ac97_warm_reset(struct snd_ac97 *ac97) +{ + int gpio_status; + + pr_info("%s()\n", __func__); + + /* do wolfson warm reset by toggling SYNC */ +#define GPIO_AC97_SYNC TEGRA_GPIO_PP0 + gpio_status = gpio_request(GPIO_AC97_SYNC, "WOLFSON_SYNC"); + if (gpio_status < 0) { + pr_info("WOLFSON_SYNC request GPIO FAILED\n"); + WARN_ON(1); + } + tegra_gpio_enable(GPIO_AC97_SYNC); + gpio_status = gpio_direction_output(GPIO_AC97_SYNC, 1); + if (gpio_status < 0) { + pr_info("WOLFSON_SYNC request GPIO DIRECTION FAILED\n"); + WARN_ON(1); + } + udelay(2); + gpio_set_value(GPIO_AC97_SYNC, 0); + udelay(2); + gpio_free(GPIO_AC97_SYNC); + tegra_gpio_disable(GPIO_AC97_SYNC); +} + +static unsigned short tegra20_ac97_read(struct snd_ac97 *ac97_snd, unsigned short reg) +{ +// struct tegra20_ac97 *ac97 = ac97_snd->private_data; + u32 val; + int timeout = 100; + +//pr_info("%s(0x%04x)", __func__, reg); + +// mutex_lock(&car_mutex); + + /* Set MSB=1 to indicate Read Command! */ + writel((((reg | 0x80) << AC_AC_CMD_CMD_ADDR_SHIFT) & + AC_AC_CMD_CMD_ADDR_MASK) | + /* Set Busy Bit to start Command!! */ + AC_AC_CMD_BUSY, ac97->regs + AC_AC_CMD_0); + + while (!((val = readl(ac97->regs + AC_AC_STATUS1_0)) & + AC_AC_STATUS1_STA_VALID1) && timeout--) + mdelay(1); + +// mutex_unlock(&car_mutex); + +//pr_info(" = 0x%04x\n", (val & AC_AC_STATUS1_STA_DATA1_MASK) >> AC_AC_STATUS1_STA_DATA1_SHIFT); + + return (val & AC_AC_STATUS1_STA_DATA1_MASK) >> + AC_AC_STATUS1_STA_DATA1_SHIFT; +} + +static void tegra20_ac97_write(struct snd_ac97 *ac97_snd, unsigned short reg, + unsigned short val) +{ +// struct tegra20_ac97 *ac97 = ac97_snd->private_data; + int timeout = 100; + +//pr_info("%s(0x%04x, 0x%04x)\n", __func__, reg, val); + +// mutex_lock(&car_mutex); + + writel(((reg << AC_AC_CMD_CMD_ADDR_SHIFT) & AC_AC_CMD_CMD_ADDR_MASK) | + ((val << AC_AC_CMD_CMD_DATA_SHIFT) & + AC_AC_CMD_CMD_DATA_MASK) | + /* Set Busy Bit to start Command!! */ + AC_AC_CMD_BUSY, ac97->regs + AC_AC_CMD_0); + + while (((val = readl(ac97->regs + AC_AC_CMD_0)) & + AC_AC_CMD_BUSY) && timeout--) + mdelay(1); + +// mutex_unlock(&car_mutex); +} + +/* required by sound/soc/codecs/wm9712.c */ +struct snd_ac97_bus_ops soc_ac97_ops = { + .read = tegra20_ac97_read, + .reset = tegra20_ac97_reset, + .warm_reset = tegra20_ac97_warm_reset, + .write = tegra20_ac97_write, +}; +EXPORT_SYMBOL_GPL(soc_ac97_ops); + +static struct snd_ac97_bus_ops tegra20_ac97_ops = { + .read = tegra20_ac97_read, + /* reset already done above */ + .write = tegra20_ac97_write, +}; + +static int tegra20_ac97_probe(struct snd_soc_dai *dai) +{ +//hw_probe: reset GPIO, clk_get, clk_enable, request_irq + struct tegra20_ac97 *ac97 = snd_soc_dai_get_drvdata(dai); + + pr_info("%s()\n", __func__); + pr_info("ac97->capture_dma_data=%p\n", &ac97->capture_dma_data); + pr_info("ac97->playback_dma_data=%p\n", &ac97->playback_dma_data); + + dai->capture_dma_data = &ac97->capture_dma_data; + dai->playback_dma_data = &ac97->playback_dma_data; + + return 0; +} + +//TODO: power management + +static struct snd_soc_dai_ops tegra20_ac97_dai_ops = { + .hw_params = tegra20_ac97_hw_params, +// + .set_fmt = tegra20_ac97_set_fmt, +// + .trigger = tegra20_ac97_trigger, +}; + +struct snd_soc_dai_driver tegra20_ac97_dai[] = { + { + .name = DRV_NAME "-pcm", +// .id = 0, + .probe = tegra20_ac97_probe, +//.resume + .playback = { +// .stream_name = "AC97 PCM Playback", + .channels_min = 1, + .channels_max = 2, + .rates = AC97_SAMPLE_RATES, +#ifndef TEGRA_AC97_32BIT_PLAYBACK + .formats = SNDRV_PCM_FMTBIT_S16_LE, +#else + .formats = SNDRV_PCM_FMTBIT_S32_LE, +#endif + }, + .capture = { +// .stream_name = "AC97 PCM Recording", + .channels_min = 1, + .channels_max = 2, + .rates = AC97_SAMPLE_RATES, + .formats = SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &tegra20_ac97_dai_ops, + .symmetric_rates = 1, + }, +#if 0 + { + .name = DRV_NAME "-modem", +// .id = 1, + .playback = { + .stream_name = "AC97 Modem Playback", + .channels_min = 1, + .channels_max = 1, + .rates = AC97_SAMPLE_RATES, +#ifndef TEGRA_AC97_32BIT_PLAYBACK + .formats = SNDRV_PCM_FMTBIT_S16_LE, +#else + .formats = SNDRV_PCM_FMTBIT_S32_LE, +#endif + }, + .capture = { + .stream_name = "AC97 Modem Recording", + .channels_min = 1, + .channels_max = 1, + .rates = AC97_SAMPLE_RATES, + .formats = SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &tegra20_ac97_dai_ops, + .symmetric_rates = 1, + }, +#endif +}; + +static __devinit int tegra20_ac97_platform_probe(struct platform_device *pdev) +{ + struct resource *mem, *memregion, *dmareq; + int ret; + struct snd_ac97_bus *ac97_bus; + + pr_info("%s()\n", __func__); + + ac97 = kzalloc(sizeof(struct tegra20_ac97), GFP_KERNEL); + if (!ac97) { + dev_err(&pdev->dev, "Can't allocate tegra20_ac97\n"); + ret = -ENOMEM; + goto exit; + } + dev_set_drvdata(&pdev->dev, ac97); + + ac97->clk_ac97 = clk_get(&pdev->dev, NULL); + if (IS_ERR(ac97->clk_ac97)) { + dev_err(&pdev->dev, "Can't retrieve AC97 clock\n"); + ret = PTR_ERR(ac97->clk_ac97); + goto err_free; + } + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!mem) { + dev_err(&pdev->dev, "No memory resource\n"); + ret = -ENODEV; + goto err_clk_put; + } + ac97->phys = mem->start; + + dmareq = platform_get_resource(pdev, IORESOURCE_DMA, 0); + if (!dmareq) { + dev_err(&pdev->dev, "No DMA resource\n"); + ret = -ENODEV; + goto err_clk_put; + } + + memregion = request_mem_region(mem->start, resource_size(mem), + DRV_NAME); + if (!memregion) { + dev_err(&pdev->dev, "Memory region already claimed\n"); + ret = -EBUSY; + goto err_clk_put; + } + + ac97->regs = ioremap(mem->start, resource_size(mem)); + if (!ac97->regs) { + dev_err(&pdev->dev, "ioremap failed\n"); + ret = -ENOMEM; + goto err_release; + } + + ac97->capture_dma_data.req_sel = dmareq->start; + ac97->playback_dma_data.req_sel = dmareq->start; + + ret = snd_soc_register_dais(&pdev->dev, tegra20_ac97_dai, ARRAY_SIZE(tegra20_ac97_dai)); + if (ret) { + dev_err(&pdev->dev, "Could not register DAIs\n"); + goto err_unmap; + } + +//required? +#if 1 +//use 1 in order for actual card to get 0 which is used as default e.g. in Android +// ret = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, + ret = snd_card_create(1, SNDRV_DEFAULT_STR1, + THIS_MODULE, 0, &ac97->card); + if (ret < 0) { + dev_err(&pdev->dev, "failed creating snd_card!\n"); + goto err_create; + } + + ac97->card->dev = &pdev->dev; + strncpy(ac97->card->driver, pdev->dev.driver->name, sizeof(ac97->card->driver)); +#endif + +pr_info("%s() %u\n", __func__, __LINE__); + /* put propper DAC to DAP DAS path in place */ + + ret = tegra20_das_connect_dac_to_dap(TEGRA20_DAS_DAP_SEL_DAC3, + TEGRA20_DAS_DAP_ID_3); + if (ret < 0) { + dev_err(&pdev->dev, "failed to set dap-dac path\n"); + goto err_create; + } + + ret = tegra20_das_connect_dap_to_dac(TEGRA20_DAS_DAP_ID_3, + TEGRA20_DAS_DAP_SEL_DAC3); + if (ret < 0) { + dev_err(&pdev->dev, "failed to set dac-dap path\n"); + goto err_create; + } + +pr_info("%s() %u\n", __func__, __LINE__); + ret = snd_ac97_bus(ac97->card, 0, &tegra20_ac97_ops, NULL, &ac97_bus); + if (ret) { + dev_err(&pdev->dev, "failed registerign ac97_bus!\n"); + goto err_create; + } + + return 0; + +err_create: + snd_card_free(ac97->card); +err_unmap: + iounmap(ac97->regs); +err_release: + release_mem_region(mem->start, resource_size(mem)); +err_clk_put: + clk_put(ac97->clk_ac97); +err_free: + kfree(ac97); +exit: +pr_info("%s() %u\n", __func__, __LINE__); + return ret; +} + +static int __devexit tegra20_ac97_platform_remove(struct platform_device *pdev) +{ + struct tegra20_ac97 *ac97 = dev_get_drvdata(&pdev->dev); + struct resource *res; + + snd_card_free(ac97->card); + + snd_soc_unregister_dai(&pdev->dev); + + iounmap(ac97->regs); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + release_mem_region(res->start, resource_size(res)); + + clk_put(ac97->clk_ac97); + + kfree(ac97); + + return 0; +} + +static struct platform_driver tegra20_ac97_driver = { + .driver = { + .name = DRV_NAME, + .owner = THIS_MODULE, + }, + .probe = tegra20_ac97_platform_probe, + .remove = __devexit_p(tegra20_ac97_platform_remove), +}; + +static int __init snd_tegra20_ac97_init(void) +{ + return platform_driver_register(&tegra20_ac97_driver); +} +module_init(snd_tegra20_ac97_init); + +static void __exit snd_tegra20_ac97_exit(void) +{ + platform_driver_unregister(&tegra20_ac97_driver); +} +module_exit(snd_tegra20_ac97_exit); + +MODULE_AUTHOR("Marcel Ziswiler <marcel.ziswiler@toradex.com>"); +MODULE_DESCRIPTION("Tegra AC97 ASoC driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/sound/soc/tegra/tegra20_ac97.h b/sound/soc/tegra/tegra20_ac97.h new file mode 100644 index 000000000000..430ecc1500f4 --- /dev/null +++ b/sound/soc/tegra/tegra20_ac97.h @@ -0,0 +1,43 @@ +/* + * linux/sound/soc/tegra/tegra20_ac97.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _TEGRA_AC97_H +#define _TEGRA_AC97_H + +#include "tegra_pcm.h" + +/* Tegra DAI ID's */ +#define TEGRA_DAI_AC97_PCM 0 /* slot 3: PCM left channel */ + /* slot 4: PCM right channel */ +#define TEGRA_DAI_AC97_MODEM 1 /* slot 5: modem line 1 */ + + /* slot 11: touch panel digitizer data */ + +#define AC97_FIFO_ATN_LVL_NONE 0 +#define AC97_FIFO_ATN_LVL_EMPTY 1 +#define AC97_FIFO_ATN_LVL_QUART 2 +#define AC97_FIFO_ATN_LVL_3QUART 3 +#define AC97_FIFO_ATN_LVL_FULL 4 + +#define AC97_FIFO_TX 0 +#define AC97_FIFO_RX 1 + +#define AC97_SAMPLE_RATES SNDRV_PCM_RATE_8000_48000 + +/* AC97 controller */ +struct tegra20_ac97 { + struct clk *dap_mclk; + struct clk *clk_ac97; + struct snd_card *card; + struct tegra_pcm_dma_params capture_dma_data; + phys_addr_t phys; + struct tegra_pcm_dma_params playback_dma_data; + void __iomem *regs; +}; + +#endif |