diff options
| -rw-r--r-- | arch/powerpc/oprofile/op_model_fsl_emb.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/arch/powerpc/oprofile/op_model_fsl_emb.c b/arch/powerpc/oprofile/op_model_fsl_emb.c index 62312abffa28..d4e6507277b5 100644 --- a/arch/powerpc/oprofile/op_model_fsl_emb.c +++ b/arch/powerpc/oprofile/op_model_fsl_emb.c @@ -2,7 +2,7 @@ * Freescale Embedded oprofile support, based on ppc64 oprofile support * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM * - * Copyright (c) 2004 Freescale Semiconductor, Inc + * Copyright (c) 2004, 2010 Freescale Semiconductor, Inc * * Author: Andy Fleming * Maintainer: Kumar Gala <galak@kernel.crashing.org> @@ -321,9 +321,6 @@ static void fsl_emb_handle_interrupt(struct pt_regs *regs, int val; int i; - /* set the PMM bit (see comment below) */ - mtmsr(mfmsr() | MSR_PMM); - pc = regs->nip; is_kernel = is_kernel_addr(pc); @@ -340,9 +337,13 @@ static void fsl_emb_handle_interrupt(struct pt_regs *regs, } /* The freeze bit was set by the interrupt. */ - /* Clear the freeze bit, and reenable the interrupt. - * The counters won't actually start until the rfi clears - * the PMM bit */ + /* Clear the freeze bit, and reenable the interrupt. The + * counters won't actually start until the rfi clears the PMM + * bit. The PMM bit should not be set until after the interrupt + * is cleared to avoid it getting lost in some hypervisor + * environments. + */ + mtmsr(mfmsr() | MSR_PMM); pmc_start_ctrs(1); } |