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-rw-r--r--arch/arm/mach-tegra/edp.c12
-rw-r--r--arch/arm/mach-tegra/edp_core.c2
-rw-r--r--arch/arm/mach-tegra/fuse.h5
-rw-r--r--arch/arm/mach-tegra/platsmp.c8
-rw-r--r--arch/arm/mach-tegra/powergate.c9
-rw-r--r--arch/arm/mach-tegra/reset.c2
-rw-r--r--arch/arm/mach-tegra/tegra11_soctherm.c13
7 files changed, 25 insertions, 26 deletions
diff --git a/arch/arm/mach-tegra/edp.c b/arch/arm/mach-tegra/edp.c
index 125f6f2b6f9f..0fe849d18567 100644
--- a/arch/arm/mach-tegra/edp.c
+++ b/arch/arm/mach-tegra/edp.c
@@ -25,7 +25,9 @@
#include <linux/module.h>
#include <linux/uaccess.h>
#include <linux/edp.h>
+
#include <mach/edp.h>
+#include <mach/hardware.h>
#include "fuse.h"
#include "dvfs.h"
@@ -811,7 +813,7 @@ static int __init init_cpu_edp_limits_lookup(void)
void tegra_recalculate_cpu_edp_limits(void)
{
- if (tegra_chip_id == TEGRA11X)
+ if (tegra_chip_id == TEGRA_CHIPID_TEGRA11)
init_cpu_edp_limits_calculated();
}
@@ -826,16 +828,16 @@ void __init tegra_init_cpu_edp_limits(unsigned int regulator_mA)
regulator_cur = regulator_mA + OVERRIDE_DEFAULT;
switch (tegra_chip_id) {
- case TEGRA30:
+ case TEGRA_CHIPID_TEGRA3:
if (init_cpu_edp_limits_lookup() == 0)
return;
break;
- case TEGRA11X:
- case TEGRA14X:
+ case TEGRA_CHIPID_TEGRA11:
+ case TEGRA_CHIPID_TEGRA14:
if (init_cpu_edp_limits_calculated() == 0)
return;
break;
- case TEGRA20:
+ case TEGRA_CHIPID_TEGRA2:
default:
BUG();
break;
diff --git a/arch/arm/mach-tegra/edp_core.c b/arch/arm/mach-tegra/edp_core.c
index 1909dd67b45c..afc0fd3c3c75 100644
--- a/arch/arm/mach-tegra/edp_core.c
+++ b/arch/arm/mach-tegra/edp_core.c
@@ -170,7 +170,7 @@ void __init tegra_init_core_edp_limits(unsigned int regulator_mA)
unsigned long *cap_rates;
switch (tegra_chip_id) {
- case TEGRA11X:
+ case TEGRA_CHIPID_TEGRA11:
if (tegra11x_select_core_edp_table(
regulator_mA, &core_edp_limits))
return;
diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h
index c817689f82d5..7ebf1c77d3b9 100644
--- a/arch/arm/mach-tegra/fuse.h
+++ b/arch/arm/mach-tegra/fuse.h
@@ -92,11 +92,6 @@
#define SKU_ID_AP25E 27
#define SKU_ID_T25E 28
-#define TEGRA20 0x20
-#define TEGRA30 0x30
-#define TEGRA11X 0x35
-#define TEGRA14X 0x14
-
#define SBK_DEVKEY_STATUS_SZ sizeof(u32)
/*
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 79a39ffee6b4..ca567f0cf0e0 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -308,7 +308,7 @@ static int __cpuinit tegra_boot_secondary(unsigned int cpu, struct task_struct *
#endif
switch (tegra_chip_id) {
- case TEGRA20:
+ case TEGRA_CHIPID_TEGRA2:
/*
* Unhalt the CPU. If the flow controller was used to power-gate
* the CPU this will cause the flow controller to stop driving
@@ -318,7 +318,7 @@ static int __cpuinit tegra_boot_secondary(unsigned int cpu, struct task_struct *
flowctrl_write_cpu_halt(cpu, 0);
status = tegra20_power_up_cpu(cpu);
break;
- case TEGRA30:
+ case TEGRA_CHIPID_TEGRA3:
/*
* Unhalt the CPU. If the flow controller was used to power-gate
* the CPU this will cause the flow controller to stop driving
@@ -328,8 +328,8 @@ static int __cpuinit tegra_boot_secondary(unsigned int cpu, struct task_struct *
flowctrl_write_cpu_halt(cpu, 0);
status = tegra30_power_up_cpu(cpu);
break;
- case TEGRA11X:
- case TEGRA14X:
+ case TEGRA_CHIPID_TEGRA11:
+ case TEGRA_CHIPID_TEGRA14:
status = tegra11x_power_up_cpu(cpu);
break;
default:
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index d03ee145a3d8..7639a4cf4f1f 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -34,6 +34,7 @@
#include <asm/atomic.h>
#include <mach/powergate.h>
+#include <mach/hardware.h>
#include "clock.h"
#include "fuse.h"
@@ -555,19 +556,19 @@ EXPORT_SYMBOL(tegra_powergate_get_name);
int __init tegra_powergate_init(void)
{
switch (tegra_chip_id) {
- case TEGRA20:
+ case TEGRA_CHIPID_TEGRA2:
pg_ops = tegra2_powergate_init_chip_support();
break;
- case TEGRA30:
+ case TEGRA_CHIPID_TEGRA3:
pg_ops = tegra3_powergate_init_chip_support();
break;
- case TEGRA11X:
+ case TEGRA_CHIPID_TEGRA11:
pg_ops = tegra11x_powergate_init_chip_support();
break;
- case TEGRA14X:
+ case TEGRA_CHIPID_TEGRA14:
pg_ops = tegra14x_powergate_init_chip_support();
break;
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index e7d8fe081ccc..44a9366ac2c7 100644
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -63,7 +63,7 @@ static void tegra_cpu_reset_handler_enable(void)
* Prevent further modifications to the physical reset vector.
* NOTE: Has no effect on chips prior to Tegra30.
*/
- if (tegra_chip_id != TEGRA20) {
+ if (tegra_chip_id != TEGRA_CHIPID_TEGRA2) {
reg = readl(sb_ctrl);
reg |= 2;
writel(reg, sb_ctrl);
diff --git a/arch/arm/mach-tegra/tegra11_soctherm.c b/arch/arm/mach-tegra/tegra11_soctherm.c
index 0e1edd1c9bfd..1bae3eb1e15f 100644
--- a/arch/arm/mach-tegra/tegra11_soctherm.c
+++ b/arch/arm/mach-tegra/tegra11_soctherm.c
@@ -1192,11 +1192,11 @@ static int __init soctherm_clk_init(void)
/* initialize default clock rates */
default_soctherm_clk_rate =
- tegra_chip_id == TEGRA14X ?
+ tegra_chip_id == TEGRA_CHIPID_TEGRA14 ?
default_t14x_soctherm_clk_rate :
default_t11x_soctherm_clk_rate;
default_tsensor_clk_rate =
- tegra_chip_id == TEGRA14X ?
+ tegra_chip_id == TEGRA_CHIPID_TEGRA14 ?
default_t14x_tsensor_clk_rate :
default_t11x_tsensor_clk_rate;
@@ -1252,7 +1252,7 @@ static void soctherm_fuse_read_vsensor(void)
calib_ft = MAKE_SIGNED32(calib_ft, FUSE_SHIFT_FT_BITS);
nominal_calib_cp = 25;
- nominal_calib_ft = tegra_chip_id == TEGRA14X ? 105 : 90;
+ nominal_calib_ft = tegra_chip_id == TEGRA_CHIPID_TEGRA14 ? 105 : 90;
/* use HI precision to calculate: use fuse_temp in 0.5C */
actual_temp_cp = 2 * nominal_calib_cp + calib_cp;
@@ -1312,7 +1312,7 @@ static void soctherm_fuse_read_tsensor(enum soctherm_sense sensor)
(s64)delta_sens);
/* FUSE corrections for T114 when precision is set LOW */
- if (tegra_chip_id == TEGRA11X && PRECISION_IS_LOWER()) {
+ if (tegra_chip_id == TEGRA_CHIPID_TEGRA11 && PRECISION_IS_LOWER()) {
fuse_corr_alpha[sensor] = fuse_corr_alpha[sensor] ?: 1000000;
therm_a = div64_s64_precise(
(s64)therm_a * fuse_corr_alpha[sensor],
@@ -1379,7 +1379,7 @@ static int soctherm_init_platform_data(void)
long rem;
u32 r;
- sensor_defaults = tegra_chip_id == TEGRA14X ?
+ sensor_defaults = tegra_chip_id == TEGRA_CHIPID_TEGRA14 ?
default_t14x_sensor_params : default_t11x_sensor_params;
/* initialize default values for unspecified params */
@@ -1539,7 +1539,8 @@ int __init tegra11_soctherm_init(struct soctherm_platform_data *data)
{
int err;
- if (!(tegra_chip_id == TEGRA11X || tegra_chip_id == TEGRA14X)) {
+ if (!(tegra_chip_id == TEGRA_CHIPID_TEGRA11 ||
+ tegra_chip_id == TEGRA_CHIPID_TEGRA14)) {
pr_err("%s: Unknown chip_id %d", __func__, tegra_chip_id);
return -1;
}
generated by cgit v1.2.3 (git 2.0.4) at 2024-11-16 04:24:28 +0000