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-rw-r--r--drivers/media/video/mxc/capture/adv7180.c38
-rw-r--r--drivers/media/video/mxc/capture/mxc_v4l2_capture.c15
-rw-r--r--drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h3
-rw-r--r--drivers/mxc/ipu3/ipu_capture.c31
4 files changed, 28 insertions, 59 deletions
diff --git a/drivers/media/video/mxc/capture/adv7180.c b/drivers/media/video/mxc/capture/adv7180.c
index 70c65129c942..3c12fdc7d14c 100644
--- a/drivers/media/video/mxc/capture/adv7180.c
+++ b/drivers/media/video/mxc/capture/adv7180.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -21,16 +21,11 @@
#include <linux/module.h>
#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/ctype.h>
#include <linux/types.h>
#include <linux/delay.h>
-#include <linux/semaphore.h>
#include <linux/device.h>
#include <linux/i2c.h>
-#include <linux/wait.h>
#include <linux/videodev2.h>
-#include <linux/workqueue.h>
#include <linux/regulator/consumer.h>
#include <linux/fsl_devices.h>
#include <media/v4l2-chip-ident.h>
@@ -238,10 +233,6 @@ static void adv7180_get_std(v4l2_std_id *std)
dev_dbg(&adv7180_data.sen.i2c_client->dev, "In adv7180_get_std\n");
- /* Make sure power on */
- if (tvin_plat->pwdn)
- tvin_plat->pwdn(0);
-
/* Read the AD_RESULT to get the detect output video standard */
tmp = adv7180_read(ADV7180_STATUS_1) & 0x70;
@@ -332,13 +323,14 @@ static int ioctl_s_power(struct v4l2_int_device *s, int on)
if (on && !sensor->sen.on) {
gpio_sensor_active();
-
- /* Make sure pwoer on */
- if (tvin_plat->pwdn)
- tvin_plat->pwdn(0);
-
- if (adv7180_write_reg(ADV7180_PWR_MNG, 0) != 0)
+ if (adv7180_write_reg(ADV7180_PWR_MNG, 0x04) != 0)
return -EIO;
+
+ /*
+ * FIXME:Additional 400ms to wait the chip to be stable?
+ * This is a workaround for preview scrolling issue.
+ */
+ msleep(400);
} else if (!on && sensor->sen.on) {
if (adv7180_write_reg(ADV7180_PWR_MNG, 0x24) != 0)
return -EIO;
@@ -503,10 +495,6 @@ static int ioctl_g_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc)
dev_dbg(&adv7180_data.sen.i2c_client->dev, "In adv7180:ioctl_g_ctrl\n");
- /* Make sure power on */
- if (tvin_plat->pwdn)
- tvin_plat->pwdn(0);
-
switch (vc->id) {
case V4L2_CID_BRIGHTNESS:
dev_dbg(&adv7180_data.sen.i2c_client->dev,
@@ -601,10 +589,6 @@ static int ioctl_s_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc)
dev_dbg(&adv7180_data.sen.i2c_client->dev, "In adv7180:ioctl_s_ctrl\n");
- /* Make sure power on */
- if (tvin_plat->pwdn)
- tvin_plat->pwdn(0);
-
switch (vc->id) {
case V4L2_CID_BRIGHTNESS:
dev_dbg(&adv7180_data.sen.i2c_client->dev,
@@ -1203,14 +1187,12 @@ static int adv7180_probe(struct i2c_client *client,
*/
static int adv7180_detach(struct i2c_client *client)
{
- struct fsl_mxc_tvin_platform_data *plat_data = client->dev.platform_data;
-
dev_dbg(&adv7180_data.sen.i2c_client->dev,
"%s:Removing %s video decoder @ 0x%02X from adapter %s\n",
__func__, IF_NAME, client->addr << 1, client->adapter->name);
- if (plat_data->pwdn)
- plat_data->pwdn(1);
+ /* Power down via i2c */
+ adv7180_write_reg(ADV7180_PWR_MNG, 0x24);
if (dvddio_regulator) {
regulator_disable(dvddio_regulator);
diff --git a/drivers/media/video/mxc/capture/mxc_v4l2_capture.c b/drivers/media/video/mxc/capture/mxc_v4l2_capture.c
index 46e000fc5e06..175f9c6820f3 100644
--- a/drivers/media/video/mxc/capture/mxc_v4l2_capture.c
+++ b/drivers/media/video/mxc/capture/mxc_v4l2_capture.c
@@ -1351,19 +1351,11 @@ static int mxc_v4l2_s_param(cam_data *cam, struct v4l2_streamparm *parm)
csi_param.csi = cam->csi;
csi_param.mclk = 0;
- /*This may not work on other platforms. Check when adding a new one.*/
- /*The mclk clock was never set correclty in the ipu register*/
- /*for now we are going to use this mclk as pixel clock*/
- /*to set csi0_data_dest register.*/
- /*This is a workaround which should be fixed*/
pr_debug(" clock_curr=mclk=%d\n", ifparm.u.bt656.clock_curr);
- if (ifparm.u.bt656.clock_curr == 0) {
+ if (ifparm.u.bt656.clock_curr == 0)
csi_param.clk_mode = IPU_CSI_CLK_MODE_CCIR656_INTERLACED;
- /*protocol bt656 use 27Mhz pixel clock */
- csi_param.mclk = 27000000;
- } else {
+ else
csi_param.clk_mode = IPU_CSI_CLK_MODE_GATED_CLK;
- }
csi_param.pixclk_pol = ifparm.u.bt656.latch_clk_inv;
@@ -1433,7 +1425,8 @@ exit:
*/
static int mxc_v4l2_s_std(cam_data *cam, v4l2_std_id e)
{
- printk(KERN_ERR "In mxc_v4l2_s_std %Lx\n", e);
+ pr_debug("In mxc_v4l2_s_std %Lx\n", e);
+
if (e == V4L2_STD_PAL) {
pr_debug(" Setting standard to PAL %Lx\n", V4L2_STD_PAL);
cam->standard.id = V4L2_STD_PAL;
diff --git a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h
index 8fbbc122d162..4a0870f06fea 100644
--- a/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h
+++ b/drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h
@@ -945,11 +945,8 @@ extern gcOPTIMIZER_OPTION theOptimizerOption;
#define gcmOPT_PACKVARYING_triageStart() (gcmGetOptimizerOption()->_triageStart)
#define gcmOPT_PACKVARYING_triageEnd() (gcmGetOptimizerOption()->_triageEnd)
-<<<<<<< HEAD
-=======
#define gcmOPT_INLINELEVEL() (gcmGetOptimizerOption()->inlineLevel)
->>>>>>> fsl-linux-sdk/imx_3.0.35
/* Setters */
#define gcmOPT_SetPatchTexld(m,n) (gcmGetOptimizerOption()->patchEveryTEXLDs = (m),\
gcmGetOptimizerOption()->patchDummyTEXLDs = (n))
diff --git a/drivers/mxc/ipu3/ipu_capture.c b/drivers/mxc/ipu3/ipu_capture.c
index f463836e28ad..c768d8b2b420 100644
--- a/drivers/mxc/ipu3/ipu_capture.c
+++ b/drivers/mxc/ipu3/ipu_capture.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2008-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -129,10 +129,6 @@ ipu_csi_init_interface(struct ipu_soc *ipu, uint16_t width, uint16_t height,
ipu_csi_write(ipu, csi, data, CSI_SENS_CONF);
- /* Setup the mclk */
- if (cfg_param.mclk > 0)
- _ipu_csi_mclk_set(ipu, cfg_param.mclk, csi);
-
/* Setup sensor frame size */
ipu_csi_write(ipu, csi, (width - 1) | (height - 1) << 16, CSI_SENS_FRM_SIZE);
@@ -144,29 +140,30 @@ ipu_csi_init_interface(struct ipu_soc *ipu, uint16_t width, uint16_t height,
if (width == 720 && height == 625) {
/* PAL case */
/*
- * Field0BlankEnd = 0x7, Field0BlankStart = 0x3,
- * Field0ActiveEnd = 0x5, Field0ActiveStart = 0x1
+ * Field0BlankEnd = 0x6, Field0BlankStart = 0x2,
+ * Field0ActiveEnd = 0x4, Field0ActiveStart = 0
*/
- ipu_csi_write(ipu, csi, 0xD07DF, CSI_CCIR_CODE_1);
+ ipu_csi_write(ipu, csi, 0x40596, CSI_CCIR_CODE_1);
/*
- * Field1BlankEnd = 0x6, Field1BlankStart = 0x2,
- * Field1ActiveEnd = 0x4, Field1ActiveStart = 0
+ * Field1BlankEnd = 0x7, Field1BlankStart = 0x3,
+ * Field1ActiveEnd = 0x5, Field1ActiveStart = 0x1
*/
- ipu_csi_write(ipu, csi, 0x40596, CSI_CCIR_CODE_2);
+ ipu_csi_write(ipu, csi, 0xD07DF, CSI_CCIR_CODE_2);
+
ipu_csi_write(ipu, csi, 0xFF0000, CSI_CCIR_CODE_3);
} else if (width == 720 && height == 525) {
/* NTSC case */
/*
- * Field1BlankEnd = 0x6, Field1BlankStart = 0x2,
- * Field1ActiveEnd = 0x4, Field1ActiveStart = 0
- */
- ipu_csi_write(ipu, csi, 0x40596, CSI_CCIR_CODE_1);
- /*
* Field0BlankEnd = 0x7, Field0BlankStart = 0x3,
* Field0ActiveEnd = 0x5, Field0ActiveStart = 0x1
*/
- ipu_csi_write(ipu, csi, 0xD07DF, CSI_CCIR_CODE_2);
+ ipu_csi_write(ipu, csi, 0xD07DF, CSI_CCIR_CODE_1);
+ /*
+ * Field1BlankEnd = 0x6, Field1BlankStart = 0x2,
+ * Field1ActiveEnd = 0x4, Field1ActiveStart = 0
+ */
+ ipu_csi_write(ipu, csi, 0x40596, CSI_CCIR_CODE_2);
ipu_csi_write(ipu, csi, 0xFF0000, CSI_CCIR_CODE_3);
} else {
dev_err(ipu->dev, "Unsupported CCIR656 interlaced "
generated by cgit v1.2.3 (git 2.0.4) at 2025-06-21 14:40:29 +0000