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-rw-r--r--arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-displays.dtsi13
-rw-r--r--arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-fixed.dtsi19
-rw-r--r--arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-displays.dtsi14
-rw-r--r--arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-fixed.dtsi19
-rw-r--r--arch/arm/configs/apalis-tk1_defconfig1
-rw-r--r--drivers/video/tegra/dc/of_dc.c22
6 files changed, 25 insertions, 63 deletions
diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-displays.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-displays.dtsi
index cc48334cdc68..a951d3e21927 100644
--- a/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-displays.dtsi
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-displays.dtsi
@@ -69,7 +69,7 @@
status = "okay";
nvidia,out-type = <TEGRA_DC_OUT_DP>;
nvidia,out-flags = <TEGRA_DC_OUT_CONTINUOUS_MODE>;
- nvidia,out-parent-clk = "pll_d";
+ nvidia,out-parent-clk = "pll_d_out0";
nvidia,out-max-pixclk = <3367>; /* KHZ2PICOS(297000) */
nvidia,out-align = <TEGRA_DC_ALIGN_MSB>;
nvidia,out-order = <TEGRA_DC_ORDER_RED_BLUE>;
@@ -208,4 +208,15 @@
hdmi_ddc: i2c@7000c400 {
clock-frequency = <10000>;
};
+
+ bl: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&tegra_pwm 3 5000000>; /* PWM freq. 200Hz */
+
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <6>;
+
+ enable-gpios = <&gpio TEGRA_GPIO(BB, 5) 0>;
+ power-supply = <&reg_3v3_mxm>;
+ };
};
diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-fixed.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-fixed.dtsi
index e00f482907b7..b4c08bb002bb 100644
--- a/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-fixed.dtsi
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-fixed.dtsi
@@ -206,24 +206,5 @@
};
};
- vdd_lcd_bl_en: regulator@6 {
- compatible = "regulator-fixed-sync";
- reg = <6>;
- regulator-name = "BKL1_ON";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- /* Apalis BKL1_ON */
- gpio = <&gpio TEGRA_GPIO(BB, 5) 0>;
- enable-active-high;
-
- consumers {
- c1 {
- regulator-consumer-supply = "vdd_lcd_bl";
- };
- c2 {
- regulator-consumer-supply = "vdd_lcd_bl_en";
- };
- };
- };
};
};
diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-displays.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-displays.dtsi
index a7774abcda1d..7a86968c51f3 100644
--- a/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-displays.dtsi
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-displays.dtsi
@@ -69,7 +69,7 @@
status = "okay";
nvidia,out-type = <TEGRA_DC_OUT_DP>;
nvidia,out-flags = <TEGRA_DC_OUT_CONTINUOUS_MODE>;
- nvidia,out-parent-clk = "pll_d";
+ nvidia,out-parent-clk = "pll_d_out0";
nvidia,out-max-pixclk = <3367>; /* KHZ2PICOS(297000) */
nvidia,out-align = <TEGRA_DC_ALIGN_MSB>;
nvidia,out-order = <TEGRA_DC_ORDER_RED_BLUE>;
@@ -208,5 +208,15 @@
hdmi_ddc: i2c@7000c700 {
clock-frequency = <10000>;
};
-
+
+ bl: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&tegra_pwm 3 5000000>; /* PWM freq. 200Hz */
+
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <6>;
+
+ enable-gpios = <&gpio TEGRA_GPIO(BB, 5) 0>;
+ power-supply = <&reg_3v3_mxm>;
+ };
};
diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-fixed.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-fixed.dtsi
index 5639ba3c7f99..98607a7ecdc1 100644
--- a/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-fixed.dtsi
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-apalis-v1.2-fixed.dtsi
@@ -206,24 +206,5 @@
};
};
- vdd_lcd_bl_en: regulator@6 {
- compatible = "regulator-fixed-sync";
- reg = <6>;
- regulator-name = "BKL1_ON";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- /* Apalis BKL1_ON */
- gpio = <&gpio TEGRA_GPIO(BB, 5) 0>;
- enable-active-high;
-
- consumers {
- c1 {
- regulator-consumer-supply = "vdd_lcd_bl";
- };
- c2 {
- regulator-consumer-supply = "vdd_lcd_bl_en";
- };
- };
- };
};
};
diff --git a/arch/arm/configs/apalis-tk1_defconfig b/arch/arm/configs/apalis-tk1_defconfig
index 95b55128f72a..e820c0ded65f 100644
--- a/arch/arm/configs/apalis-tk1_defconfig
+++ b/arch/arm/configs/apalis-tk1_defconfig
@@ -294,7 +294,6 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_BACKLIGHT_PWM=y
-CONFIG_BACKLIGHT_TEGRA_PWM=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_SOUND=y
diff --git a/drivers/video/tegra/dc/of_dc.c b/drivers/video/tegra/dc/of_dc.c
index ee1dc1f81f87..1f38c3e8e36b 100644
--- a/drivers/video/tegra/dc/of_dc.c
+++ b/drivers/video/tegra/dc/of_dc.c
@@ -73,7 +73,6 @@ static struct regulator *of_hdmi_vddio;
static struct regulator *of_hdmi_reg;
static struct regulator *of_hdmi_pll;
static struct regulator *of_lvds_dp_reg;
-static struct regulator *of_lvds_bl_reg;
#ifdef CONFIG_TEGRA_DC_CMU
static struct tegra_dc_cmu default_cmu = {
@@ -1647,21 +1646,7 @@ static int dc_lvds_enable(struct device *dev)
of_lvds_dp_reg = NULL;
return ret;
}
-
- if (!of_lvds_bl_reg) {
- of_lvds_bl_reg = regulator_get(dev, "vdd_lcd_bl");
- if (IS_ERR_OR_NULL(of_lvds_bl_reg)) {
- pr_err("lvds: couldn't get regulator vdd_lcd_bl\n");
- of_lvds_bl_reg = NULL;
- }
- }
-
- if (of_lvds_bl_reg) {
- if (regulator_enable(of_lvds_bl_reg) < 0)
- pr_err("vdd_lcd_bl failed to enable\n");
- }
-
- return 0;
+ return ret;
}
static int dc_lvds_disable(void)
@@ -1671,11 +1656,6 @@ static int dc_lvds_disable(void)
regulator_put(of_lvds_dp_reg);
of_lvds_dp_reg = NULL;
}
- if (of_lvds_bl_reg) {
- regulator_disable(of_lvds_bl_reg);
- regulator_put(of_lvds_bl_reg);
- of_lvds_bl_reg = NULL;
- }
return 0;
}