diff options
| -rw-r--r-- | arch/arm/mach-tegra/board-colibri_t20-power.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/board-colibri_t20-power.c b/arch/arm/mach-tegra/board-colibri_t20-power.c index 9513681f4ed0..33822adc2ef7 100644 --- a/arch/arm/mach-tegra/board-colibri_t20-power.c +++ b/arch/arm/mach-tegra/board-colibri_t20-power.c @@ -247,7 +247,7 @@ static struct tegra_suspend_platform_data colibri_t20_suspend_data = { */ .cpu_timer = 2000, .cpu_off_timer = 100, - .suspend_mode = TEGRA_SUSPEND_LP0, + .suspend_mode = TEGRA_SUSPEND_LP1, .core_timer = 0x7e7e, .core_off_timer = 0xf, .corereq_high = false, @@ -259,14 +259,17 @@ static struct tegra_suspend_platform_data colibri_t20_suspend_data = { int __init colibri_t20_regulator_init(void) { void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE); - void __iomem *chip_id = IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804; u32 pmc_ctrl; +#if 0 +//currently LP0 is anyway not supported + void __iomem *chip_id = IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804; u32 minor; minor = (readl(chip_id) >> 16) & 0xf; /* A03 (but not A03p) chips do not support LP0 */ if (minor == 3 && !(tegra_spare_fuse(18) || tegra_spare_fuse(19))) colibri_t20_suspend_data.suspend_mode = TEGRA_SUSPEND_LP1; +#endif /* configure the power management controller to trigger PMU * interrupts when low */ |