diff options
| -rw-r--r-- | Documentation/devicetree/bindings/sound/fsl,esai.txt | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi | 28 |
2 files changed, 26 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/sound/fsl,esai.txt b/Documentation/devicetree/bindings/sound/fsl,esai.txt index 733c0a633c13..2b8cde1f1d1f 100644 --- a/Documentation/devicetree/bindings/sound/fsl,esai.txt +++ b/Documentation/devicetree/bindings/sound/fsl,esai.txt @@ -7,8 +7,8 @@ other DSPs. It has up to six transmitters and four receivers. Required properties: - - compatible : Compatible list, must contain "fsl,imx35-esai" or - "fsl,vf610-esai" + - compatible : Compatible list, must contain "fsl,imx6ull-esai", + "fsl,imx35-esai" or "fsl,vf610-esai" - reg : Offset and length of the register set for the device. diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi index 25f02c46c600..723b2742d22f 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi @@ -903,29 +903,34 @@ }; edma2: dma-controller@591F0000 { - compatible = "fsl,imx8qm-edma"; + compatible = "fsl,imx8qm-adma"; reg = <0x0 0x59200000 0x0 0x10000>, <0x0 0x59210000 0x0 0x10000>, <0x0 0x59220000 0x0 0x10000>, <0x0 0x59230000 0x0 0x10000>, <0x0 0x59240000 0x0 0x10000>, <0x0 0x59250000 0x0 0x10000>, + <0x0 0x59260000 0x0 0x10000>, + <0x0 0x59270000 0x0 0x10000>, <0x0 0x592c0000 0x0 0x10000>, <0x0 0x592d0000 0x0 0x10000>; #dma-cells = <3>; shared-interrupt; - dma-channels = <8>; + dma-channels = <10>; interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "edma-chan0-tx", "edma-chan1-tx", "edma-chan2-tx", "edma-chan3-tx", "edma-chan4-tx", "edma-chan5-tx", + "edma-chan6-tx", "edma-chan7-tx", "edma-chan12-tx", "edma-chan13-tx"; status = "okay"; }; @@ -1182,13 +1187,28 @@ status = "disabled"; }; + esai0: esai@59010000 { + compatible = "fsl,imx6ull-esai"; + reg = <0x0 0x59010000 0x0 0x10000>; + interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8QM_AUD_ESAI_0_IPG>, + <&clk IMX8QM_AUD_ESAI_0_EXTAL_IPG>, + <&clk IMX8QM_CLK_DUMMY>, + <&clk IMX8QM_CLK_DUMMY>; + clock-names = "core", "extal", "fsys", "spba"; + dmas = <&edma2 6 0 1>, <&edma2 7 0 0>; + dma-names = "rx", "tx"; + power-domains = <&pd_esai0>; + status = "disabled"; + }; + sai0: sai@59040000 { compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; reg = <0x0 0x59040000 0x0 0x10000>; interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8QM_AUD_SAI_0_IPG>, - <&clk IMX8QM_AUD_SAI_0_MCLK>, - <&clk 0>, <&clk 0>; + <&clk IMX8QM_AUD_SAI_0_MCLK>, + <&clk IMX8QM_CLK_DUMMY>, <&clk IMX8QM_CLK_DUMMY>; clock-names = "bus", "mclk1", "mclk2", "mclk3"; dma-names = "rx", "tx"; dmas = <&edma2 12 0 1>, <&edma2 13 0 0>; |