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-rw-r--r--arch/arm/boot/dts/imx6sl-evk.dts4
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi4
-rw-r--r--arch/arm/mach-imx/clk-imx6sl.c4
3 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index fd8f9013e96b..bede1339aa19 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -297,6 +297,10 @@
};
};
+&pxp {
+ status = "okay";
+};
+
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 0d0eb0ef55c9..24e8e3d1ca06 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -626,8 +626,12 @@
};
pxp: pxp@020f0000 {
+ compatible = "fsl,imx6sl-pxp-dma", "fsl,imx6dl-pxp-dma";
reg = <0x020f0000 0x4000>;
interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6SL_CLK_PXP_AXI>, <&clks IMX6SL_CLK_DUMMY>;
+ clock-names = "pxp-axi", "disp-axi";
+ status = "disabled";
};
epdc: epdc@020f4000 {
diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index d730dfaa8933..c5bd0abbf9f6 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -381,6 +381,10 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
/* Audio-related clocks configuration */
clk_set_parent(clks[IMX6SL_CLK_SPDIF0_SEL], clks[IMX6SL_CLK_PLL3_PFD3]);
+ /* Configure pxp clocks */
+ clk_set_parent(clks[IMX6SL_CLK_PXP_AXI_SEL], clks[IMX6SL_CLK_PLL2_PFD2]);
+ clk_set_rate(clks[IMX6SL_CLK_PXP_AXI], 200000000);
+
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);