diff options
| -rw-r--r-- | Documentation/devicetree/bindings/serial/uniphier-uart.txt | 4 | ||||
| -rw-r--r-- | drivers/tty/serial/8250/8250_uniphier.c | 10 |
2 files changed, 1 insertions, 13 deletions
diff --git a/Documentation/devicetree/bindings/serial/uniphier-uart.txt b/Documentation/devicetree/bindings/serial/uniphier-uart.txt index 0b3892a7a528..811c479b373d 100644 --- a/Documentation/devicetree/bindings/serial/uniphier-uart.txt +++ b/Documentation/devicetree/bindings/serial/uniphier-uart.txt @@ -6,9 +6,6 @@ Required properties: - interrupts: a single interrupt specifier. - clocks: phandle to the input clock. -Optional properties: -- fifo-size: the RX/TX FIFO size. Defaults to 64 if not specified. - Example: aliases { serial0 = &serial0; @@ -19,5 +16,4 @@ Example: reg = <0x54006800 0x40>; interrupts = <0 33 4>; clocks = <&uart_clk>; - fifo-size = <64>; }; diff --git a/drivers/tty/serial/8250/8250_uniphier.c b/drivers/tty/serial/8250/8250_uniphier.c index 28d88ccf5a0c..d292654422b2 100644 --- a/drivers/tty/serial/8250/8250_uniphier.c +++ b/drivers/tty/serial/8250/8250_uniphier.c @@ -12,9 +12,6 @@ #include "8250.h" -/* Most (but not all) of UniPhier UART devices have 64-depth FIFO. */ -#define UNIPHIER_UART_DEFAULT_FIFO_SIZE 64 - /* * This hardware is similar to 8250, but its register map is a bit different: * - MMIO32 (regshift = 2) @@ -185,12 +182,6 @@ static int uniphier_of_serial_setup(struct device *dev, struct uart_port *port, port->uartclk = clk_get_rate(priv->clk); - /* Check for fifo size */ - if (of_property_read_u32(np, "fifo-size", &prop) == 0) - port->fifosize = prop; - else - port->fifosize = UNIPHIER_UART_DEFAULT_FIFO_SIZE; - return 0; } @@ -241,6 +232,7 @@ static int uniphier_uart_probe(struct platform_device *pdev) up.port.type = PORT_16550A; up.port.iotype = UPIO_MEM32; + up.port.fifosize = 64; up.port.regshift = UNIPHIER_UART_REGSHIFT; up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE; up.capabilities = UART_CAP_FIFO; |