diff options
| -rw-r--r-- | drivers/clk/imx/clk-imx8mn.c | 16 | ||||
| -rw-r--r-- | include/dt-bindings/clock/imx8mn-clock.h | 3 |
2 files changed, 14 insertions, 5 deletions
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index 1f1d639bb881..10e0c78928bf 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -127,6 +127,8 @@ static const char * const imx8mn_a53_sels[] = {"osc_24m", "arm_pll_out", "sys_pl "sys_pll2_1000m", "sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out", }; +static const char *imx8mn_a53_core_sels[] = {"arm_a53_div", "arm_pll_out", }; + static const char * const imx8mn_gpu_core_sels[] = {"osc_24m", "gpu_pll_out", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", }; @@ -507,6 +509,9 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) clks[IMX8MN_CLK_GPU_CORE_DIV] = imx_clk_divider2("gpu_core_div", "gpu_core_cg", base + 0x8180, 0, 3); clks[IMX8MN_CLK_GPU_SHADER_DIV] = imx_clk_divider2("gpu_shader_div", "gpu_shader_cg", base + 0x8200, 0, 3); + /* CORE SEL */ + clks[IMX8MN_CLK_A53_CORE] = imx_clk_mux2_flags("arm_a53_core", base + 0x9880, 24, 1, imx8mn_a53_core_sels, ARRAY_SIZE(imx8mn_a53_core_sels), CLK_IS_CRITICAL); + /* BUS */ clks[IMX8MN_CLK_MAIN_AXI] = imx8m_clk_composite_critical("main_axi", imx8mn_main_axi_sels, base + 0x8800); clks[IMX8MN_CLK_ENET_AXI] = imx8m_clk_composite("enet_axi", imx8mn_enet_axi_sels, base + 0x8880); @@ -629,11 +634,14 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) clks[IMX8MN_CLK_DRAM_ALT_ROOT] = imx_clk_fixed_factor("dram_alt_root", "dram_alt", 1, 4); - clks[IMX8MN_CLK_ARM] = imx_clk_cpu("arm", "arm_a53_div", - clks[IMX8MN_CLK_A53_DIV], - clks[IMX8MN_CLK_A53_SRC], + clk_set_parent(clks[IMX8MN_CLK_A53_SRC], clks[IMX8MN_SYS_PLL1_800M]); + clk_set_parent(clks[IMX8MN_CLK_A53_CORE], clks[IMX8MN_ARM_PLL_OUT]); + + clks[IMX8MN_CLK_ARM] = imx_clk_cpu("arm", "arm_a53_core", + clks[IMX8MN_CLK_A53_CORE], + clks[IMX8MN_CLK_A53_CORE], clks[IMX8MN_ARM_PLL_OUT], - clks[IMX8MN_SYS_PLL1_800M]); + clks[IMX8MN_CLK_A53_DIV]); imx_check_clocks(clks, ARRAY_SIZE(clks)); diff --git a/include/dt-bindings/clock/imx8mn-clock.h b/include/dt-bindings/clock/imx8mn-clock.h index 0c7c750fc2c4..9e55f30d9c83 100644 --- a/include/dt-bindings/clock/imx8mn-clock.h +++ b/include/dt-bindings/clock/imx8mn-clock.h @@ -210,7 +210,8 @@ #define IMX8MN_CLK_NAND_USDHC_BUS_RAWNAND_CLK 192 #define IMX8MN_CLK_GPU_CORE_ROOT 193 #define IMX8MN_CLK_GIC 194 +#define IMX8MN_CLK_A53_CORE 195 -#define IMX8MN_CLK_END 195 +#define IMX8MN_CLK_END 196 #endif |