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-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts50
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts104
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi108
3 files changed, 261 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
index 120e62dad154..a6aac57ed4b5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
@@ -131,6 +131,30 @@
};
};
+&qspi {
+ status = "okay";
+ fsl,qspi-has-second-chip;
+ qflash0: s25fs512s@0 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
+
+ qflash1: s25fs512s@1 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <1>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
+};
+
&duart0 {
status = "okay";
};
@@ -146,3 +170,29 @@
&sata {
status = "okay";
};
+
+&pcs_mdio1 {
+ pcs_phy1: ethernet-phy@0 {
+ backplane-mode = "10gbase-kr";
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x0>;
+ fsl,lane-handle = <&serdes1>;
+ fsl,lane-reg = <0x840 0x40>;/* lane B */
+ };
+};
+
+&pcs_mdio2 {
+ pcs_phy2: ethernet-phy@0 {
+ backplane-mode = "10gbase-kr";
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x0>;
+ fsl,lane-handle = <&serdes1>;
+ fsl,lane-reg = <0x800 0x40>;/* lane A */
+ };
+};
+
+/* Update DPMAC connections to backplane PHYs, under SerDes 0x1D_0xXX.
+ * &dpmac1 {
+ * phy-handle = <&pcs_phy1>;
+ * };
+ */
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
index 8e925df6c01c..484c618446eb 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
@@ -74,6 +74,31 @@
};
};
+&qspi {
+ status = "okay";
+ fsl,qspi-has-second-chip;
+ qflash0: s25fs512s@0 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
+
+ qflash1: s25fs512s@1 {
+ compatible = "spansion,m25p80";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <1>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ };
+
+};
+
&duart0 {
status = "okay";
};
@@ -97,3 +122,82 @@
&usb1 {
status = "okay";
};
+
+&emdio1 {
+ /* Freescale F104 PHY1 */
+ mdio1_phy1: emdio1_phy@1 {
+ reg = <0x1c>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy2: emdio1_phy@2 {
+ reg = <0x1d>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy3: emdio1_phy@3 {
+ reg = <0x1e>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy4: emdio1_phy@4 {
+ reg = <0x1f>;
+ phy-connection-type = "qsgmii";
+ };
+ /* F104 PHY2 */
+ mdio1_phy5: emdio1_phy@5 {
+ reg = <0x0c>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy6: emdio1_phy@6 {
+ reg = <0x0d>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy7: emdio1_phy@7 {
+ reg = <0x0e>;
+ phy-connection-type = "qsgmii";
+ };
+ mdio1_phy8: emdio1_phy@8 {
+ reg = <0x0f>;
+ phy-connection-type = "qsgmii";
+ };
+};
+
+&emdio2 {
+ /* Aquantia AQR105 10G PHY */
+ mdio2_phy1: emdio2_phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ interrupts = <0 2 0x4>;
+ reg = <0x0>;
+ phy-connection-type = "xfi";
+ };
+};
+
+/* DPMAC connections to external PHYs
+ * based on LS1088A RM RevC - $24.1.2 SerDes Options
+ */
+/* DPMAC1 is 10G SFP+, fixed link */
+&dpmac2 {
+ phy-handle = <&mdio2_phy1>;
+};
+&dpmac3 {
+ phy-handle = <&mdio1_phy5>;
+};
+&dpmac4 {
+ phy-handle = <&mdio1_phy6>;
+};
+&dpmac5 {
+ phy-handle = <&mdio1_phy7>;
+};
+&dpmac6 {
+ phy-handle = <&mdio1_phy8>;
+};
+&dpmac7 {
+ phy-handle = <&mdio1_phy1>;
+};
+&dpmac8 {
+ phy-handle = <&mdio1_phy2>;
+};
+&dpmac9 {
+ phy-handle = <&mdio1_phy3>;
+};
+&dpmac10 {
+ phy-handle = <&mdio1_phy4>;
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index c676d0771762..44c9f971d97e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -185,6 +185,19 @@
clock-output-names = "sysclk";
};
+ rstcr: syscon@1e60000 {
+ compatible = "fsl,ls1088a-rstcr", "syscon";
+ reg = <0x0 0x1e60000 0x0 0x4>;
+ };
+
+ reboot {
+ compatible = "syscon-reboot";
+ regmap = <&rstcr>;
+ offset = <0x0>;
+ mask = <0x02>;
+ };
+
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
@@ -205,6 +218,11 @@
little-endian;
};
+ serdes1: serdes@1ea0000 {
+ reg = <0x0 0x1ea0000 0 0x00002000>;
+ compatible = "fsl,serdes-10g";
+ };
+
tmu: tmu@1f80000 {
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f80000 0x0 0x10000>;
@@ -325,6 +343,72 @@
#interrupt-cells = <2>;
};
+ /* TODO: WRIOP (CCSR?) */
+ emdio1: mdio@0x8B96000 { /* WRIOP0: 0x8B8_0000,
+ * E-MDIO1: 0x1_6000
+ */
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8B96000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian; /* force the driver in LE mode */
+
+ /* Not necessary on the QDS, but needed on the RDB */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ emdio2: mdio@0x8B97000 { /* WRIOP0: 0x8B8_0000,
+ * E-MDIO2: 0x1_7000
+ */
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8B97000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian; /* force the driver in LE mode */
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio1: mdio@0x8c07000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c07000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio2: mdio@0x8c0b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0b000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio3: mdio@0x8c0f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0f000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio4: mdio@0x8c13000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c13000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
ifc: ifc@2240000 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x2240000 0x0 0x20000>;
@@ -335,13 +419,20 @@
status = "disabled";
};
+ ftm0: ftm0@2800000 {
+ compatible = "fsl,ftm-alarm";
+ reg = <0x0 0x2800000 0x0 0x10000>;
+ interrupts = <0 44 4>;
+ };
+
i2c0: i2c@2000000 {
- compatible = "fsl,vf610-i2c";
+ compatible = "fsl,vf610-i2c", "fsl,ls1088a-vf610-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x2000000 0x0 0x10000>;
interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 7>;
+ scl-gpios = <&gpio3 30 0>;
status = "disabled";
};
@@ -405,6 +496,7 @@
dr_mode = "host";
snps,quirk-frame-length-adjustment = <0x20>;
snps,dis_rxdet_inp3_quirk;
+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
status = "disabled";
};
@@ -418,6 +510,17 @@
dma-coherent;
status = "disabled";
};
+ qspi: spi@20c0000 {
+ compatible = "fsl,ls2080a-qspi", "fsl,ls1088a-qspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x20c0000 0x0 0x10000>,
+ <0x0 0x20000000 0x0 0x10000000>;
+ reg-names = "QuadSPI", "QuadSPI-memory";
+ interrupts = <0 25 0x4>; /* Level high type */
+ clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clock-names = "qspi_en", "qspi";
+ };
crypto: crypto@8000000 {
compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
@@ -474,6 +577,7 @@
ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
msi-parent = <&its>;
+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>,
@@ -499,6 +603,7 @@
ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
msi-parent = <&its>;
+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0000 0 0 1 &gic 0 0 0 114 IRQ_TYPE_LEVEL_HIGH>,
@@ -524,6 +629,7 @@
ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
msi-parent = <&its>;
+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0000 0 0 1 &gic 0 0 0 119 IRQ_TYPE_LEVEL_HIGH>,
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-12 16:52:07 +0000